JPH11214961A5 - - Google Patents
Info
- Publication number
- JPH11214961A5 JPH11214961A5 JP1998014217A JP1421798A JPH11214961A5 JP H11214961 A5 JPH11214961 A5 JP H11214961A5 JP 1998014217 A JP1998014217 A JP 1998014217A JP 1421798 A JP1421798 A JP 1421798A JP H11214961 A5 JPH11214961 A5 JP H11214961A5
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- inverter
- input terminal
- voltage
- clock signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP01421798A JP3653170B2 (ja) | 1998-01-27 | 1998-01-27 | ラッチ回路およびフリップフロップ回路 |
| US09/130,607 US5994935A (en) | 1998-01-27 | 1998-08-07 | Latch circuit and flip-flop circuit reduced in power consumption |
| KR1019980043532A KR100292964B1 (ko) | 1998-01-27 | 1998-10-17 | 필요한 소자수가 감소되고 소비 전력이 절감되는 래치 회로 및플립플롭 회로 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP01421798A JP3653170B2 (ja) | 1998-01-27 | 1998-01-27 | ラッチ回路およびフリップフロップ回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH11214961A JPH11214961A (ja) | 1999-08-06 |
| JPH11214961A5 true JPH11214961A5 (enExample) | 2004-12-09 |
| JP3653170B2 JP3653170B2 (ja) | 2005-05-25 |
Family
ID=11854927
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP01421798A Expired - Lifetime JP3653170B2 (ja) | 1998-01-27 | 1998-01-27 | ラッチ回路およびフリップフロップ回路 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US5994935A (enExample) |
| JP (1) | JP3653170B2 (enExample) |
| KR (1) | KR100292964B1 (enExample) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW382855B (en) * | 1998-07-29 | 2000-02-21 | Integrated Technology Express | State machine with dynamic interception clock function |
| JP3632151B2 (ja) * | 2000-06-06 | 2005-03-23 | 日本電信電話株式会社 | 断熱充電レジスタ回路 |
| KR100391825B1 (ko) * | 2001-03-12 | 2003-07-16 | 주식회사 케이이씨 | 고속 리셋기능을 갖는 플립플롭 회로 및 플립플롭 회로의 리셋방법 |
| EP1331736A1 (en) * | 2002-01-29 | 2003-07-30 | Texas Instruments France | Flip-flop with reduced leakage current |
| KR100468749B1 (ko) * | 2002-07-12 | 2005-01-29 | 삼성전자주식회사 | 고속 동작을 위한 플립플롭 |
| US6741111B1 (en) | 2003-04-21 | 2004-05-25 | Pericom Semiconductor Corp. | Data register for buffering double-data-rate DRAMs with reduced data-input-path power consumption |
| JP2006224318A (ja) * | 2005-02-15 | 2006-08-31 | Brother Ind Ltd | インクジェット記録装置 |
| KR100776750B1 (ko) * | 2006-06-08 | 2007-11-19 | 주식회사 하이닉스반도체 | 반도체 메모리의 기준전압 발생장치 및 방법 |
| CN101241247B (zh) * | 2007-02-09 | 2010-05-26 | 群康科技(深圳)有限公司 | 移位寄存器及液晶显示装置 |
| US8615205B2 (en) | 2007-12-18 | 2013-12-24 | Qualcomm Incorporated | I-Q mismatch calibration and method |
| JP2009211732A (ja) * | 2008-02-29 | 2009-09-17 | Eastman Kodak Co | シフトレジスタ回路および表示装置 |
| US8970272B2 (en) | 2008-05-15 | 2015-03-03 | Qualcomm Incorporated | High-speed low-power latches |
| US8712357B2 (en) | 2008-11-13 | 2014-04-29 | Qualcomm Incorporated | LO generation with deskewed input oscillator signal |
| US8718574B2 (en) | 2008-11-25 | 2014-05-06 | Qualcomm Incorporated | Duty cycle adjustment for a local oscillator signal |
| US8847638B2 (en) | 2009-07-02 | 2014-09-30 | Qualcomm Incorporated | High speed divide-by-two circuit |
| US8791740B2 (en) * | 2009-07-16 | 2014-07-29 | Qualcomm Incorporated | Systems and methods for reducing average current consumption in a local oscillator path |
| US8164361B2 (en) * | 2009-12-08 | 2012-04-24 | Qualcomm Incorporated | Low power complementary logic latch and RF divider |
| US8854098B2 (en) | 2011-01-21 | 2014-10-07 | Qualcomm Incorporated | System for I-Q phase mismatch detection and correction |
| US9154077B2 (en) | 2012-04-12 | 2015-10-06 | Qualcomm Incorporated | Compact high frequency divider |
| JP6273112B2 (ja) * | 2012-09-11 | 2018-01-31 | 株式会社半導体エネルギー研究所 | フリップフロップ回路および半導体装置 |
| CN112671388B (zh) | 2014-10-10 | 2024-07-05 | 株式会社半导体能源研究所 | 逻辑电路、处理单元、电子构件以及电子设备 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01248820A (ja) * | 1988-03-30 | 1989-10-04 | Oki Electric Ind Co Ltd | フリップフロップ回路 |
| US5391935A (en) * | 1993-07-22 | 1995-02-21 | International Business Machines Corporation | Assertive latching flip-flop |
| US5789956A (en) * | 1995-05-26 | 1998-08-04 | Texas Instruments Incorporated | Low power flip-flop |
-
1998
- 1998-01-27 JP JP01421798A patent/JP3653170B2/ja not_active Expired - Lifetime
- 1998-08-07 US US09/130,607 patent/US5994935A/en not_active Expired - Lifetime
- 1998-10-17 KR KR1019980043532A patent/KR100292964B1/ko not_active Expired - Lifetime
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