JPH11186467A - Semiconductor device, lead frame used at manufacturing the device, and manufacture of lead frame - Google Patents
Semiconductor device, lead frame used at manufacturing the device, and manufacture of lead frameInfo
- Publication number
- JPH11186467A JPH11186467A JP35740897A JP35740897A JPH11186467A JP H11186467 A JPH11186467 A JP H11186467A JP 35740897 A JP35740897 A JP 35740897A JP 35740897 A JP35740897 A JP 35740897A JP H11186467 A JPH11186467 A JP H11186467A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- lead frame
- metal film
- manufacturing
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、特に樹脂によっ
て封止した型の半導体装置とそれを製造する際に用いる
リードフレーム及びその製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device of the type sealed with a resin, a lead frame used for manufacturing the same, and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】図５に従来の半導体装置の一例を示す。
２は金属膜、３は金線、４は半導体チップ、５は樹脂パ
ッケージである。樹脂パッケージ５の裏面には樹脂突起
２０が突出形成され、この樹脂突起２０の表面に金属膜
２を形成している。図６に上記従来の半導体装置のリー
ドフレームの断面図を示す。凹部２１を設けた基材１と
凹部２１の表面に形成した金属膜２とを備えた。図７に
このリードフレームの製造工程断面図を示す。図７
（ａ），（ｂ）に示すように基材１にレジスト６を塗布
し、所定部分を除去した後、基材１に凹部２１を形成す
るエッチング工程（図７（ｃ））と、凹部２１の表面に
金属膜２を形成する金属膜形成工程（図７（ｄ））とか
らなる。図７（ｅ）はレジスト６を除去した状態を示
す。2. Description of the Related Art FIG. 5 shows an example of a conventional semiconductor device.
2 is a metal film, 3 is a gold wire, 4 is a semiconductor chip, and 5 is a resin package. On the back surface of the resin package 5, a resin protrusion 20 is formed so as to protrude, and the metal film 2 is formed on the surface of the resin protrusion 20. FIG. 6 shows a cross-sectional view of a lead frame of the conventional semiconductor device. The substrate 1 was provided with the recess 21 and the metal film 2 formed on the surface of the recess 21. FIG. 7 is a sectional view showing a manufacturing process of the lead frame. FIG.
As shown in FIGS. 7A and 7B, an etching step (FIG. 7C) of applying a resist 6 to the base material 1 and removing a predetermined portion thereof and then forming a recess 21 in the base material 1 is performed. (FIG. 7D) for forming the metal film 2 on the surface of FIG. FIG. 7E shows a state in which the resist 6 has been removed.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、上記従
来の半導体装置では、図８に示す断面図のように実装基
板９への実装後、金属膜２を基板９の端子に接続する半
田接合部が樹脂パッケージ５の裏面に隠れてしまい外観
検査が容易でないという問題がある。したがって、この
発明の目的は、外観検査を容易に行うことができる半導
体装置とそれを製造する際に用いるリードフレーム及び
その製造方法を提供することである。However, in the above-mentioned conventional semiconductor device, as shown in the cross-sectional view of FIG. 8, after mounting on the mounting substrate 9, the solder joint for connecting the metal film 2 to the terminal of the substrate 9 is not provided. There is a problem that it is hidden on the back surface of the resin package 5 and the appearance inspection is not easy. Accordingly, an object of the present invention is to provide a semiconductor device capable of easily performing an appearance inspection, a lead frame used for manufacturing the same, and a method of manufacturing the same.
【０００４】[0004]
【課題を解決するための手段】上記問題点を解決するた
めに、この発明の請求項１記載の半導体装置は、半導体
素子と、この半導体素子を封止する樹脂パッケージと、
この樹脂パッケージの実装側端面から裏面にかけて設け
た段差部と、この段差部に沿って設けられた金属膜と、
半導体素子上の電極パッドと金属膜とを電気的に接続す
る接続手段とを備えた。図４にこの発明の半導体装置を
配線基板に実装した断面図を示す。According to a first aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor element; a resin package for encapsulating the semiconductor element;
A step portion provided from the mounting side end surface to the back surface of the resin package, and a metal film provided along the step portion,
Connecting means for electrically connecting an electrode pad on the semiconductor element to the metal film; FIG. 4 is a sectional view showing a semiconductor device of the present invention mounted on a wiring board.
【０００５】このように、樹脂パッケージの実装側端面
から裏面にかけて段差部を設け、この段差部に沿って金
属膜を設けているので、半導体装置の実装状態で金属膜
が側方に露出している。このため、金属膜を基板の端子
に接続する半田接合部が樹脂パッケージの裏面に隠れな
いため、外観検査が容易になる。また、金属膜を形成し
た段差部に半田が十分に供給され半田接合部の高さが十
分に確保でき実装信頼性がはるかに向上する。As described above, since the step is provided from the mounting end surface to the back surface of the resin package and the metal film is provided along the step, the metal film is exposed laterally when the semiconductor device is mounted. I have. For this reason, the solder joint connecting the metal film to the terminal of the substrate is not hidden by the back surface of the resin package, so that the appearance inspection is facilitated. Further, the solder is sufficiently supplied to the step portion where the metal film is formed, and the height of the solder joint portion can be sufficiently ensured, so that the mounting reliability is greatly improved.
【０００６】請求項２記載のリードフレームは、請求項
１記載の半導体装置を製造する際に用いるリードフレー
ムであって、段差部を設けた基材と、段差部の表面に形
成した金属膜とを備えた。このように、段差部を設けた
基材と、段差部の表面に形成した金属膜とを備えている
ので、このリードフレームを用いることにより請求項１
に記載したような樹脂パッケージの実装側端面から裏面
にかけて段差部を設け、この段差部に沿って金属膜を設
けた半導体装置を製造できる。According to a second aspect of the present invention, there is provided a lead frame for use in manufacturing the semiconductor device according to the first aspect, wherein a base material having a step portion and a metal film formed on the surface of the step portion are provided. With. Since the substrate is provided with the stepped portion and the metal film formed on the surface of the stepped portion, the lead frame is used.
As described in the above section, a stepped portion is provided from the mounting-side end surface to the back surface of the resin package, and a semiconductor device provided with a metal film along the stepped portion can be manufactured.
【０００７】請求項３記載のリードフレームの製造方法
は、請求項２記載のリードフレームの製造方法であっ
て、基材の表面に金属膜を形成する金属膜形成工程と、
金属膜に対応する基材の位置に段差部を設けるプレス加
工工程とを含む。このように、基材の表面に金属膜を形
成する金属膜形成工程と、金属膜に対応する基材の位置
に段差部を設けるプレス加工工程とを含むことにより、
請求項２に記載したリードフレームを容易に製造でき
る。According to a third aspect of the present invention, there is provided a method for manufacturing a lead frame, comprising the steps of: forming a metal film on a surface of a base material;
Press working step of providing a step at the position of the base material corresponding to the metal film. As described above, by including a metal film forming step of forming a metal film on the surface of the base material and a press working step of providing a step at a position of the base material corresponding to the metal film,
The lead frame described in claim 2 can be easily manufactured.
【０００８】[0008]
【発明の実施の形態】この発明の実施の形態を図１〜図
４に基づいて説明する。図１はこの発明の実施の形態の
半導体装置の断面側面図、図２はこの発明の実施の形態
の半導体装置の樹脂封止工程が終了した状態の断面側面
図である。図１に示すように、この半導体装置は、半導
体素子（半導体チップ）４と、この半導体素子４を封止
する樹脂パッケージ５と、この樹脂パッケージ５の実装
側端面から裏面にかけて設けた段差部１１と、この段差
部１１に沿って設けられた金属膜２と、半導体素子４上
の電極パッドと金属膜２とを電気的に接続する接続手段
（金線）３とを備えている。この半導体装置を製造する
際には、図２に示すように、リードフレームが用いられ
る。このリードフレームは、段差部７を設けた基材１
と、段差部７の表面に形成した金属膜２とを備えてい
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional side view of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a cross-sectional side view of the semiconductor device of the embodiment of the present invention after a resin sealing step is completed. As shown in FIG. 1, the semiconductor device includes a semiconductor element (semiconductor chip) 4, a resin package 5 for sealing the semiconductor element 4, and a step 11 provided from an end surface on a mounting side of the resin package 5 to a back surface. And a metal film 2 provided along the step portion 11, and a connection means (gold wire) 3 for electrically connecting the metal film 2 to an electrode pad on the semiconductor element 4. When manufacturing this semiconductor device, a lead frame is used as shown in FIG. This lead frame is made of a base material 1 provided with a stepped portion 7.
And a metal film 2 formed on the surface of the stepped portion 7.
【０００９】次に、リードフレームの製造方法について
説明する。図３はこの発明の実施の形態のリードフレー
ムの製造工程断面図である。まず、図３（ａ）に示すよ
うに、基材１の上にレジスト膜６を塗布し、金属膜２の
形成位置に対応する部位を除去する（図３（ｂ））。次
に図３（ｃ）に示すように、めっき法を用いて金属膜２
を形成した後、レジスト膜６を除去する（図３
（ｄ））。次に図３（ｅ）に示すように、プレス加工を
用いて基材１及び金属膜２に段差部７を設ける。なお、
リードフレームの製造順序として、プレス加工時に起こ
る傷などの発生から基材１及び金属膜２を保護する目的
で、レジスト膜６をプレス加工後に除去してもよい。Next, a method of manufacturing a lead frame will be described. FIG. 3 is a sectional view showing a manufacturing process of the lead frame according to the embodiment of the present invention. First, as shown in FIG. 3A, a resist film 6 is applied on the base material 1, and a portion corresponding to a position where the metal film 2 is formed is removed (FIG. 3B). Next, as shown in FIG. 3C, the metal film 2 is formed by plating.
Is formed, the resist film 6 is removed (FIG. 3).
(D)). Next, as shown in FIG. 3E, a step portion 7 is provided on the base material 1 and the metal film 2 by using press working. In addition,
As a manufacturing sequence of the lead frame, the resist film 6 may be removed after the press working in order to protect the base material 1 and the metal film 2 from the occurrence of scratches or the like generated during the press working.
【００１０】上記のようにして製造されたリードフレー
ムを用いて半導体装置を製造する。すなわち、半導体チ
ップ４をダイボンディングし、図２に示すように細い金
線３にて半導体チップ４の電極と金属膜２とをワイヤボ
ンディングして接続する。次に半導体チップ４、金線３
および金属膜２を樹脂封止する。これにより、樹脂パッ
ケージ５に基材１の段差部７に対応した段差部１１が形
成される。最後に金属膜２を残して基材１を除去するこ
とで、この実施の形態の半導体装置が完成する（図
１）。図４にこの実施の形態の半導体装置を配線基板に
実装した状態の断面図を示す。図４において、８は半
田、９は配線基板である。A semiconductor device is manufactured using the lead frame manufactured as described above. That is, the semiconductor chip 4 is die-bonded, and the electrodes of the semiconductor chip 4 and the metal film 2 are connected by wire bonding with thin gold wires 3 as shown in FIG. Next, the semiconductor chip 4 and the gold wire 3
Then, the metal film 2 is sealed with a resin. Thus, a step 11 corresponding to the step 7 of the base material 1 is formed in the resin package 5. Finally, the semiconductor device of this embodiment is completed by removing the base material 1 while leaving the metal film 2 (FIG. 1). FIG. 4 is a sectional view showing a state where the semiconductor device of this embodiment is mounted on a wiring board. In FIG. 4, reference numeral 8 denotes solder, and 9 denotes a wiring board.
【００１１】以上のようにこの実施の形態によれば、樹
脂パッケージ５の実装側端面から裏面にかけて段差部１
１を設け、この段差部１１に沿って金属膜２を設けてい
るので、半導体装置の実装状態で金属膜２が側方に露出
している。このため、金属膜２を基板の端子に接続する
半田接合部が樹脂パッケージ５の裏面に隠れないため、
外観検査が容易になる。また、金属膜２を形成した段差
部１１に半田８が十分に供給され、半田接合部の高さが
十分に確保でき実装信頼性がはるかに向上する。As described above, according to this embodiment, the step portion 1 extends from the mounting end surface to the back surface of the resin package 5.
1 is provided and the metal film 2 is provided along the step portion 11, so that the metal film 2 is exposed to the side when the semiconductor device is mounted. Therefore, the solder joint connecting the metal film 2 to the terminal of the substrate is not hidden by the back surface of the resin package 5.
Visual inspection becomes easy. Further, the solder 8 is sufficiently supplied to the step portion 11 on which the metal film 2 is formed, and the height of the solder joint portion can be sufficiently ensured, so that the mounting reliability is greatly improved.
【００１２】なお、実施の形態では基材１及び金属膜２
に段差部７を設けているため金属膜２が折曲した形状に
なっているが、基材１にのみ段差部７を設けて金属膜２
が折曲しない構成にしてもよい。In the embodiment, the substrate 1 and the metal film 2
The metal film 2 has a bent shape due to the provision of the stepped portion 7 in the metal film 2.
May not be bent.
【００１３】[0013]
【発明の効果】この発明の請求項１記載の半導体装置に
よれば、樹脂パッケージの実装側端面から裏面にかけて
段差部を設け、この段差部に沿って金属膜を設けている
ので、半導体装置の実装状態で金属膜が側方に露出して
いる。このため、金属膜を基板の端子に接続する半田接
合部が樹脂パッケージの裏面に隠れないため、外観検査
が容易になる。また、金属膜を形成した段差部に半田が
十分に供給され、半田接合部の高さが十分に確保でき実
装信頼性がはるかに向上する。According to the semiconductor device of the first aspect of the present invention, since the step portion is provided from the mounting end surface to the back surface of the resin package, and the metal film is provided along the step portion, the semiconductor device has The metal film is laterally exposed in the mounted state. For this reason, the solder joint connecting the metal film to the terminal of the substrate is not hidden by the back surface of the resin package, so that the appearance inspection is facilitated. In addition, the solder is sufficiently supplied to the step portion on which the metal film is formed, and the height of the solder joint portion can be sufficiently secured, so that the mounting reliability is greatly improved.
【００１４】請求項２記載のリードフレームによれば、
段差部を設けた基材と、段差部の表面に形成した金属膜
とを備えているので、このリードフレームを用いること
により請求項１に記載したような樹脂パッケージの実装
側端面から裏面にかけて段差部を設け、この段差部に沿
って金属膜を設けた半導体装置を製造できる。請求項３
記載のリードフレームの製造方法によれば、基材の表面
に金属膜を形成する金属膜形成工程と、金属膜に対応す
る基材の位置に段差部を設けるプレス加工工程とを含む
ことにより、請求項２に記載したリードフレームを容易
に製造できる。According to the lead frame of the second aspect,
Since there is provided a base material having a stepped portion and a metal film formed on the surface of the stepped portion, a step is formed from the mounting side end surface to the back surface of the resin package as described in claim 1 by using this lead frame. A semiconductor device can be manufactured in which a portion is provided and a metal film is provided along the step. Claim 3
According to the method for manufacturing a lead frame described above, by including a metal film forming step of forming a metal film on the surface of the base material, and a press working step of providing a step at a position of the base material corresponding to the metal film, The lead frame described in claim 2 can be easily manufactured.
【図１】この発明の実施の形態の半導体装置の断面図で
ある。FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.
【図２】この発明の実施の形態の半導体装置の樹脂封止
工程が終了した状態の断面図である。FIG. 2 is a cross-sectional view of the semiconductor device according to the embodiment of the present invention in a state where a resin sealing step has been completed;
【図３】この発明の実施の形態のリードフレームの製造
方法を示す工程断面図である。FIG. 3 is a process sectional view illustrating the method for manufacturing the lead frame according to the embodiment of the present invention;
【図４】図１に示した半導体装置を配線基板に実装した
状態を示す断面図である。FIG. 4 is a cross-sectional view showing a state where the semiconductor device shown in FIG. 1 is mounted on a wiring board.
【図５】従来の半導体装置の断面図である。FIG. 5 is a sectional view of a conventional semiconductor device.
【図６】図５に示した半導体装置におけるリードフレー
ムの断面図である。6 is a sectional view of a lead frame in the semiconductor device shown in FIG.
【図７】図６に示したリードフレームの製造工程を示す
断面図である。FIG. 7 is a sectional view showing a manufacturing process of the lead frame shown in FIG. 6;
【図８】従来の半導体装置を配線基板に実装した状態を
示す断面図である。FIG. 8 is a cross-sectional view showing a state where a conventional semiconductor device is mounted on a wiring board.
１ 基材 ２ 金属膜 ３ 金線 ４ 半導体チップ ５ 樹脂パッケージ ６ レジスト膜 ７ 段差部 ８ 半田 ９ 配線基板 １１ 段差部 ２０ 樹脂突起 ２１ 凹部 REFERENCE SIGNS LIST 1 base material 2 metal film 3 gold wire 4 semiconductor chip 5 resin package 6 resist film 7 step 8 solder 9 wiring board 11 step 20 resin protrusion 21 recess
Claims (3)
る樹脂パッケージと、この樹脂パッケージの実装側端面
から裏面にかけて設けた段差部と、この段差部に沿って
設けられた金属膜と、前記半導体素子上の電極パッドと
前記金属膜とを電気的に接続する接続手段とを備えた半
導体装置。A semiconductor device, a resin package for encapsulating the semiconductor device, a step provided from an end surface on a mounting side of the resin package to a back surface, a metal film provided along the step, and A semiconductor device comprising: connection means for electrically connecting an electrode pad on a semiconductor element to the metal film.
に用いるリードフレームであって、段差部を設けた基材
と、前記段差部の表面に形成した金属膜とを備えたリー
ドフレーム。2. A lead frame for use in manufacturing the semiconductor device according to claim 1, comprising: a base member provided with a step portion; and a metal film formed on a surface of the step portion.
法であって、基材の表面に金属膜を形成する金属膜形成
工程と、前記金属膜に対応する基材の位置に段差部を設
けるプレス加工工程とを含むリードフレームの製造方
法。3. The method for manufacturing a lead frame according to claim 2, wherein a metal film forming step of forming a metal film on a surface of the base material, and a step portion is provided at a position of the base material corresponding to the metal film. A method for manufacturing a lead frame including a pressing step.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35740897A JPH11186467A (en) | 1997-12-25 | 1997-12-25 | Semiconductor device, lead frame used at manufacturing the device, and manufacture of lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35740897A JPH11186467A (en) | 1997-12-25 | 1997-12-25 | Semiconductor device, lead frame used at manufacturing the device, and manufacture of lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11186467A true JPH11186467A (en) | 1999-07-09 |
Family
ID=18453975
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP35740897A Pending JPH11186467A (en) | 1997-12-25 | 1997-12-25 | Semiconductor device, lead frame used at manufacturing the device, and manufacture of lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11186467A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004207275A (en) * | 2002-12-20 | 2004-07-22 | Sanyo Electric Co Ltd | Circuit device and its manufacturing method |
| WO2009081494A1 (en) * | 2007-12-26 | 2009-07-02 | Renesas Technology Corp. | Semiconductor device and manufacturing method thereof |
| JP2013038221A (en) * | 2011-08-08 | 2013-02-21 | Citizen Holdings Co Ltd | Light emitting device |
| JP2019057587A (en) * | 2017-09-20 | 2019-04-11 | 大口マテリアル株式会社 | Substrate for mounting semiconductor element thereon and method of manufacturing the same |
-
1997
- 1997-12-25 JP JP35740897A patent/JPH11186467A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004207275A (en) * | 2002-12-20 | 2004-07-22 | Sanyo Electric Co Ltd | Circuit device and its manufacturing method |
| WO2009081494A1 (en) * | 2007-12-26 | 2009-07-02 | Renesas Technology Corp. | Semiconductor device and manufacturing method thereof |
| JP2013038221A (en) * | 2011-08-08 | 2013-02-21 | Citizen Holdings Co Ltd | Light emitting device |
| JP2019057587A (en) * | 2017-09-20 | 2019-04-11 | 大口マテリアル株式会社 | Substrate for mounting semiconductor element thereon and method of manufacturing the same |
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