JPH10335577A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make a semiconductor device in which a second LSI chip is face- down bonded to the upper surface of a first LSI chip efficiently radiate the heat generated from the second LSI chip. SOLUTION: A second LSI chip 120 is face-down bonded to the upper surface of a first LSI chip 110 having external electrodes 112 in its peripheral edge section and a die pad 131 is fixed to the lower surface of the chip 110. The external electrodes 112 of the chip 110 are connected to inner leads 133 through bonding wires 134. A resin package 135 seals the first and second LSI chips 110 and 120, die pad 131, and inner leads 133 so that the upper surface of the chip 120 and lower surface of the die pad 131 may be exposed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a first semiconductor chip having an LSI formed on a main surface and a second semiconductor chip are joined by a face-down bonding method and a method of manufacturing the same. .

[0002]

2. Description of the Related Art In recent years, in order to reduce the cost and size of semiconductor integrated circuit devices, for example, LSIs having different functions have been developed.
Alternatively, there has been proposed a semiconductor device in which a first LSI chip and a second LSI chip on which an LSI formed by a different process is formed are bonded by a face-down bonding method.

A semiconductor device in which two LSI chips are bonded by a face-down bonding method and a method of manufacturing the same, as described in, for example, Japanese Patent Application Laid-Open No. 2-15660, will be described below with reference to FIG.

As shown in FIG. 9, a first LSI chip 1
0, an internal electrode 11 and an external electrode 12 are formed on the main surface on which the first LSI is formed.
Bumps 14 are formed on the main surface of the second LSI chip 13 on which the second LSI is formed, and the first LSI chip 13 is connected to the internal electrodes 11 and the bumps 14.
The SI chip 10 and the second LSI chip 13 are joined by a face-down bonding method. In this case, the first LSI chip 10 and the second LSI chip 13
Is filled with an insulating resin 15. The first LSI chip 10 is a die pad 1 of a lead frame.
6 with solder 17 and the first L
The external electrodes 12 of the SI chip 10 and the inner leads 18 of the lead frame are electrically connected by bonding wires 19. First LSI chip 10, second LSI chip 13, die pad 16, inner lead 1
8 and the bonding wires 19 are sealed by a resin package 20.

The conventional semiconductor device is manufactured as follows.

First, an insulating resin 1 is placed at the center on the first LSI chip 10 where the outer electrode 12 is formed on the periphery.
5 is applied, the second LSI chip 13 is placed in the first LS
The first LSI chip and the second LSI chip are joined in a state where the internal electrodes 11 of the first LSI chip 10 and the bumps 14 of the second LSI chip 13 are connected by being pressed against the I chip 10. .

Next, the external electrodes 12 of the first LSI chip 10 and the inner leads 18 are connected to the bonding wires 19.
After connecting the first LSI chip 10 and the second
SI chip 13, die pad 16, inner lead 18
Then, the bonding wire 19 is sealed with the resin package 20.

[0008]

By the way, the first LS
In a semiconductor device in which the I chip 10 and the second LSI chip 13 are bonded by the face-down bonding method, the thermal conductivity of the insulating resin 15 and the resin package 20 is low, so that the main component of the second LSI chip 13 After the heat generated from the first LSI formed on the surface is transmitted to the first LSI chip 10 via the bumps 14,
The light is transmitted to the die pad 16 and then emitted to the outside from the inner lead 18 integrated with the die pad 16. Since the total cross-sectional area of the bump 14 is considerably smaller than the area of the second LSI chip 13, Dissipation of heat generated in the second LSI chip 13 via the bumps 14 is not sufficient.

For this reason, in the LSI formed on the main surface of the second LSI chip 13, the problem that the diode characteristics of the pn junction deteriorates, the problem that the transistor characteristics deteriorate due to the increase in the resistance of the metal wiring, and the like. Occurs. In particular, when the power consumption of the LSI formed on the main surface of the second LSI chip 13 is large, the above-described problem becomes conspicuous.

Further, in the above-mentioned conventional method for manufacturing a semiconductor device, the first LS having an outer electrode 12 formed on a peripheral portion thereof is provided.
After the insulating resin 15 is applied to the center of the I chip 10, the second LSI chip 13 is connected to the first LSI chip 10.
To join the first LSI chip 10 and the second LSI chip 13, and at this time, the insulating resin 15
Is attached to the external electrodes 12 of the LSI chip 10 of FIG.
Electrode 12 and inner lead 1 of LSI chip 10
8 cannot be joined by the bonding wire 19.

Therefore, in the conventional semiconductor device, the insulating resin 15 is formed on the external electrode 12 of the first LSI chip 10.
The external dimensions of the second LSI chip 13 are made considerably smaller than the internal dimensions of the external electrodes 12 of the first LSI chip 10 so as not to adhere to the external electrodes 12. That is, the second LSI
The size of the chip 13 is sufficiently smaller than the size of the first LSI chip 10, for example, the second LSI chip 13
Is made smaller by about 2 mm than the length of one side of the first LSI chip 10. Therefore, the second L
There is a problem that the degree of integration of the SI chip 13 and, consequently, the degree of integration of the LSI module composed of the first LSI chip 10 and the second LSI chip 13 is restricted.

In view of the above, the present invention provides a semiconductor device in which a second LSI chip is bonded on a first LSI chip by a face-down bonding method to efficiently remove heat generated in the second LSI chip. A first object is to be able to dissipate, and a second object is to improve the degree of integration of the second LSI chip.

[0013]

A first semiconductor device according to the present invention is bonded to a first LSI chip having an external electrode on a peripheral portion by a face-down bonding method on the first LSI chip. A second LSI chip, a die pad provided on the lower surface of the first LSI chip, inner leads electrically connected to external electrodes of the first LSI chip, a first LSI chip, a second LSI chip, A resin package that seals the chip, the die pad, and the inner lead such that at least a central portion of an upper surface of the second LSI chip and a lower surface of the die pad are respectively exposed;

According to the first semiconductor device, since the resin package is sealed so that at least the central portion of the upper surface of the second LSI chip is exposed, it is formed on the main surface of the second LSI chip. The heat generated from the LSI is dissipated from a region of the upper surface of the second LSI chip which is exposed to the resin package, and the resin package is sealed so that at least a central portion of the lower surface of the die pad is exposed. The heat generated from the LSI formed on the main surface of the first LSI chip is dissipated from a region of the lower surface of the die pad exposed to the resin package.

In the first semiconductor device, the resin package exposes the first LSI chip, the second LSI chip, the die pad, and the inner lead over the entire surface of the upper surface of the second LSI chip and the lower surface of the die pad. It is preferable to perform sealing.

It is preferable that the first semiconductor device further includes a radiator provided in a region of the upper surface of the second LSI chip which is exposed from the resin package.

A second semiconductor device according to the present invention comprises: a first LSI chip having external electrodes on a peripheral portion;
A second LSI chip bonded to the I chip by a face-down bonding method, inner leads electrically connected to external electrodes of the first LSI chip, a first LSI chip, and a second LSI chip And a resin package that seals the inner leads so that at least the central portions of the upper surface of the second LSI chip and the lower surface of the first LSI chip are exposed.

According to the second semiconductor device, since the resin package is sealed so that at least the central portion of the upper surface of the second LSI chip is exposed, it is formed on the main surface of the second LSI chip. Heat generated from the LSI is dissipated from a region of the upper surface of the second LSI chip exposed to the resin package, and the resin package is sealed so that at least a central portion of the lower surface of the first semiconductor chip is exposed. Therefore, heat generated from the LSI formed on the main surface of the first LSI chip is dissipated from a region of the lower surface of the first LSI chip exposed to the resin package.

In the second semiconductor device, the resin package includes the first LSI chip, the second LSI chip, and the inner leads, and the upper surface of the second LSI chip and the lower surface of the first LSI chip cover the entire surface, respectively. It is preferable to seal so as to be exposed.

It is preferable that the second semiconductor device further includes a heat radiator provided in a region of the upper surface of the second LSI chip which is exposed from the resin package.

A third semiconductor device according to the present invention includes a first LSI chip having an external electrode on a peripheral portion and a first LSI chip.
A second LSI chip bonded to the I chip by a face-down bonding method, a bonding wire connected to an external electrode of the first LSI chip, and between the first LSI chip and the second LSI chip The first L
An insulating resin filled so as to entirely cover each main surface of the SI chip and the second LSI chip, and a resin package sealing the first LSI chip and the second LSI chip are provided. Therefore, the Young's modulus of the insulating resin is smaller than the Young's modulus of the resin constituting the resin package.

According to the third semiconductor device, the first LSI
An insulating resin is interposed between the chip and the second LSI chip so as to entirely cover each main surface of the first LSI chip and the second LSI chip, and the Young's modulus of the insulating resin is Is smaller than the Young's modulus of the resin that constitutes the resin package, so that the main surfaces of the first LSI chip and the second LSI chip are entirely covered with the resin having a small Young's modulus.

Conventionally, the first metal wiring extending to between the external electrodes of the first LSI chip is not affected by the thermal stress of the resin constituting the resin package.
It was necessary to cover the main surface of the LSI chip with a polyimide film or the like in advance, but according to the third semiconductor device, the first L
Since each main surface of the SI chip and the second LSI chip is entirely covered with an insulating resin having a small Young's modulus, that is, a small thermal stress, a sealing resin having a large Young's modulus is used for the first LSI chip and the second LSI chip. A situation in which each main surface of the second LSI chip is contacted can be avoided.

A first method of manufacturing a semiconductor device according to the present invention comprises the steps of: bonding a second LSI chip onto a first LSI chip having external electrodes on a peripheral portion by a face-down bonding method; Fixing a die pad to the lower surface of the LSI chip, electrically connecting external electrodes of the first LSI chip to inner leads,
The first LSI chip, the second LSI chip, the die pad, and the inner leads are formed in a second package using a resin package.
And sealing at least the central portion of the upper surface of the SI chip and the lower surface of the die pad.

According to the first method for manufacturing a semiconductor device, the first LSI chip, the second LSI chip, the die pad, and the inner lead are packaged in the second LS
Since the semiconductor device is provided with a step of sealing so that at least the central portion of the upper surface of the I chip and the lower surface of the die pad are exposed, at least the central portion of the upper surface of the second LSI chip and the lower surface of the die pad are obtained. Are each exposed.

A second method of manufacturing a semiconductor device according to the present invention comprises the steps of: bonding a second LSI chip to a first LSI chip having external electrodes on a peripheral portion by a face-down bonding method; Fixing a die pad to the lower surface of the LSI chip, electrically connecting external electrodes of the first LSI chip to inner leads,
A step of completely sealing the first LSI chip, the second LSI chip, the die pad, and the inner lead with a resin package; and polishing the resin package to form a second LSI chip.
Exposing the upper surface of the chip and the lower surface of the die pad over the entire surface, respectively.

According to the second method for manufacturing a semiconductor device, the first LSI chip, the second LSI chip, the die pad, and the inner lead are completely sealed with a resin package, and then the resin package is polished to form the second LSI chip. In the resulting semiconductor device, the upper surface of the second LSI chip and the lower surface of the die pad are exposed over the entire surface, respectively. ing.

In a third method of manufacturing a semiconductor device according to the present invention, a step of bonding a second LSI chip on a first LSI chip having external electrodes on a peripheral portion by a face-down bonding method; Electrically connecting the external electrodes of the LSI chip to the inner leads,
Sealing the LSI chip, the second LSI chip, and the inner leads with a resin package such that at least the central part of the upper surface of the second LSI chip and the lower surface of the first LSI chip are exposed, respectively. I have.

According to the third method of manufacturing a semiconductor device, the first LSI chip, the second LSI chip, and the inner leads are packaged in a resin package at least on the upper surface of the second LSI chip and the lower surface of the first LSI chip. Since a sealing step is provided so that the central portions are exposed, at least the central portions of the upper surface of the second LSI chip and the lower surface of the first LSI chip are exposed in the obtained semiconductor device. .

A fourth method of manufacturing a semiconductor device according to the present invention comprises the steps of: bonding a second LSI chip to a first LSI chip having external electrodes on a peripheral portion by a face-down bonding method; Electrically connecting the external electrodes of the LSI chip to the inner leads,
Encapsulating the entire LSI chip, the second LSI chip and the inner leads with a resin package, and polishing the resin package so that the upper surface of the second LSI chip and the lower surface of the first LSI are respectively Exposing over the entire surface.

According to the fourth method of manufacturing a semiconductor device, after the first LSI chip, the second LSI chip, and the inner leads are completely sealed with a resin package, the resin package is polished to form the second LSI chip. Since the method includes a step of exposing the upper surface of the LSI chip and the lower surface of the first LSI over the entire surface, in the obtained semiconductor device, the upper surface of the second LSI chip and the lower surface of the first LSI are respectively formed over the entire surface. Exposed.

In a fifth method of manufacturing a semiconductor device according to the present invention, there is provided a wire connecting step of connecting a bonding wire to an external electrode of a first LSI chip having an external electrode on a peripheral portion, and connecting a bonding wire to the external electrode. The first LSI chip and the second LSI chip are bonded by a face-down bonding method, and the first LSI chip is
A module forming step of filling an insulating resin between the chip and the second LSI chip to form an LSI module including the first LSI chip and the second LSI chip, and sealing the LSI module in a semiconductor package And a sealing step.

According to the fifth method of manufacturing a semiconductor device, an insulating resin is filled between the first LSI chip and the second LSI chip after bonding wires are connected to external electrodes of the first LSI chip. Therefore, the insulating resin may spread so as to cover the connection between the external electrode and the bonding wire.
The second is to the extent that it is located inside the external electrode of the SI chip.
LSI chip can be increased in size.

In the fifth method of manufacturing a semiconductor device, the module forming step includes a step of filling the insulating resin so that each main surface of the first LSI chip and the second LSI chip is completely covered. The sealing step includes a step of resin-sealing the LSI module into a semiconductor package made of a resin package, and the Young's modulus of the insulating resin in the module forming step is smaller than the Young's modulus of the resin constituting the resin package in the sealing step. Is also preferably small.

[0035]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) Hereinafter, a semiconductor device and a manufacturing method according to a first embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to (c) and FIGS. 2 (a) and 2 (b).

First, as shown in FIG. 1A, a first LSI chip 110 and a second LSI chip 120 having LSIs having different functions or LSIs formed by different processes are manufactured. . In this case, the first LSI chip 110 and the second LSI chip 1
20 is, for example, an LS comprising a memory such as a DRAM.
I and a logic LSI such as a microcomputer, a combination of different logic LSIs, a combination of an LSI formed on a compound semiconductor substrate and an LSI formed on a silicon substrate, and the like. Large-area LSI chips formed by a single process are divided into two.

A large number of internal electrodes 111 are formed on the main surface of the first LSI chip 110, and external electrodes 112 electrically connected to the internal electrodes 111 are formed on the periphery of the main surface. Have been. An internal electrode (not shown) is formed on a main surface of the second LSI chip 120 at a position corresponding to the internal electrode 111 of the first LSI chip 110, and Au, Cu is formed on the internal electrode. , I
A bump 121 made of n or solder is formed. The size of the bump 121 is about 5 μm to 200 μm. As a method for forming the bump 121, a method in which a metal film is deposited on a wafer, electrolytic plating is performed on the metal film using a photoresist pattern as a mask to form the bump 121, and then the metal film is removed by etching. Alternatively, a method in which a metal film such as Ni—Au is formed on an internal electrode made of aluminum by an electroless plating method, and then the bump 121 is formed on the metal film by transfer or dipping can be adopted. .

Next, an insulating resin 130 made of epoxy, acrylic, polyimide, or the like such as a photo-curing type or a thermosetting type is dispensed to a mounting area of the second LSI chip 120 in the first LSI chip 110 by a dispenser or a dispenser. It is applied by stamping or the like.

Next, as shown in FIG. 1B, the first L
After aligning the internal electrodes 111 of the SI chip 110 with the bumps 121 of the second LSI chip 120, the second LSI chip 120 is mounted on the first LSI chip 110. Thereafter, the pressing tool 140 is lowered to press the second LSI chip 120 against the first LSI chip 110, and to irradiate the insulating resin 130 with light while being pressed by the pressing tool 140. Alternatively, the insulating resin 130 is cured by heating. In this case, when the insulating resin 130 is a thermosetting type, the insulating resin 130 is heated by the heated pressing tool 140, and when the insulating resin 130 is a photo-setting type, the insulating resin 130 is irradiated with ultraviolet light or the like. Is irradiated from the side of the second LSI chip 120.

Next, when the insulating resin 130 is cured, the pressurization by the pressurization tool 140 is released as shown in FIG. By doing so, the first LSI chip 11
Thus, an LSI module is obtained in which the 0 and the second LSI chip 120 are integrated by the insulating resin 130 and the internal electrodes 111 and the bumps 121 are electrically connected. When the insulating resin 130 is of a heat and light curing type, a portion of the insulating resin 130 that has not been irradiated with light is cured at room temperature or by heating.

Next, as shown in FIG. 2A, the lower surface of the first LSI chip 110 of the LSI module is fixed to the die pad 131 of the lead frame using the die bond resin 132. In this case, depressing is performed so that the inner lead 133 of the lead frame is located substantially at the center in the thickness direction of the LSI module, that is, forming is performed so that the die pad 131 is recessed from the inner lead 133. For the lead frame. Thereafter, a bonding wire 1 made of Au or the like is used.
34, the external electrodes 11 of the first LSI chip 110
2 and the inner lead 133 of the lead frame are connected.

Next, as shown in FIG. 2B, the first L
The SI chip 110, the second LSI chip 120, and the die pad 131 are connected to the second L
Resin sealing is performed so that the upper surface of the SI chip and the lower surface of the die pad 131 are exposed from the resin package 135. The resin sealing is performed by a transfer molding method using a mold composed of an upper mold and a lower mold. The height of the cavity formed by the upper mold and the lower mold is set to the first LSI chip 110,
By setting the total thickness of the second LSI chip 120 and the die pad 131, the second LSI chip 1
20 and the lower surface of the die pad 131 can be exposed from the resin package 135. Thereafter, when the outer leads 136 of the lead frame are bent and formed, the semiconductor device according to the first embodiment is obtained.

According to the semiconductor device of the first embodiment, since the upper surface of the second LSI chip 120 is exposed from the resin package 135, the second LSI chip 120
The heat generated on the main surface of the second LSI chip 120 is efficiently dissipated from the upper surface of the second LSI chip 120.

The thickness of the resin package 135 is equal to the total thickness of the first LSI chip 110, the second LSI chip 120, and the die pad 131.
The thickness of the semiconductor device in which the SI chip is integrated by the face-down bonding method can be reduced. For example, the first LSI chip 110 and the second LS
Assuming that the thickness of the I chip 120 is 0.3 mm and the thickness of the die pad 131 is 0.15 mm, the bump 12
1 is about 10 μm and the thickness of the die bond resin 132 is about 20 to 30 μm, so that an ultra-thin resin package 135 having a thickness of about 0.8 mm can be obtained.

Accordingly, it is possible to reduce the size, thickness, and weight of terminal devices, such as mobile communication devices and portable information devices, on which the semiconductor device according to the first embodiment is mounted.

(Second Embodiment) FIG. 3 shows a semiconductor device according to a second embodiment of the present invention. In the second embodiment, the same members as those in the first embodiment are the same. The description is omitted by attaching the reference numerals.

As a feature of the second embodiment, the resin package 135 covers the periphery of the upper surface of the second LSI chip 120, and the second LSI chip 120 covers the resin package 135 in a region other than the periphery on the upper surface. It is exposed from.

According to the semiconductor device of the second embodiment, the resin package 135 is connected to the second LSI chip 120.
Since the structure covers the peripheral portion of the upper surface of the second LSI chip 120, the fluidity of the resin for forming the resin package 135 is improved on the upper surface of the second LSI chip 120 in the cavity, so that a good resin package 135 is obtained. .

(Third Embodiment) Hereinafter, a semiconductor device according to a third embodiment of the present invention and a first method of manufacturing the semiconductor device will be described with reference to FIGS. 4 (a) to 4 (c). I do.

First, as in the first embodiment, a first LSI chip 110 and a second LSI chip 120 having LSIs having different functions or LSIs formed by different processes are manufactured. 1 LS
An insulating resin 130 made of a photo-curing or thermosetting epoxy, acrylic, polyimide, or the like is applied to a mounting area of the second LSI chip 120 in the I chip 110 by a dispenser, stamping, or the like. Next, the internal electrode 111 of the first LSI chip 110 and the second electrode
After aligning the bumps 121 of the LSI chip 120 with the second LSI chip 120, the second LSI chip 120 is mounted on the first LSI chip 110.
0 is pressed against the first LSI chip 110, and the insulating resin 130 is irradiated with light or heated to cure the insulating resin 130, and the first resin as shown in FIG. LSI chip 110 and second LSI chip 1
20 is integrated with an insulating resin 130, and an LSI module in which the internal electrodes 111 and the bumps 121 are electrically connected is obtained.

Next, as shown in FIG.
Planar shape slightly larger than SI module 110 and first
A wire bonding stage 141 having a storage recess 141a having the same depth as that of the LSI chip 110 and a vacuum suction hole 141b provided at the center of the storage recess 141a is prepared. The LSI module is housed in the housing recess 141a, and the first LSI chip 110 is evacuated from the vacuum suction hole 141b to fix the first LSI chip 110 to the wire bonding stage 141.

Next, the wire bonding stage 14
After the inner lead 133 and the outer lead 136 of the lead frame having no die pad are placed on the peripheral edge of the lead frame 1, the inner lead 133 of the lead frame is placed.
And the external electrodes 112 of the first LSI chip 110 are connected by bonding wires 134. The first LSI chip 110 is not fixed to the die pad of the lead frame, but is held by the wire bonding stage 141, so that the wire bonding step can be reliably performed.

Next, the first LSI chip 110 and the second
LSI chip 120 by resin package 135
Resin sealing is performed so that the upper surface of the second LSI chip and the lower surface of the first LSI chip are exposed from the resin package 135. In this case, the height of the cavity formed by the upper die and the lower die is determined by the first LSI chip 110 and the second LS
By setting the total thickness of the I chip 120,
The upper surface of the second LSI chip 120 and the lower surface of the first LSI chip 110 can be exposed from the resin package 135. The inner lead 1 of the lead frame
33 and the external electrodes 112 of the first LSI chip 110 are connected by bonding wires 134,
Stage 14 for wire bonding LSI module
When moving from 1 to a mold composed of an upper mold and a lower mold, there is no possibility that the LSI module and the lead frame are separated. Thereafter, when the outer leads 136 of the lead frame are bent and formed, a semiconductor device according to the third embodiment as shown in FIG. 4C is obtained.

According to the semiconductor device of the third embodiment, the upper surface of the second LSI chip 120 and the first LSI
Since the lower surface of the chip 110 is exposed from the resin package 135, the first LSI chip 110 and the second LS
The heat generated in the I chip 120 is the first LSI chip 1
10 and the upper surface of the second LSI chip 120, respectively.

The thickness of the resin package 135 depends on the first LSI chip 110 and the second LSI chip 120.
Therefore, the thickness of a semiconductor device in which two LSI chips are integrated by a face-down bonding method can be reduced. For example, if the thickness of each of the first LSI chip 110 and the second LSI chip 120 is 0.3 mm, the bump 121
Is small, so that an ultra-thin resin package 135 having a thickness of about 0.6 mm can be obtained.

Hereinafter, a second method for manufacturing a semiconductor device according to the third embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to FIG.

In the same manner as in the first manufacturing method, the first LS
The I chip 110 and the second LSI chip 120 are integrated by an insulating resin 130, and the internal electrodes 1
LSI electrically connected to the bump 11 and the bump 121
After obtaining the module, as shown in FIG.
Is sealed with a resin package 135 so that the LSI chip 110 and the second LSI chip 120 are completely covered without being exposed.

Next, the upper surface and the lower surface of the resin package 135 are mechanically polished, respectively, so that the upper surface and the first LSI chip of the second LSI chip 120 are formed as shown in FIG.
After exposing the lower surface of the chip 110 from the resin package 135 and bending and forming the outer leads 136 of the lead frame, a semiconductor device according to the third embodiment as shown in FIG. 5C is obtained.

According to the second manufacturing method, even if the thickness of the LSI module is small and the height of the cavity is small, the fluidity of the resin in the cavity may be reduced. Obtainable.

(Fourth Embodiment) Hereinafter, a semiconductor device according to a fourth embodiment of the present invention will be described with reference to FIG.

The semiconductor device according to the fourth embodiment has the first
A radiator 137 is fixed to the upper surface of the second LSI chip 120 in the semiconductor device according to the embodiment by a heat conductive resin 138. The structure of the heat radiator 137 may be a structure in which a plurality of concave grooves extending parallel to each other are formed, or a structure in which a large number of concave portions are arranged in a matrix.

(Fifth Embodiment) Hereinafter, a semiconductor device according to a fifth embodiment of the present invention will be described with reference to FIG.

The semiconductor device according to the fifth embodiment is similar to the semiconductor device according to the third embodiment.
A radiator 137 is fixed to the upper surface of the second LSI chip 120 in the semiconductor device according to the embodiment by a heat conductive resin 138.

According to the semiconductor device of the fourth or fifth embodiment, the radiator 1 is provided on the upper surface of the second LSI chip 120.
Since the second LSI chip 37 is fixed, even when the power consumption of the second LSI chip is large and the amount of heat generated in the second LSI chip 120 is large, the heat generated in the second LSI chip 120 is efficiently radiated from the radiator 137. Is done. In this case, since the heat radiator 137 is fixed on the upper surface of the second LSI chip 120, that is, the heat radiator 137 is fixed on the side opposite to the direction in which the outer leads 136 extend.
When the semiconductor device according to the fourth or fifth embodiment is mounted on a printed circuit board or the like, heat is radiated to the opposite side of the printed circuit board or the like, so that heat radiation is extremely good.

Therefore, according to the semiconductor device according to the fourth or fifth embodiment, a package having a small thermal resistance can be obtained, so that it can be applied to a high-speed and highly integrated microprocessor or the like. A low-cost, high-performance LSI can be obtained.

(Sixth Embodiment) Hereinafter, a semiconductor device and a manufacturing method according to a sixth embodiment of the present invention will be described with reference to FIG.
This will be described with reference to (a) to (c).

First, as shown in FIGS. 8A and 8B,
A first LSI chip 110 and a second LSI chip 120 having LSIs having different functions or LSIs formed by different processes are manufactured in advance.
A large number of internal electrodes 111 are formed on the main surface of the first LSI chip 110, and external electrodes 112 electrically connected to the internal electrodes 111 are formed on a peripheral portion on the main surface. . Also, the internal electrodes 111 of the first LSI chip 110 on the main surface of the second LSI chip 120
Is formed at a portion corresponding to the above, and a bump 121 made of Au, Cu, solder, or the like is formed on the internal electrode 122.

Next, as shown in FIG. 8A, the first L
Insert the SI chip 110 into the die pad 131 of the lead frame.
Is fixed using a die bond resin 132. in this case,
As in the first embodiment, depressing is performed so that the inner lead 133 of the lead frame is located substantially at the center in the thickness direction of the LSI module, that is, forming processing in which the die pad 131 is recessed from the inner lead 133. Is applied to the lead frame using a mold in advance. Thereafter, a bonding wire 13 made of Au or the like is used.
4, the external electrodes 112 of the first LSI chip 110
And the inner lead 133 of the lead frame.

Next, as shown in FIG. 8B, the first L
After applying an insulating resin 130 made of a photo-curing type or a thermosetting type epoxy-based, acrylic-based, polyimide or the like to a mounting area of the second LSI chip 120 in the SI chip 110 by a dispenser or stamping,
The internal electrode 111 of the first LSI chip 110 and the second L
The bumps 121 of the SI chip 120 are aligned.

Next, as shown in FIG. 8C, the first L
After placing the second LSI chip 120 on the SI chip 110, the pressing tool 140 is lowered and the second LS
The I chip 120 is pressed against the first LSI chip 110. In this case, the insulating resin 130 is formed of the second LSI
It extends to cover the side surface of the chip 120 and to cover the joint between the external electrode 112 of the first LSI chip 110 and the bonding wire 134. Then, the pressing tool 14
In a state where the second LSI chip 120 is pressed by 0,
The insulating resin 130 is irradiated with light or heated to cure the insulating resin 130.

Note that the first LSI chip 110 and the second
Insulating resin 130 filled between SI chip 120
Is preferably smaller than the Young's modulus of the resin constituting the resin package 135 described later. By doing so, the first LSI chip 110 and the second LS
Thermal stress applied to the main surface of I chip 120 is reduced.

Next, when the insulating resin 130 is cured, the pressurization by the pressurization tool 140 is released as shown in FIG. By doing so, the first LSI chip 11
Thus, an LSI module is obtained in which the 0 and the second LSI chip 120 are integrated by the insulating resin 130 and the internal electrodes 111 and the bumps 121 are electrically connected. When the insulating resin 130 is of a heat and light curing type, a portion of the insulating resin 130 that has not been irradiated with light is cured at room temperature or by heating.

Next, the first LSI chip 110, the second LSI chip 120, and the die pad 131 are sealed with a resin package 135. Thereafter, when the outer leads 136 of the lead frame are bent and formed,
The semiconductor device according to the embodiment is obtained.

According to the semiconductor device of the sixth embodiment, the joint between the external electrode 112 of the first LSI chip 110 and the bonding wire 134 is covered with the insulating resin 130 having a small Young's modulus. , First
Since the main surfaces of the first LSI chip 110 and the second LSI chip 120 are entirely covered with a resin having a small Young's modulus, the first LSI chip 110 and the second
Since the sealing resin having a large thermal stress for sealing the LSI module including the I chip 120 does not contact the main surfaces of the first LSI chip 110 and the second LSI chip 120,
First LSI chip 110 and second LSI chip 12
It is possible to prevent a situation in which the aluminum wiring formed on the main surface of No. 0 causes a positional shift.

The method of manufacturing a semiconductor device according to the sixth embodiment is similar to the method of manufacturing the semiconductor device according to the sixth embodiment, except that
2 and the inner lead 133 are connected to the bonding wire 13.
4, the internal electrodes 111 of the first LSI chip 110 and the bumps 12 of the second LSI chip 120 are connected.
1, the size of the second LSI chip 120 and the outer shape of the second LSI chip 120 are different from those of the first LSI chip.
Since the size can be increased to a level near the external electrodes 112 of the chip 110, the integration degree of the LSI module can be improved. For example, the second LSI chip 12
0 is the external electrode 112 of the first LSI chip 110
, The length of one side of the second LSI chip 120 is one of that of the first LSI chip 110.
The size of the second LSI chip 120 can be increased to the extent that it becomes smaller by about 0.2 mm than the length of the side. For example, the size of the first LSI chip is 6.0 m
Assuming that the size is m square, the size of the second LSI chip is
In contrast to the conventional 4.0 mm square, the sixth embodiment can be 5.8 mm square, and the area ratio is twice or more.

In the first to fifth embodiments, the first LSI chip 110 and the second LSI chip 120 are joined when both are in a chip state. After joining the chipped second LSI chip 110 on the first LSI chip 110, the wafer on which the first LSI chip 110 is formed may be diced to obtain an LSI module. .

In the first to sixth embodiments,
While bringing the internal electrode 111 and the bump 121 into contact with each other,
First LSI chip 110 and second LSI chip 120
And a micro-bump bonding method in which the bumps 121 are formed by an insulating resin 130. Instead, the bumps 121 are formed by a solder material and the internal electrodes 111 are formed.
After bonding the bumps 121 to the first LSI chip 110 and the second LSI chip 120, an insulating resin may be filled.

In the first to sixth embodiments,
The bump 12 is formed on the internal electrode of the second LSI chip 120.
1 was formed, but instead of this, the first LSI chip 1
The bumps 121 may be formed on the ten internal electrodes 111.

In the first to sixth embodiments,
One second L on one first LSI chip 110
Although the SI chip 120 is mounted, a plurality of LSI chips 1 are mounted on one first LSI chip 110 instead.
20 may be placed.

Further, in the sixth embodiment, the first
The external electrodes 112 of the LSI chip 110 and the inner leads 133 are connected by bonding wires 134, and the LSI module including the first LSI chip 110 and the second LSI chip 120 is connected to the resin package 13.
5, but instead of this, an LSI module including the first LSI chip 110 and the second LSI chip 120 is housed in a ceramic package, and the outside of the first LSI chip 110 Electrode 1
A structure (BGA) in which the electrodes 12 and the electrodes of the ceramic package are connected by bonding wires 134 may be used.

[0081]

According to the first semiconductor device, the second LS
The heat generated from the LSI formed on the main surface of the I chip is dissipated from the region of the upper surface of the second LSI chip that is exposed to the resin package, and the LSI formed on the main surface of the first LSI chip. Generated from the semiconductor device is dissipated from a region of the lower surface of the die pad exposed to the resin package, so that in the LSIs formed on the first and second LSI chips, the diode characteristics of the pn junction deteriorate, The problem that the resistance of the wiring is increased and the transistor characteristics are degraded can be avoided.

In the first semiconductor device, the second LSI
If the upper surface of the chip and the lower surface of the die pad are respectively exposed from the resin package over the entire surface, the first and second
The heat generated from the LSI formed on the LSI chip is reliably dissipated and the resin package is
Since the upper surface of the SI chip and the lower surface of the die pad are not covered, the thickness of the resin package is reduced, so that a thin package structure can be realized.

In the first semiconductor device, the second LSI
If the heat radiator is provided in a region of the upper surface of the chip that is exposed from the resin package, the heat generated from the LSI formed on the second LSI chip can be more reliably dissipated.

According to the second semiconductor device, the second LSI
The heat generated from the LSI formed on the main surface of the chip is dissipated from the region exposed on the resin package on the upper surface of the second LSI chip, and the heat generated from the LSI formed on the main surface of the first LSI chip is reduced. The heat generated is the first LS
Dissipated from the area exposed to the resin package on the lower surface of the I chip, so that in the LSIs formed on the first and second LSI chips, the diode characteristics of the pn junction deteriorate and the resistance of the metal wiring decreases. It is possible to avoid the problem that the transistor characteristics become large and the transistor characteristics deteriorate.

In the second semiconductor device, the second LSI
If the upper surface of the chip and the lower surface of the first LSI chip are entirely exposed from the resin package,
And the heat generated from the LSI formed on the second LSI chip is reliably dissipated, and the resin package does not cover the upper surface of the second LSI chip and the lower surface of the first LSI chip. Since the thickness of the package becomes small, a thin package structure can be realized.

In the second semiconductor device, the second LSI
If the heat radiator is provided in a region of the upper surface of the chip that is exposed from the resin package, the heat generated from the LSI formed on the second LSI chip can be more reliably dissipated.

According to the third semiconductor device, the first LSI
Since the main surfaces of the chip and the second LSI chip are entirely covered with an insulating resin having a small Young's modulus, that is, a small thermal stress, the sealing resin having a large Young's modulus, that is, a large thermal stress is used as the first resin. LSI chip and second LSI
Since it is possible to avoid contact with each main surface of the chip, the first
The step of previously covering the main surface of the LSI chip with a polyimide film or the like can be omitted.

According to the first method for manufacturing a semiconductor device, the first LSI chip, the second LSI chip, the die pad, and the inner lead are packaged in the second LS
Since the sealing is performed so that at least the central portion of the upper surface of the I chip and the lower surface of the die pad are exposed, at least the central portion of the upper surface of the second LSI chip and the lower surface of the die pad are exposed in the obtained semiconductor device. Therefore, the LS formed on the first and second LSI chips
The heat generated from I is reliably dissipated.

According to the second method for manufacturing a semiconductor device, in the obtained semiconductor device, at least the central portions of the upper surface of the second LSI chip and the lower surface of the die pad are exposed, so that the first and second LSI devices are formed. The heat generated from the LSI formed on the chip is reliably dissipated. Also, L
Even when the thickness of the SI module is small and the height of the cavity is small, the fluidity of the resin in the cavity is ensured, so that a good resin package can be obtained.

According to the third method for manufacturing a semiconductor device, the first LSI chip, the second LSI chip, and the inner leads are packaged in a resin package at least on the upper surface of the second LSI chip and the lower surface of the first LSI chip. Since the sealing is performed so that the central portions are exposed, at least the central portions of the upper surface of the second LSI chip and the lower surface of the first LSI chip are exposed in the obtained semiconductor device. L formed on two LSI chips
The heat generated from the SI is reliably dissipated.

According to the fourth method for manufacturing a semiconductor device, in the obtained semiconductor device, the upper surface of the second LSI chip and the central portion of the lower surface of the first LSI chip are exposed. The heat generated from the LSI formed on the second LSI chip is reliably dissipated. Also, LS
Even when the thickness of the I module is small and the height of the cavity is small, the fluidity of the resin in the cavity is ensured, so that a good resin package can be obtained.

According to the fifth method of manufacturing a semiconductor device, the insulating resin filled between the first LSI chip and the second LSI chip spreads so as to cover the connection between the external electrode and the bonding wire. Therefore, the size of the second LSI chip can be increased to such an extent that the outer shape of the second LSI chip is located inside the external electrodes of the first LSI chip, so that the integration degree of the LSI module is improved.

In the fifth method of manufacturing a semiconductor device, the first LSI chip may be provided between the first LSI chip and the second LSI chip.
Is filled with an insulating resin having a Young's modulus smaller than that of the resin constituting the resin package so that the respective main surfaces of the LSI chip and the second LSI chip are completely covered. The sealing resin is the first L
Since it is possible to avoid contact with the main surfaces of the SI chip and the second LSI chip, it is possible to omit the step of previously covering the main surface of the first LSI chip with a polyimide film or the like.

[Brief description of the drawings]

FIGS. 1A to 1C are cross-sectional views illustrating respective steps of a method for manufacturing a semiconductor device according to a first embodiment.

FIGS. 2A and 2B are cross-sectional views illustrating respective steps of a method for manufacturing a semiconductor device according to the first embodiment.

FIG. 3 is a sectional view of a semiconductor device according to a second embodiment.

FIGS. 4A to 4C are cross-sectional views illustrating respective steps of a first method for manufacturing a semiconductor device according to a third embodiment.

FIGS. 5A to 5C are cross-sectional views illustrating respective steps of a second method for manufacturing a semiconductor device according to the third embodiment. FIGS.

FIG. 6 is a sectional view of a semiconductor device according to a fourth embodiment.

FIG. 7 is a sectional view of a semiconductor device according to a fifth embodiment.

FIGS. 8A to 8C are cross-sectional views illustrating respective steps of a method for manufacturing a semiconductor device according to a sixth embodiment.

FIG. 9 is a sectional view showing a conventional semiconductor device.

[Explanation of symbols]

 110 first LSI chip 111 internal electrode 112 external electrode 120 second LSI chip 121 bump 122 internal electrode 130 insulating resin 131 die pad 132 die bond resin 133 inner lead 134 bonding wire 135 resin package 136 outer lead 137 radiator 140 pressure Tool 141 Wire bonding stage 141a Storage recess 141b Vacuum suction hole

Claims (13)

[Claims] 1. A first LSI having an external electrode on a peripheral portion
A chip, a second LSI chip bonded to the first LSI chip by a face-down bonding method, a die pad provided on a lower surface of the first LSI chip, and an outside of the first LSI chip. An inner lead electrically connected to an electrode; the first LSI chip, the second LSI chip, a die pad, and an inner lead; and at least a central portion of an upper surface of the second LSI chip and a lower surface of the die pad. And a resin package which is sealed so as to be exposed. 2. The method according to claim 1, wherein the resin package includes the first LS.
The I chip, the second LSI chip, the die pad, and the inner lead are sealed so that the upper surface of the second LSI chip and the lower surface of the die pad are respectively exposed over the entire surface. 2. The semiconductor device according to 1. 3. The semiconductor device according to claim 1, further comprising a heat radiator provided in a region of the upper surface of said second LSI chip which is exposed from said resin package. 4. A first LSI having an external electrode on a peripheral portion
A chip, a second LSI chip bonded on the first LSI chip by a face-down bonding method, an inner lead electrically connected to an external electrode of the first LSI chip, And a resin package that seals the second LSI chip and the inner lead such that at least the central part of the upper surface of the second LSI chip and the lower surface of the first LSI chip are exposed. A semiconductor device, comprising: 5. The resin package according to claim 1, wherein the first LS is provided.
I chip, second LSI chip and inner lead
5. The semiconductor device according to claim 4, wherein an upper surface of the second LSI chip and a lower surface of the first LSI chip are sealed so as to be exposed over the entire surface. 6. The semiconductor device according to claim 4, further comprising a heat radiator provided in a region of the upper surface of said second LSI chip exposed from said resin package. 7. A first LSI having an external electrode on a peripheral portion
A chip, a second LSI chip bonded to the first LSI chip by face-down bonding, a bonding wire connected to an external electrode of the first LSI chip, and a first LSI chip An insulating resin filled between the first LSI chip and the second LSI chip so as to entirely cover each main surface of the first LSI chip and the second LSI chip; A semiconductor device, comprising: a resin package sealing a second LSI chip, wherein the Young's modulus of the insulating resin is smaller than the Young's modulus of the resin constituting the resin package. 8. A first LSI having an external electrode on a peripheral portion
Bonding a second LSI chip on the chip by face-down bonding, bonding a die pad to the lower surface of the first LSI chip, and connecting external electrodes and inner leads of the first LSI chip to each other. Electrically connecting the first LSI chip, the second LSI chip, the die pad, and the inner lead by a resin package, and exposing at least a central portion of an upper surface of the second LSI chip and a lower surface of the die pad, respectively. A method of manufacturing a semiconductor device. 9. A first LSI having an external electrode on a peripheral portion
Bonding a second LSI chip on the chip by face-down bonding, bonding a die pad to the lower surface of the first LSI chip, and connecting external electrodes and inner leads of the first LSI chip to each other. Electrically connecting; a step of completely sealing the first LSI chip, the second LSI chip, the die pad and the inner lead with a resin package; and a step of polishing the resin package to form the second LSI chip. Exposing the upper surface of the LSI chip and the lower surface of the die pad over the entire surface, respectively. 10. A first LS having an external electrode on a peripheral portion
A step of bonding a second LSI chip on the I chip by a face-down bonding method, a step of electrically connecting external electrodes of the first LSI chip and inner leads, and a step of: The second LSI chip and inner leads are packaged in a resin package by the second LSI chip.
Sealing the chip so that at least the central portion of the upper surface of the chip and the lower surface of the first LSI chip are respectively exposed. 11. A first LS having an external electrode on a peripheral portion
A step of bonding a second LSI chip on the I chip by a face-down bonding method, a step of electrically connecting external electrodes of the first LSI chip and inner leads, and a step of: A step of completely sealing the second LSI chip and the inner leads with a resin package; and a step of polishing the resin package so as to cover the entire upper surface of the second LSI chip and the lower surface of the first LSI. And exposing the semiconductor device to the semiconductor device. 12. A first LS having an external electrode on a peripheral portion.
A wire connection step of connecting a bonding wire to the external electrode of the I chip; and bonding a first LSI chip and a second LSI chip having the bonding wire connected to the external electrode by a face-down bonding method, First L
An insulating resin is filled between the first LSI chip and the second LSI chip between the first LSI chip and the second LSI chip.
A method for manufacturing a semiconductor device, comprising: a module forming step of forming an LSI module composed of an I chip; and a sealing step of sealing the LSI module in a semiconductor package. 13. The module forming step includes a step of filling the insulating resin so that each main surface of the first LSI chip and the second LSI chip is completely covered. Includes a step of resin-sealing the LSI module to the semiconductor package comprising a resin package, wherein the Young's modulus of the insulating resin in the module forming step is smaller than the Young's modulus of the resin constituting the resin package in the sealing step. 13. The device according to claim 12, wherein
13. The method for manufacturing a semiconductor device according to item 5.