JPH10123208A - Lsi test board - Google Patents

Lsi test board

Info

Publication number
JPH10123208A
JPH10123208A JP8281980A JP28198096A JPH10123208A JP H10123208 A JPH10123208 A JP H10123208A JP 8281980 A JP8281980 A JP 8281980A JP 28198096 A JP28198096 A JP 28198096A JP H10123208 A JPH10123208 A JP H10123208A
Authority
JP
Japan
Prior art keywords
test board
board
lsi test
lsi
contact pin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8281980A
Other languages
Japanese (ja)
Inventor
Tadaharu Morioka
忠春 森岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP8281980A priority Critical patent/JPH10123208A/en
Publication of JPH10123208A publication Critical patent/JPH10123208A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce the switching/creation time for an LSI test board by performing switching with a conversion contact pin board only, when switching a kind in the same package. SOLUTION: A test board is composed of a general purpose LSI test board upper part 1, a conversion contact pin board 2, and a general purpose LSI test board lower part 3. The LSI test board upper part 1 is connected to a semiconductor device 8 to be tested. The conversion contact pin board 2 is installed so that it can be electrically connected between the LSI test board upper part 1 and the LSI test board lower part 2 and is made for each kind. The LSI test board lower part 3 is connected to an LSI tester 7. In order to switch to a semiconductor device with different pin arrangement in the same package, the conversion contact pin board 2 and other conversion contact pin board have only to be exchanged, with each other.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、LSIテストボー
ドに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LSI test board.

【0002】[0002]

【従来の技術】従来のLSI半導体デバイスの電気特性
のテストは図8のようにLSIテスター7に接続され
た、LSIテストボード10にテストをする半導体デバ
イス8(ピン配線図は図7)を接続し電気特性をテスト
する。ここで同一パッケージでピン配置の違う半導体デ
バイス9(ピン配線図は図7)をテストする際は、その
品種にあったLSIテストボード11を作成し、品種の
切り替え時にはテストボード自体を交換している。
2. Description of the Related Art In a conventional test of electrical characteristics of an LSI semiconductor device, a semiconductor device 8 (pin wiring diagram is shown in FIG. 7) for testing is connected to an LSI test board 10 connected to an LSI tester 7 as shown in FIG. And test the electrical characteristics. Here, when testing a semiconductor device 9 having a different pin arrangement in the same package (the pin wiring diagram is shown in FIG. 7), an LSI test board 11 suitable for the type is created, and the test board itself is replaced when the type is switched. I have.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記方
法では、テストする品種を切り替えるときや新しい品種
が発生したときにLSIテストボードを交換したり、新
たに作成しなくてはならない。
However, in the above-mentioned method, it is necessary to replace the LSI test board or to newly create an LSI test board when switching the type to be tested or when a new type is generated.

【0004】このため、品種切り替えやテストボード作
成に時間がかかるという欠点を有している。とりわけ、
多ピン品種の場合、特に時間を要する。
[0004] For this reason, there is a drawback that it takes time to switch types and to create a test board. Above all,
In the case of a multi-pin type, it takes a particularly long time.

【0005】本発明は、上記従来の問題点を解決するも
ので、LSIテストボードの切り替え/作成時間を短縮
することを目的とする。
An object of the present invention is to solve the above-mentioned conventional problems and to reduce the time required to switch / create an LSI test board.

【0006】[0006]

【課題を解決するための手段】この目的を達成するため
に本発明のLSIテストボードは、変換コンタクトピン
ボードを用いる。
In order to achieve this object, an LSI test board of the present invention uses a conversion contact pin board.

【0007】[0007]

【発明の実施の形態】以下に本発明の一実施例について
図面を参照しながら説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0008】図1において、LSIテストボードは汎用
LSIテストボード上部1、変換コンタクトピンボード
2、汎用LSIテストボード下部3の3枚より構成され
ている。汎用LSIテストボード上部1はテストする半
導体デバイス8に接続される。
In FIG. 1, the LSI test board is composed of three parts: a general-purpose LSI test board upper part 1, a conversion contact pin board 2, and a general-purpose LSI test board lower part 3. The upper part 1 of the general-purpose LSI test board is connected to a semiconductor device 8 to be tested.

【0009】変換コンタクトピンボード2は汎用LSI
テストボード上部1と汎用LSIテストボード下部3の
間に電気的接続ができるよう設置され各品種ごとに作成
する。汎用LSIテストボード下部3はLSIテスター
7に接続されている。
The conversion contact pin board 2 is a general-purpose LSI
A test board is provided between the upper part 1 of the test board and the lower part 3 of the general-purpose LSI test board so as to be electrically connected, and is prepared for each type. The lower part 3 of the general-purpose LSI test board is connected to an LSI tester 7.

【0010】汎用LSIテストボード上部1の配線は図
2のようになっており、テストされる半導体デバイス8
の各端子の信号線は汎用LSIテストボード上部1上で
水平方向に配置される。
The wiring of the upper part 1 of the general-purpose LSI test board is as shown in FIG.
Are arranged in a horizontal direction on the upper part 1 of the general-purpose LSI test board.

【0011】汎用LSIテストボード下部3の配線は図
4のようになっており、LSIテスター7の各信号線が
汎用LSIテストボード上部1上で垂直方向に配置され
る。すなわち、汎用LSIテストボード上部1と汎用L
SIテストボード下部3の各々の信号線は90度にクロ
スするように配置される。
The wiring of the lower part 3 of the general-purpose LSI test board is as shown in FIG. 4, and each signal line of the LSI tester 7 is vertically arranged on the upper part 1 of the general-purpose LSI test board. That is, the general-purpose LSI test board upper part 1 and the general-purpose L
Each signal line of the lower part 3 of the SI test board is arranged so as to cross 90 degrees.

【0012】変換コンタクトピンボード2は、図3のよ
うになっており、ポゴピン6の抜き取り可能なピンホー
ル5があり、汎用LSIテストボード上部1と汎用LS
Iテストボード下部3で接続したいところにポゴピン6
を挿入することで配線が完了する。変更するときは、ポ
ゴピン6を抜き、別のピンホール5に挿入するだけでよ
い。
The conversion contact pin board 2 is as shown in FIG. 3 and has pinholes 5 from which pogo pins 6 can be extracted.
Pogo pin 6 where you want to connect in the lower part 3 of the I test board
To complete the wiring. When changing, it is only necessary to remove the pogo pin 6 and insert it into another pinhole 5.

【0013】汎用LSIテストボード上部1、変換コン
タクトピンボード2、汎用LSIテストボード下部3そ
れぞれの配線を透過して見ると図5のようになる。
FIG. 5 shows the wiring of each of the upper part 1 of the general-purpose LSI test board, the conversion contact pin board 2 and the lower part 3 of the general-purpose LSI test board.

【0014】また、同一パッケージでピン配置の違う半
導体デバイス9へ切り替えるには、図6に示すように変
換コンタクトピンボード2と変換コンタクトピンボード
4を交換するだけでよい。
In order to switch to the semiconductor device 9 having the same package but different pin arrangements, it is only necessary to exchange the conversion contact pin board 2 and the conversion contact pin board 4 as shown in FIG.

【0015】なお、この実施例は電気特性のテストにつ
いて述べたが、品質保証のバーンインテストのボードな
どへの応用も可能である。
Although this embodiment has been described with respect to the test of the electrical characteristics, it is also applicable to a burn-in test board for quality assurance.

【0016】[0016]

【発明の効果】以上のように、本発明では、品種切り替
え、新規作成が容易にできるため時間を短縮することが
できる。
As described above, according to the present invention, it is possible to easily switch between varieties and create new ones, so that the time can be reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】LSIテストボードの全体を示す図FIG. 1 is a diagram showing an entire LSI test board;

【図2】汎用LSIテストボード上部を示す図FIG. 2 is a diagram showing an upper part of a general-purpose LSI test board;

【図3】変換コンタクトピンボードを示す図FIG. 3 is a diagram showing a conversion contact pin board;

【図4】汎用LSIテストボード下部を示す図FIG. 4 is a diagram showing a lower part of a general-purpose LSI test board;

【図5】LSIテストボードの透過図FIG. 5 is a transparent view of an LSI test board.

【図6】LSIテストボード品種交換を示す図FIG. 6 is a diagram showing an LSI test board type exchange;

【図7】ピン配線を示す図FIG. 7 is a diagram showing pin wiring;

【図8】従来のLSIテストボードを示す図FIG. 8 is a diagram showing a conventional LSI test board.

【符号の説明】[Explanation of symbols]

1 汎用LSIテストボード上部 2 変換コンタクトピンボード 3 汎用LSIテストボード下部 4 変換コンタクトピンボード(同一パッケージでピン
配置の違う半導体デバイス) 5 ピンホール 6 ポゴピン 7 LSIテスター 8 テストされる半導体デバイス 9 テストされる半導体デバイス(同一パッケージでピ
ン配置の違う半導体デバイス) 10 LSIテストボード 11 LSIテストボード(同一パッケージでピン配置
の違う半導体デバイス)
DESCRIPTION OF SYMBOLS 1 Upper part of general-purpose LSI test board 2 Conversion contact pin board 3 Lower part of general-purpose LSI test board 4 Conversion contact pin board (semiconductor device with the same package but different pin arrangement) 5 Pin hole 6 Pogo pin 7 LSI tester 8 Semiconductor device to be tested 9 Semiconductor device (semiconductor device with the same package but different pin arrangement) 10 LSI test board 11 LSI test board (semiconductor device with the same package but different pin arrangement)

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体デバイスの電気特性のテストを行
うテストボードにおいて、同一パッケージで品種切り替
えを行うとき、変換コンタクトピンボードのみの交換だ
けで切り替えできることを特徴とするテストボード。
1. A test board for testing the electrical characteristics of a semiconductor device, wherein when the type is switched in the same package, the type can be switched only by replacing the conversion contact pin board alone.
【請求項2】 LSIテストボードを作成、変更する
際、変換コンタクトピンボードの抜き差しできるコンタ
クトピンホールに器具を使わず必要なピンを入れるだけ
で作成、変更することができることを特徴とするテスト
ボード。
2. A test board, which can be created and changed by simply inserting necessary pins into a contact pin hole of a conversion contact pin board which can be inserted and removed without using a tool when preparing and changing an LSI test board. .
JP8281980A 1996-10-24 1996-10-24 Lsi test board Pending JPH10123208A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8281980A JPH10123208A (en) 1996-10-24 1996-10-24 Lsi test board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8281980A JPH10123208A (en) 1996-10-24 1996-10-24 Lsi test board

Publications (1)

Publication Number Publication Date
JPH10123208A true JPH10123208A (en) 1998-05-15

Family

ID=17646579

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8281980A Pending JPH10123208A (en) 1996-10-24 1996-10-24 Lsi test board

Country Status (1)

Country Link
JP (1) JPH10123208A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000028547A1 (en) * 1998-11-05 2000-05-18 Hitachi, Ltd. Semiconductor storage device and test system
US6483331B2 (en) 2000-03-28 2002-11-19 Kabushiki Kaisha Toshiba Tester for semiconductor device
KR20120012511A (en) * 2010-08-02 2012-02-10 세크론 주식회사 Apparatus for inspecting a hi-fix board

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000028547A1 (en) * 1998-11-05 2000-05-18 Hitachi, Ltd. Semiconductor storage device and test system
US6483331B2 (en) 2000-03-28 2002-11-19 Kabushiki Kaisha Toshiba Tester for semiconductor device
US6566899B2 (en) 2000-03-28 2003-05-20 Kabushiki Kaisha Toshiba Tester for semiconductor device
KR20120012511A (en) * 2010-08-02 2012-02-10 세크론 주식회사 Apparatus for inspecting a hi-fix board

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