JPH0999583A - Self-scanning type light-emitting device and photosensor using the device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase the number of chips picked up from a semiconductor wafer by disposing bonding pads in spaces of a switch element array formed by making the arrangement pitch of the switch element array smaller than the arrangement pitch of a light-emitting diode array and making the dimension of short sides of a luminous device small. SOLUTION: When a switch element array constituting a shift register is divided into two blocks and the switch elements in respective blocks are arranged, for instance, in 35μm pitch, spaces provided with (42.3μm-35μm)×128 elements = 934.4μm to the pitch of 42.3μm of light emitting diodes in 128 bits total are formed on both ends and at the center of the switch element array. A bonding pad for start pulse ϕS is provided in the space at the left end, and two bonding pads for clock pulses ϕ1 and ϕ2 are provided in the central space, and a bonding pad for the power source voltage Vck and a bonding pad for a write signal Sln are provided in a space at the right end.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a light emitting device which can be integrated and manufactured on the same substrate and can exhibit a self-scanning function. In particular, it reduces bias light and realizes a long life, and an optical printer. The present invention relates to a self-scanning light emitting device that can be applied to the like.

[0002]

2. Description of the Related Art LEDs are typical light emitting devices.
(Light Emitting Diode) and LD (Laser Diode) are known. A light emitting element array in which a large number of light emitting elements are integrated on the same substrate is used as a writing light source for an optical printer or the like in combination with its driving IC. The present inventors have paid attention to a light emitting thyristor having a PNPN structure as a constituent element of a light emitting element array, and have already filed a patent application (Japanese Patent Laid-Open No. 1-238962, Japanese Patent Laid-Open No. 2-14584, Japanese Patent Application Laid-Open No. 2-14584, Kaihei 2-92650, JP-A-2
No. -92651), it was shown that it is easy to mount as a light source for an optical printer, the light emitting element pitch can be made fine, and a compact self-scanning light emitting device can be manufactured.

Further, the present inventors have proposed a self-scanning light emitting device having a structure in which the switch element array is used as a shift register and is separated from the light emitting element array (Japanese Patent Laid-Open No. 2-2).
63668).

FIG. 1 shows an equivalent circuit diagram of the self-scanning light emitting device. This self-scanning light emitting device includes switch element arrays T (-1) to T (T) that form a shift register.
(2), writing light emitting element arrays L (-1) to L
It consists of (2). Diodes are used to connect the gate electrodes of adjacent switch elements. Each anode electrode of the switch element is alternately transferred clock lines φ ₁ , φ ₂
It is connected to the. Switch element gate electrodes G _{-1 to} G
₁ is also connected to the gate of the writing light emitting element. The write signal S is applied to the anode electrode of the writing light emitting element.
_in has been added. A start pulse φ _S is applied to the gate electrode of the switch element in the first stage, and the switch element is turned on.

Now, assuming that the switch element T (0) is in the ON state, the voltage of the gate electrode G ₀ is the power supply voltage V _GK.
(Here, it is set to 5 volts), which is almost zero. Therefore, the voltage of the write signal S _in is PN
If the diffusion potential of the junction (about 1 volt) or more, the light emitting element L (0) can be in the light emitting state.

On the other hand, the gate electrode G _-1 is about 5 volts, and the gate electrode G ₁ is about 1 volt (diode D ₀
Forward rising voltage). Therefore, the light emitting element L
The writing voltage of (-1) is about 6 V, and the light emitting element L
The write voltage of (1) is about 2 volts. from now on,
The voltage of the write signal S _in that can be written only to the light emitting element L (0) is in the range of 1 to 2 volts. Light emitting element L (0)
Is on, that is, when the light emitting state is entered, the write signal S _in
Since the line voltage is fixed at about 1 volt, it is possible to prevent an error that another light emitting element is selected.

The light emission intensity is determined by the amount of current flowing _{in the} write signal S _in , and image writing can be performed at any intensity. Further, in order to transfer the light emitting state to the next light emitting element, it is necessary to once hold the voltage of the write signal S _in line to 0 V and once turn off the light emitting element which is emitting light.

FIG. 2 is a plan view showing the outline of the self-scanning light emitting device of FIG. 1, and FIG. 3 is a sectional view taken along line XX 'of FIG. The manufacturing process and structure will be described below.

First, the n-type semiconductor layer 24, the p-type semiconductor layer 23, the n-type semiconductor layer 22, and the p-type semiconductor layer 21 are sequentially laminated on the n-type GaAs substrate 1.

The stacked semiconductor layers are separated into each element region by the separation groove 50. Further, the p-type semiconductor layer 21 in each element region is partially removed to form the gate electrode and the coupling diode so that the p-type semiconductor layer 21 remains on the n-type semiconductor layer 22 in three islands. These three islands are two small islands that are continuous with one large island, and the two small islands are
Islands, islands, valleys, islands,
Arranged to repeat island, valley, island, island, valley. Here, islands, islands, and valleys correspond to the coupling diode and the switching element, and the valleys indicate the exposed n-type semiconductor layer 22 portion. The large island corresponds to the light emitting element.

Next, the insulating coating 30 is coated on the entire surface of the substrate. Then, a contact hole C ₁ for connection is formed in the insulating film 30 at the positions on the n-type semiconductor layer 22 and the p-type semiconductor layer 21 of the three islands that have been subjected to the removal treatment.

Next, on the insulating film 30, n of each element region is formed.
P-type semiconductor layer 21 in the element region adjacent to the p-type semiconductor layer 22
And a T-shaped metal thin-film wiring 45 for connecting to each other using a contact hole C ₁ and an island-shaped p-type semiconductor layer 2 having a large element region.
Providing a metal thin film wiring 44 for transmitting a write signal through a contact hole C ₁ to 1, the metal thin film wiring 42 for transmitting a driving voltage via a contact hole C ₁ to the rest of the island-like p-type semiconductor layer 21 in the element region, respectively.

Next, a part of the metal thin film wiring 45 is covered with phosphorus-doped amorphous silicon 163 used as a resistance R _L between the gate electrode and the power supply electrode to a thickness of about 1 μm. The amorphous silicon 163 is separated so that one for each switch element. Next, the entire surface of the substrate is covered with the insulating coating 31. Then, a contact hole C ₂ for connection is made in the insulating film 31 at positions above the amorphous silicon 163, the metal thin film wiring 42, and the metal thin film wiring 44.

[0014] Next, on the insulating film 31, contact holes C ₂ through the metal thin film wiring 44 convey to the write signal (an anode electrode of the light emitting element) write signal line S _in, signals thin film through a contact hole C ₂ Wiring 43
A power supply line 41 for transmitting a power supply voltage to (connected to the gate electrode through the amorphous silicon 163) and a clock line for transmitting a clock pulse to the metal thin film wiring 40 (anode electrode of the switch element) through the contact hole C _2. phi _1, provided phi _2.

Here, at the position of the contact hole C ₂ on one side provided on the clock line coupling metal thin film wiring 40, the anode electrode of each switch element is set to the clock line φ ₁ ,
φ 1 or φ ₂ to any _one of φ ₂ toward the arrangement direction
It is adjusted to repeat in the order of.

In the above structure, the switching element, the coupling diode, and the writing light emitting element are all formed in the p-type semiconductor layer 2.
It can be formed only by patterning No. 1 and the manufacturing process is not so different from the conventional manufacturing process of the light emitting device. In other words, the manufacturing process is not complicated even though the structure is complicated.

[0017]

However, the conventional structure shown in FIGS. 2 and 3 has the following problems. That is, when the light emitting device is applied to an optical printer or the like, the light emitting device is configured in the form of one semiconductor chip in which a certain number of switch elements and light emitting elements are integrated, and the light emitting chips are arranged in, for example, one row, Form a linear light source of size. However, the electrodes necessary for driving this light emitting device (eg, φ _S in FIGS. 1 and 2
Bonding pads for taking out φ ₁ , φ ₂ , S _in , V _GK must be provided.

However, in order to provide this bonding pad, it is necessary to secure a space especially in a region other than the region where the light emitting device is formed. As an example, in a light emitting element array of 600 DPI (light emitting elements are arranged at a density of 600 elements per inch), the light emitting elements are arranged at a pitch of about 42.3 μm. Considering now one light emitting chip in which 128 light emitting elements are arranged, the length in the direction in which the light emitting elements are arranged (long side dimension)
Is about 5.4 mm. The length (short side dimension) in the direction perpendicular to the light emitting element array direction is not particularly limited, but by making the length as narrow as possible, the number of chips obtained from the semiconductor wafer can be increased and the cost can be reduced.

The light emitting device shown in the conventional example requires a space of about 100 μm square for one bonding pad, and in order to avoid damage to the semiconductor part due to wire bonding, the space between the light emitting element and the switch element is avoided. To 5
A space of about 0 μm is required. Therefore, a total of 15
A short side dimension of 0 μm is required for parts other than the switch element and the light emitting element. Only a few bonding pads are present in this space, and the other spaces are completely unused. Therefore, there has been a problem that the number of light emitting chips to be obtained is reduced.

Further, in the conventional example shown in FIG. 1, φ ₁ ,
Bonding pads such as φ ₂ and V _GK are arranged on the upper side of the light emitting element, and a bonding pad of S _in which gives a current for light emission to the light emitting element is arranged on the lower side of the light emitting element. Normally, in a light emitting element array used for an optical printer, it is necessary to accurately store 1 bit of each light emitting element at a predetermined pitch, so that the upper wiring is laid down or the lower wiring is laid up. Is difficult. Therefore, in the light emitting device shown in FIG. 1, φ ₁ , φ ₂ , V _GK are formed above the light emitting element.
Etc., and a bonding pad for S _in is provided below. In this case, the short-side dimension required for arranging these bonding pads is required to be about 300 μm in total in the vertical direction, which considerably reduces the number of light emitting chips to be obtained. Therefore, there is a problem that the chip price increases.

An object of the present invention is to provide a self-scanning light emitting device which can reduce the short side dimension.

Another object of the present invention is to provide a light emitting module in which a plurality of such self-scanning light emitting devices are arranged on a mounting substrate.

Still another object of the present invention is to provide an optical printer device using such a light emitting module.

[0024]

SUMMARY OF THE INVENTION According to the present invention, a plurality of switch elements each having a control electrode of a threshold voltage or a threshold current for switching operation are arranged, and the control electrodes of each switch element are located in the vicinity thereof. To the control electrode of at least one switch element to be connected via a connection resistor or an electric element having electrical unidirectionality, and to the control electrode of each switch element, a power supply line is connected via a load resistor, And a switch element array formed by connecting a clock pulse line to each switch element, and a light emitting element array in which a plurality of light emitting elements having control electrodes for a threshold voltage or a threshold current for light emitting operation are arranged,
In the self-scanning light emitting device, each control electrode of the light emitting element array is connected to the control electrode of the switch element by an electric means, and a line for supplying a current for light emission to each light emitting element is provided. The array and the light emitting element array are arranged substantially in parallel and in a substantially linear shape, and the arrangement pitch of the switch element array is made smaller than the arrangement pitch of the light emitting element array to form a gap in the switch element array. By arranging a bonding pad for taking out a terminal required for driving the light emitting device in the gap, the short side dimension of the light emitting device is reduced.

Further, according to the present invention, a plurality of switch elements each having a control electrode of a threshold voltage or a threshold current for switching operation are arranged, and the control electrode of each switch element is located in the vicinity of at least one switch. Connect to the control electrode of the element via a connecting resistor or an electrically unidirectional electrical element, connect the power supply line to the control electrode of each switch element via a load resistor, and connect to each switch element. A switch element array formed by connecting clock pulse lines, and a light emitting element array in which a plurality of light emitting elements having control electrodes for a threshold voltage or a threshold current for light emitting operation are arranged are provided. Each control electrode is connected to the control electrode of the switch element by an electric means, and a line for supplying a current for light emission to each light emitting element is connected. In the self-scanning light-emitting device digits,
The switch element array is composed of two or more switch element array blocks, and the arrangement pitch of the switch elements in each block is set to be smaller than the arrangement pitch of the light emitting element arrays. Bonding pads for taking out terminals necessary for driving the light emitting device are arranged in the gaps at both ends and the gap between the blocks.

That is, by separating the light emitting element array and the switch element array and making the pitch of the switch element array smaller than that of the light emitting element array, a gap is formed in the switch element array portion and a bonding pad is arranged in this portion. Thus, the width of about 150 μm required for wire bonding of the chip shown in the conventional example can be eliminated, so that the number obtained from the wafer can be increased. And it can greatly contribute to cost reduction.

Further, the wire bonding on both sides of the light emitting element portion can be gathered on one side, and the short side width required to provide the wire bonding can be almost eliminated.

Further, the light emitting module of the present invention comprises a plurality of light emitting devices, which are integrated on a semiconductor substrate, in a row,
It is arranged on a straight line.

Further, in the optical printer device of the present invention, the light emitting modules are arranged in a straight line in a line and combined with the lens array so that the output light from the light emitting device is collected on the surface of the photosensitive drum. The image information displayed on the light emitting device is transferred onto the photosensitive drum.

[0030]

BEST MODE FOR CARRYING OUT THE INVENTION

Example 1 An outline of Example 1 is shown in FIG. And Figure 4
FIG. 5 shows a 1-bit sectional schematic view of the light emitting element corresponding to the switch element in the embodiment shown in FIG. In FIG.
The equivalent circuit of the first part of the embodiment shown in FIG. As is clear from FIG. 6, the equivalent circuit of this embodiment is the same as that of FIG. 1, and therefore the explanation of the operation principle is omitted. Also in this embodiment, as in the conventional example, the switch element and the light emitting element are constituted by a light emitting thyristor.

In FIG. 4, 21 corresponds to the p-type semiconductor layer 21 of FIG. 5, and 22 corresponds to the n-type semiconductor layer 22. Therefore, 21 corresponds to the anode of the light emitting thyristor element, and 2
2 corresponds to a gate. Although not shown in FIG. 4, the cathode corresponding to the substrate 1 is grounded from the back surface of the substrate.

Switch element T (i) (i indicates a number)
And the coupling diode D _i is formed in one island, and these are arranged in a line to form a switch element array having a shift register function. Light emitting element L
(I) is also arranged in a line to form a light emitting element array.

This embodiment exemplifies a light emitting chip in which 128 elements of each of these switch element array and light emitting element array are arranged on one semiconductor substrate 1. In this case, in the case of 600 DPI, the long side dimension of the chip is about 5.4 mm. 128 light emitting elements (L (1) to L
(128)) are arranged at an equal pitch of about 42.3 μm.

When used as a light source for an optical printer, the light emitting elements must be arranged in a straight line with exactly the same pitch without any gap. However, the switch element does not have such a condition, and it suffices that the corresponding switch element and the gate of the light emitting element are electrically connected. Therefore, in this embodiment, the switch element array forming the shift register is divided into two blocks, and the switch elements in each block are arranged at a pitch of 35 μm. Therefore, for a pitch of light emitting elements of 42.3 μm, (42.3 μm−35 μm) × 128 elements = 934.4 for the entire 128 bits.
A gap of μm occurs at both ends and the center of the switch element array. It was possible to arrange five wire bonding pads each having a size of 100 μm and a distance between the pads of about 70 μm in these gaps. Specifically, in FIG. 4, a bonding pad for the start pulse φ _S is provided in the left end gap, two bonding pads for the clock pulses φ ₁ and φ ₂ are provided in the center gap, and the power supply voltage V is provided in the right end gap. A bonding pad for _GK and a bonding pad for write signal S _in are provided. Here, the bonding pads provided in the gap of the shift register are φ ₁ , φ ₂ , φ _S , V _GK , S _in
There are only five of them, and the terminal D corresponding to the anode of the diode D ₁₂₈ corresponding to the final output of the switch element array.
_In the present embodiment, _out has no bonding pad. However, if it is necessary to take out this terminal to the outside, the number of bonding pads may be increased to one to six.

In FIG. 4, light emitting element arrays L (1) to L (L)
The write signal line S _in for light emission located on the lower side of (128) is routed from the lower side of the light emitting element array to the upper switch element array side. In order to do this, as shown in the light emitting element L (128) of FIG. 4, the gate portion 22 is deformed so that the gate portions of the other light emitting elements are different, and a space for passing the wiring of this S _in is formed. Need to make. This is because the pitch assigned to one light emitting element is 42.3 μm, and within this value, the gate electrode G
_This is because it is necessary to pass the ₁₂₈ wirings and the S _in wirings, and the wirings cannot be provided outside the light emitting elements at both ends. Since the current for light emission is a relatively large current, it is necessary to secure a sufficient width. In this embodiment, the S _in wiring is formed with a width of 30 μm.

An overall image of the light emitting chip of this embodiment is shown in FIG. In the figure, SDA indicates a switch element array, and LMA indicates a light emitting element array. With this configuration, conventionally, the bonding pad for S _in , which should be provided on the lower side of the light emitting element array, can be provided on the switch element array side. As a result, all the bonding pads can be arranged on the upper side of the light emitting element array, and by burying them in the gaps of the switch element array, it is possible to eliminate the need for a space dedicated to the bonding pad.

In the conventional structure, the sum of the short side dimensions of the switch element array and the light emitting element array is about 250 μm, and the wire bonding space on both sides of the light emitting element array is 15 μm.
Since 0 μm × 2 = 300 μm and the margin for cutting is 25 μm at the top and bottom, the short side dimension of the light emitting chip was 600 μm. On the other hand, in the present embodiment, an extra space of about 50 μm was required for routing the gate wiring between the switch element array and the light emitting element array, but since the wire bonding space was not required, The short side dimension of the light emitting chip of the embodiment is about 3
It could be formed with a thickness of 50 μm. From now on, the number of chips acquired is about 1.7 times that of the conventional one, and it has become possible to reduce costs by 40% or more.

[0038]

Second Embodiment FIG. 8 shows an outline of the second embodiment. The present embodiment is a modification of the first embodiment. In the first embodiment, when the write signal line S _in for light emission is routed from the lower side of the light emitting element array to the switch element array side, the light emitting element L (12
The gate part of 8) is deformed to make a space for passing the S _in wiring.

The present embodiment does not require such a modification. Specifically, as shown in FIG. 9, the switch element array constituting the shift register is composed of four blocks SDA (1) to SDA ( 4), the switch elements are arranged in each block at an arrangement pitch smaller than the arrangement pitch of the light emitting elements, and a gap is created between the left and right ends of the switch element array and the blocks. Then, bonding pads are arranged in the gaps at the left and right ends and the gaps between the blocks. That is, the bonding pad for the start pulse φ _S is provided in the left end gap, the bonding pad for the clock pulse φ ₁ is provided in the next gap, the bonding pad for the write signal S _in is provided in the center gap, and the clock pulse is provided in the next gap. A bonding pad for φ ₂ is provided on the right end with a bonding pad for the power supply voltage V _GK and a bonding pad for the final output D _out .

The write signal line S _in for light emission located under the light emitting element arrays L (1) to L (128) is routed from the lower side of the light emitting element array to the switch element array side, as shown in FIG. Light emitting element L64 and light emitting element 65
This is done by passing the S _in wiring between and.

According to this example, the short side dimension could be formed to be about 350 μm as in the case of Example 1.

[0042]

Third Embodiment Another example of a self-scanning light emitting device to which the present invention can be applied will be shown. The present embodiment is a light emitting device capable of simultaneously emitting light from a plurality of light emitting elements. An equivalent circuit diagram of this self-scanning light emitting device is shown in FIG.

The difference from the circuit shown in FIG. 1 is that three light emitting elements are arranged in a block, and the light emitting elements in one block are controlled by one switch element, and different write signals are supplied to the light emitting elements in one block. Line S _in 1, S _in
2 and S _in 3 are connected to control the light emission of the light emitting element. In the figure, light emitting elements L ₁ (−1), L ₂ (−1), L
₃ (−1), light emitting elements L ₁ (0), L ₂ (0), L
₃ (0), light emitting elements L ₁ (−1), L ₂ (−1), L ₃
(-1) and the like indicate blocked light-emitting elements.

The operation is the same as that of the circuit shown in FIG.
which emission is written by _in is more written emit light simultaneously, in which it is adapted to transfer each block.

Now, considering the use of this light emitting device as a light source for a generally known optical printer such as an LED printer, a print corresponding to the short side (about 21 cm) of A4 with a resolution of 16 dots / mm. About 3 to print
A 400-bit light emitting element is required.

In the light emitting device described in Example 1,
There is always one point of light emission, and in the above case, the intensity of this light emission is changed to write an image.
When an optical printer is formed by using this, compared with a commonly used LED array for an optical printer (LEDs located at a point to write an image are controlled by a drive IC so that they simultaneously emit light) In some cases, a luminance of 3400 times is required, and if the luminous efficiency is the same, it is necessary to flow a current of 3400 times. However, the light emission time is, on the contrary, 1/3400 of that of a normal LED array.

However, the light-emitting element generally has a tendency to shorten its life exponentially as the current increases, and the life is shortened as compared with the conventional LED printer, although the duty is 1/3400. Had a point.

However, according to the present embodiment, if the comparison is made under the condition that the total number of bits is the same, in this example, 3 in 1 block.
As compared with the light emitting device of the first embodiment, the device has 1
The emission time of the device is tripled. Therefore, the current passed through the light emitting element in the ON state may be 1/3, and the life can be extended as compared with the first embodiment.

In this embodiment, one block includes three elements, but the larger the number of elements, the smaller the write current, and the longer the life can be achieved.

[0050]

[Embodiment 4] This embodiment is one example of the self-scanning light-emitting device disclosed in Japanese Patent Laid-Open No. 4-23367, to which the present invention can be applied.

The light emitting device of the embodiment is shown in FIG. FIG.
In FIG. 1, the switch element array and the light emitting element array are described separately in the upper and lower parts.

First, a switch element array having a shift register function will be described. S (-2) to S (2)
Is a switch element (thyristor with PNPN structure)
It is. φ ₁ and φ ₂ are transfer clocks for driving the switch element array. CL ₁ is the transfer clock φ
CL ₂ is a clock line supplied with ₁ and CL ₂ is a clock line supplied with a transfer clock φ ₂ .

The gate electrodes G _{-1 to} G ₂ of the switch elements S (-2) to S (2) are connected by coupling diodes D _{-2 to} D ₁ , respectively. Since such a diode coupling system is adopted, the switch element array can perform the information transfer operation with the two-phase transfer clocks φ ₁ and φ ₂ .

R _A1 and R _A2 are anode load resistors that connect the anodes of the switch elements S (-2) to S (2) and one of the clock lines CL ₁ and CL ₂ , respectively. This anode load resistance R _A1 , R _A2
Is to limit the amount of current in the ON state of each of the switch elements S (−2) to S (2). Each switch element S (-
The cathodes of 2) to S (2) are grounded.

Further, R _L1 and R _L2 are load resistances of the gates which connect the gates G _{-2 to} G _{2 of the} switch elements S (-2) to S (2) and the DC power source of the power source voltage V _GK , respectively. Is. The gate load resistors R _L1 and R _L2 limit the amount of current flowing from the DC power source of the power source voltage V _GK to the gates G _{-2 to} G ₂ . Then, each gate G _-2 , G ₀ , G
₂ are connected to the cathodes of the diodes D _-2 ', D ₀ ' and D ₂ ', respectively.

Next, the light emitting element array will be described.
φ _R is a light emitting element (light emitting thyristor) L (-2), L
It is a clock that controls permission / prohibition of writing information to (0) and L (2) and resets the written state. Further, CL _R is a current supply line for supplying the clock φ _R.

Further, R _A3 is each light emitting element L (-2), L
It is an anode load resistance that connects the anodes of (0) and L (2) and the current supply line CL _R. The anode load resistance R _A3 is used for each light emitting element L (−2), L (0), L
This is to limit the amount of current in the ON state of (2). The cathodes of the light emitting elements L (-2), L (0), L (2) are grounded.

Further, R _L3 is each light emitting element L (-2), L
_These are gate load resistors that connect the gates G _-2 ′, G ₀ ′ and G ₂ ′ of (0) and L (2) to the power supply voltage V _GK . The gate load resistor R _L3 limits the amount of current flowing from the DC power source of the power source voltage V _GK to each of the gates G _-2 ′, G ₀ ′ and G ₂ ′. Then, each gate G _-2 ', G ₀ ',
G ₂ ′ includes diodes D ₋₂ ′, D ₀ ′ and D ₂ ′, respectively.
Connected to the anode of.

That is, in FIG. 11, the gates of the switch elements S (−2), S (0), S (2) emit light via the diodes D ₋₂ ′, D ₀ ′, D ₂ ′, respectively. The gates G _-2 ', G of the elements L (-2), L (0), L (2)
₀ ', G _2' are individually connected to.

Next, the operation of the switch element array portion will be described. Now, it is assumed that a high level or low level voltage is supplied to the anode (not shown) of the switch element S (-3) as the start pulse φ _S. In this case,
If the high level voltage is higher than the voltage obtained by adding the diffusion potential V _dif to the power supply voltage V _GK , the switch element S (−3) is turned on. Then, the low-level voltage of the next supplied start pulse φ _S changes the switching element S (−3).
If it is lower than the on-state maintaining voltage of, S (-3) is in the off state.

In the ON state, the gate potential of the switch element S (-3) becomes approximately 0 volt, and in the OFF state, the gate voltage becomes the same voltage as the power supply voltage V _GK . Switch element S
If the gate potential is zero volts (-3), the coupling diode D _-3 (not shown), the switching element S (-
The gate potential of 2) decreases. And the switch element S
The turn-on voltage of (-2) also decreases. Therefore, the transfer clock φ ₂ can set the switch element S (−2) to the ON state.

This ON state is sequentially set by φ ₁ and φ ₂ ,
The data is transferred to the right in FIG. That is, the ON state is written in the switch element array by the high-level voltage of the start pulse φ _S , and the ON state is sequentially transferred to the right.

However, when all the bits are in the ON state, it is impossible to transfer the ON state from the operating principle of the switch element array, and the ON and OFF are repeated every other bit. Will be transferred. That is, the waveform of the start pulse φ _S is also the transfer pulse φ ₁ ,
It is necessary to send high level and low level alternately in synchronization with φ ₂ .

Now, assuming that there is valid information in the ON and OFF states of only even bits, if the ON state is 1 and the OFF state is 0, 1 or 0 is written by the start pulse φ _S , and the transfer clock φ is written. ₁ , ₁ , ₂ will transfer the 1, 0. In this way, the signal (information) of 1 or 0 is written in the switch element array.

Next, the light emitting elements L (-2) (L (0), L
The operation (2)) will be described. If L (−2) is 0, the light emitting element L (−2) is not turned on if the voltage of the clock φ _R is 0 volt. That is, the light emitting element L (-2) is set to the write-protected state. The voltage of the clock φ _R is the light emitting element L (-2)
If the voltage is set to a voltage between V _GK + V _dif from the ON state maintaining voltage of _{No. 1} , the light emitting element L (−2) is set to the write-enabled state. Then, by changing the potential of the gate G _-2 ', the light emitting element L (-2) can be set to the ON state.

Writing of information from the switch element array to the light emitting element array will be described. The 1 or 0 signal is written in the switch element array as described above. At the stage where the last bit is written, the transfer clocks φ ₁ and φ ₂ are maintained at low level and high level, respectively. As a result, the information transfer operation is completed, and the information written in the switch element array is held (especially, held in even bits).

In the even-numbered bits of the switch element array, the gate potential of the switch element S in the ON state is approximately 0 volt, and the gate potential of the switch element S in the OFF state is about twice the V _dif or more. The gate potential of the switch element S in the off state is approximately twice V _dif when the adjacent even bit located in the opposite direction to the transfer direction is in the on state, and otherwise V _dif . About 2
Double the voltage. Here, V _dif is PN
It is the diffusion potential of the junction.

Switch elements S (-2), S (0), S
The gate voltage of each of (2) is the diode D _-2 ',
D ₀ ′ and D ₂ ′ correspond to the corresponding light emitting elements L (−2),
L (0), the gate G _-2 of _{L (2) ', G 0} ', is transmitted to the G ₂ '. Therefore, the light emitting elements L (-2), L
The gate voltages of (0) and L (2) are V in the ON state.
_dif , which is three times V _dif or more in the off state. In the ON state, the turn-on voltage of the light emitting element is twice V _dif , and in the OFF state it is 4 times V _dif .

On the other hand, the clock φ _R is once set to zero volt to eliminate the entire light emission (that is, reset), and then raised to the high level potential V _HR . When the voltage φ _HR is set in the range of 2V _dif <V _HR <4V _dif , the switch element S in the on state is turned on.
The light emitting element L corresponding to is turned on, and the light emitting element L corresponding to the switch element S in the off state remains off.

Therefore, the information of 1, 0 written in the switch element array is directly written in the light emitting element array.

After that, the voltage V _HR is reset to a value which is equal to or higher than the ON state maintaining voltage of the light emitting element and less than twice the voltage V _dif . As a result, the light emitting element L is not affected by the gate potential of the switch element S and continues to hold the written information. Then, while the light emitting element array is in the information holding state, the following information is written in the switch element array in the same manner as described above.

Eventually, the clock φ _R is set to a low level voltage and each light emitting element L is reset. After the reset, the information is written in the light emitting element array again. As described above, a series of operations is repeated.

Next, the case where the light emitting device shown in FIG. 11 is applied to a writing light source for an optical printer will be described.

For example, if the light emitting device has a light emitting element L of 2048 bits, the switch element S requires 4096 bits, which is twice that. Since the current amount of the writing light source in the optical printer is about 5 mA, if the light emitting elements L of all the bits are in the light emitting state, a current of about 10 A flows.

On the other hand, it is experimentally known that the current for transferring information from the switch element S is 0.5 mA when the gate load resistance R _L3 = 30 kΩ, so that the light emitting elements of all bits are In the light emitting state, it is about 1A. Note that the amount of current for this information transfer is about 10% compared to 10 A required for optical printing, which is a value that poses no practical problem.

Further, when the information from the switch element S is moved to the light emitting element L, the voltages of the clocks φ ₁ and φ ₂ are once reduced to zero volt, and the entire switch element array is turned off and reset. Is done. When this method is used, the current value equivalently decreases when the time during which the switch element S is in the ON state is taken into consideration. That is, 0.5A is equivalent to 1A described above.
It has fallen to a degree.

With respect to 2048 bits of the light emitting element L, if only one data input terminal (not shown) is supplied with the start pulse φ _S , it is necessary that the information transfer rate is considerably high. In this regard, the information transfer rate can be reduced by providing a plurality of data input terminals. For example, typically 64 bits or 128
A chip of the light emitting element L is formed with the bit as one unit,
Information may be input for each chip.

When data is input in parallel every 128 bits, 20 data input terminals are provided for 2048 bits. Therefore, the transfer rate of information is 1
/ 20 is good. Therefore, the light emitting device can perform a sufficient operation.

It should be noted that the anode load resistance R _A3 can be finely adjusted by a laser or the like in order to prevent variations in the amount of output light of the light emitting element L. As a result, it is possible to obtain a light emitting device in which the output light does not vary.

Further, in FIG. 11, the characteristics of the coupling diodes D _-2 and D ₀ connected to the right side of the even bits in the switch element array and the coupling diodes D _-1 and D connected to the right side of the odd bits. The characteristics of ₁ are different. Therefore, it is important to optimize the operating current etc. for the even bits and the odd bits. For this reason, R _L2 <
It is preferable to set R _L1 and R _A1 <R _{A2, in} which case the light emitting device can operate more stably and at high speed.

Further, in FIG. 11, a configuration called a diode coupling system is adopted, but the coupling system is not limited to this, and a resistance coupling system may be used.

[0082]

Embodiment 5 An application to an optical printer will be described as an application example of the self-scanning light emitting device of the present invention. Conventionally, an example in which a module in which a driving IC is connected to each pixel of an LED array is used and applied to an optical printer is known. The principle diagram of the optical printer is shown in FIG. First, the cylindrical photosensitive drum 61
A material (photoreceptor) having optical conductivity such as amorphous Si is formed on the surface of the. This drum is rotating at print speed. First, the surface of the photoconductor is uniformly charged by the charger 67. The light emitting element array optical print head 68
The light of the dot image to be printed with is radiated onto the photoconductor to neutralize the charge where the light hits. Next, toner is applied to the photoconductor by the developing device according to the charged state on the photoconductor.
Then, the transfer device 62 transfers the toner onto the sheet 69 sent from the cassette 611. Then, the sheet is heated and fixed by the fixing device 63 and fixed. On the other hand, the erased lamp 65 neutralizes the entire surface of the transferred drum, and the cleaning device 66 removes the remaining toner.

The light emitting element array module in which the light emitting chips according to the present invention are linearly arranged in a line on a predetermined mounting substrate is applied to an optical print head. The structure of the optical print head is shown in FIG. This optical print head is composed of a light emitting element array 612 and a rod lens array 613, and the focal point of the lens is located on the photosensitive drum 61. Image information can be written on the photosensitive drum by light from the light emitting element array module of the present invention.

According to the present invention, since the cost of the light emitting element array module can be reduced much more than before, it is possible to provide a low cost print head and a low cost optical printer.

[0085]

As described above, by separating the light emitting element array and the switch element array and making the pitch of the switch element array smaller than that of the light emitting element array, a gap is formed in the switch element array portion, and this portion is formed. By disposing the bonding pad, the width of about 150 μm required for wire bonding of the chip shown in the conventional example can be reduced, and therefore, the number obtained from the wafer can be increased. And it can greatly contribute to cost reduction.

Further, it becomes possible to collect the wire bonding on both sides of the light emitting element portion of the conventional example on one side,
It is possible to almost eliminate the short side width required to provide wire bonding.

Further, the present invention can be applied to optical printers, displays, etc., and can greatly contribute to performance improvement and cost reduction of these devices.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram of a light emitting device in which a switch element array and a light emitting element array are separated.

FIG. 2 is a plan view showing an outline of the light emitting device of FIG.

FIG. 3 is a cross-sectional view taken along line XX ′ of FIG.

FIG. 4 is a plan view showing an outline of a light emitting device of Example 1.

FIG. 5 is a cross-sectional view of a 1-bit light emitting device.

FIG. 6 is an equivalent circuit of the first part of the embodiment shown in FIG.

FIG. 7 is a diagram showing an overall image of a chip.

FIG. 8 is a plan view showing the outline of the light emitting device of the first embodiment.

FIG. 9 is a diagram showing an overall image of a chip.

FIG. 10 is an equivalent circuit diagram of a light emitting device according to a third embodiment.

FIG. 11 is an equivalent circuit diagram of the light emitting device of Example 4.

FIG. 12 is a diagram showing an optical printer device.

FIG. 13 is a diagram showing a combination of a light emitting element module and a rod lens array.

[Explanation of symbols]

T transfer thyristor L light emitting thyristor φ ₁ , φ ₂ transfer clock pulse V _GK power supply voltage φ _S start pulse S _in write signal 1 n-type substrate 22, 24 p-type semiconductor layer 21, 23 n-type semiconductor layer

Claims (11)

[Claims] 1. A switch element having a control electrode for controlling a threshold voltage or a threshold current for switching operation, wherein a plurality of switch elements are arranged, and the control electrode of each switch element is controlled in the vicinity thereof. Connect to the electrodes via a connecting resistor or an electrically unidirectional electrical element, connect the power supply line to the control electrode of each switch element via a load resistor, and connect the clock pulse line to each switch element. A switch element array formed by connecting a plurality of light emitting elements, and a light emitting element array in which a plurality of light emitting elements having control electrodes for a threshold voltage or a threshold current for light emitting operation are arranged. Is connected to the control electrode of the switch element by an electric means, and a line for supplying a current for light emission to each light emitting element is provided to self-run. In the type light emitting device, the switch element array and the light emitting element array are arranged substantially in parallel and in a substantially linear shape, and the arrangement pitch of the switch element array is smaller than the arrangement pitch of the light emitting element array. Self-scanning characterized in that a short side dimension of the light emitting device is reduced by forming a gap in the switch element array and arranging a bonding pad for taking out a terminal necessary for driving the light emitting device in the gap. Type light emitting device. 2. The self-scanning light emitting device according to claim 1, wherein in order to draw the current supply line to a bonding pad on the switch element array side, the shape of the gate of one light emitting element is changed and changed. A self-scanning light emitting device in which the current supply line is routed above the gate. 3. The self-scanning light emitting device according to claim 2, wherein when the bonding pad for taking out the terminal of the current supply line is arranged in a gap at the end of the light emitting element array, the gate shape is changed. The self-scanning light emitting device is a light emitting element located at an end of the light emitting element array. 4. The self-scanning light-emitting device according to claim 1, wherein when the bonding pad for taking out the terminal of the current supply line is arranged substantially in the center of the light-emitting element array, the current supply line is A self-scanning light emitting device in which the current supply line is routed between two adjacent light emitting elements located substantially at the center of the light emitting element array for drawing to the bonding pad on the switch element array side. 5. A plurality of switch elements each having a control electrode for controlling a threshold voltage or a threshold current for switching operation are arranged, and the control electrode of each switch element controls at least one switch element located in the vicinity thereof. Connect to the electrodes via a connecting resistor or an electrically unidirectional electrical element, connect the power supply line to the control electrode of each switch element via a load resistor, and connect the clock pulse line to each switch element. A switch element array formed by connecting a plurality of light emitting elements, and a light emitting element array in which a plurality of light emitting elements having control electrodes for a threshold voltage or a threshold current for light emitting operation are arranged. Is connected to the control electrode of the switch element by an electric means, and a line for supplying a current for light emission to each light emitting element is provided to self-run. In the type light emitting device, the switch element array is composed of two or more switch element array blocks, and the arrangement pitch of the switch elements of each block is set to be smaller than the arrangement pitch of the light emitting element array, A self-scanning light-emitting device, wherein bonding pads for taking out terminals necessary for driving the light-emitting device are arranged in a gap between both ends of the switch element array and a gap between the blocks. 6. The self-scanning light-emitting device according to claim 5, wherein a bonding pad for taking out a terminal for a start pulse for starting a switching operation of the switch element array is arranged in one of the gaps at both ends. A bonding pad for taking out the terminal of the power supply line and a bonding pad for taking out the terminal of the current supply line are arranged in the other of the gaps at both ends, and the number of the switch element array blocks is two. And
A self-scanning light emitting device in which at least two bonding pads for taking out terminals of the clock pulse line are arranged in a gap between the blocks. 7. The self-scanning light emitting device according to claim 6, wherein the gate of the light emitting element located at the end of the light emitting element array is used to draw out the current supply line to the bonding pad on the switch element array side. The self-scanning light-emitting device in which the shape of is changed and the current supply line is routed over the changed gate. 8. The self-scanning light emitting device according to claim 5, wherein a bonding pad for taking out a terminal for a start pulse for starting a switching operation of the switch element array is disposed in one of the gaps at both ends. A bonding pad for taking out the terminal of the power supply line is arranged in the other of the gaps at both ends, and the number of the switch element array blocks is four.
A bonding pad for taking out the terminal of the power supply line is arranged in the central gap between the blocks, and a bonding pad for taking out the terminal of the clock pulse line is arranged in the remaining gap between the blocks. Self-scanning light emitting device. 9. The self-scanning light emitting device according to claim 8, wherein the current supply line is extended to the bonding pad on the side of the switch element array, so that the adjacent two adjacent to the light emitting element array are located at substantially the center of the light emitting element array. A self-scanning light emitting device in which the current supply line is routed between individual light emitting elements. 10. A light emitting module in which a plurality of the self-scanning light emitting devices according to any one of claims 1 to 9 which are integrated on a semiconductor substrate are arranged in a straight line in a straight line. 11. An image information displayed on the light emitting module, which is arranged by combining the light emitting module according to claim 10 and a lens array so as to collect output light from the light emitting module on a surface of a photosensitive drum. An optical printer device that is configured to be transferred onto a photosensitive drum.