JPH09219637A - 駆動回路 - Google Patents

駆動回路

Info

Publication number
JPH09219637A
JPH09219637A JP8289574A JP28957496A JPH09219637A JP H09219637 A JPH09219637 A JP H09219637A JP 8289574 A JP8289574 A JP 8289574A JP 28957496 A JP28957496 A JP 28957496A JP H09219637 A JPH09219637 A JP H09219637A
Authority
JP
Japan
Prior art keywords
driver
output
input
circuit
slew rate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8289574A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09219637A5 (enExample
Inventor
Peter Lawson William
ウィリアム・ピーター・ローソン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JPH09219637A publication Critical patent/JPH09219637A/ja
Publication of JPH09219637A5 publication Critical patent/JPH09219637A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/165—Modifications for eliminating interference voltages or currents in field-effect transistor switches by feedback from the output circuit to the control circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0005—Modifications of input or output impedance

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
JP8289574A 1995-10-31 1996-10-31 駆動回路 Pending JPH09219637A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/551,221 US5739715A (en) 1995-10-31 1995-10-31 Digital signal driver circuit having a high slew rate
US551,221 1995-10-31

Publications (2)

Publication Number Publication Date
JPH09219637A true JPH09219637A (ja) 1997-08-19
JPH09219637A5 JPH09219637A5 (enExample) 2004-08-26

Family

ID=24200358

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8289574A Pending JPH09219637A (ja) 1995-10-31 1996-10-31 駆動回路

Country Status (2)

Country Link
US (1) US5739715A (enExample)
JP (1) JPH09219637A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003528525A (ja) * 2000-03-20 2003-09-24 モトローラ・インコーポレイテッド 負荷容量補償バッファ、装置及びその方法
JP2008502288A (ja) * 2004-06-08 2008-01-24 トランスメータ・コーポレーション 異なる作動電圧範囲及びリセット電圧範囲を有するリピータ回路及びその方法
JP2008502286A (ja) * 2004-06-08 2008-01-24 トランスメータ・コーポレーション 高性能リピータモードおよび通常リピータモードを有するリピータ回路
JP2008502287A (ja) * 2004-06-08 2008-01-24 トランスメータ・コーポレーション ワイヤ遷移を検出し支援する回路および方法

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5926049A (en) * 1997-04-11 1999-07-20 Level One Communications, Inc. Low power CMOS line driver with dynamic biasing
DE19944519B4 (de) * 1999-09-16 2010-02-11 Infineon Technologies Ag Schaltungsanordnung zum Ansteuern einer Last
GB2388981B (en) * 2002-05-20 2006-11-15 Micron Technology Inc Increasing drive strength and reducing propagation delays through the use of feedback
US7635992B1 (en) 2004-06-08 2009-12-22 Robert Paul Masleid Configurable tapered delay chain with multiple sizes of delay elements
US7336103B1 (en) * 2004-06-08 2008-02-26 Transmeta Corporation Stacked inverter delay chain
US7498846B1 (en) 2004-06-08 2009-03-03 Transmeta Corporation Power efficient multiplexer
US7656212B1 (en) 2004-06-08 2010-02-02 Robert Paul Masleid Configurable delay chain with switching control for tail delay elements
US7405597B1 (en) * 2005-06-30 2008-07-29 Transmeta Corporation Advanced repeater with duty cycle adjustment
US7304503B2 (en) 2004-06-08 2007-12-04 Transmeta Corporation Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability
US7071747B1 (en) 2004-06-15 2006-07-04 Transmeta Corporation Inverting zipper repeater circuit
US7592842B2 (en) * 2004-12-23 2009-09-22 Robert Paul Masleid Configurable delay chain with stacked inverter delay elements
US7394681B1 (en) 2005-11-14 2008-07-01 Transmeta Corporation Column select multiplexer circuit for a domino random access memory array
JP4836592B2 (ja) * 2006-02-09 2011-12-14 ソニー株式会社 ロボット装置及びその制御方法
US7710153B1 (en) 2006-06-30 2010-05-04 Masleid Robert P Cross point switch
CN109600128A (zh) * 2013-03-09 2019-04-09 密克罗奇普技术公司 电感性负载驱动器转换速率控制器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0720060B2 (ja) * 1985-08-14 1995-03-06 株式会社東芝 出力回路装置
US4638187A (en) * 1985-10-01 1987-01-20 Vtc Incorporated CMOS output buffer providing high drive current with minimum output signal distortion
JPS62292015A (ja) * 1986-06-11 1987-12-18 Nec Corp 出力バツフア回路
US4731553A (en) * 1986-09-30 1988-03-15 Texas Instruments Incorporated CMOS output buffer having improved noise characteristics
JPS63245119A (ja) * 1987-03-31 1988-10-12 Mitsubishi Electric Corp バツフア回路
JPS63299513A (ja) * 1987-05-29 1988-12-07 Toshiba Corp 出力回路
US4829199A (en) * 1987-07-13 1989-05-09 Ncr Corporation Driver circuit providing load and time adaptive current
US5293082A (en) * 1988-06-21 1994-03-08 Western Digital Corporation Output driver for reducing transient noise in integrated circuits
JPH03242020A (ja) * 1990-02-20 1991-10-29 Nec Corp 出力バッファ
JP2616142B2 (ja) * 1990-05-31 1997-06-04 日本電気株式会社 出力回路
US5122690A (en) * 1990-10-16 1992-06-16 General Electric Company Interface circuits including driver circuits with switching noise reduction
JPH04192716A (ja) * 1990-11-26 1992-07-10 Mitsubishi Electric Corp Ｍｏｓトランジスタ出力回路
JPH05327443A (ja) * 1992-05-15 1993-12-10 Nec Corp バッファ回路

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003528525A (ja) * 2000-03-20 2003-09-24 モトローラ・インコーポレイテッド 負荷容量補償バッファ、装置及びその方法
JP2008502288A (ja) * 2004-06-08 2008-01-24 トランスメータ・コーポレーション 異なる作動電圧範囲及びリセット電圧範囲を有するリピータ回路及びその方法
JP2008502286A (ja) * 2004-06-08 2008-01-24 トランスメータ・コーポレーション 高性能リピータモードおよび通常リピータモードを有するリピータ回路
JP2008502287A (ja) * 2004-06-08 2008-01-24 トランスメータ・コーポレーション ワイヤ遷移を検出し支援する回路および方法
JP4875620B2 (ja) * 2004-06-08 2012-02-15 インテレクチュアル ベンチャー ファンディング エルエルシー 高性能リピータモードおよび通常リピータモードを有するリピータ回路

Also Published As

Publication number Publication date
US5739715A (en) 1998-04-14

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