JPH0917769A - 薄膜層パターニング方法 - Google Patents
薄膜層パターニング方法Info
- Publication number
- JPH0917769A JPH0917769A JP7349864A JP34986495A JPH0917769A JP H0917769 A JPH0917769 A JP H0917769A JP 7349864 A JP7349864 A JP 7349864A JP 34986495 A JP34986495 A JP 34986495A JP H0917769 A JPH0917769 A JP H0917769A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- layer
- film layer
- intermediate layer
- patterning method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 75
- 238000000059 patterning Methods 0.000 title claims abstract description 33
- 238000000034 method Methods 0.000 title claims abstract description 28
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 239000004065 semiconductor Substances 0.000 claims description 12
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 3
- 229910000077 silane Inorganic materials 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 239000010408 film Substances 0.000 description 6
- 229910004298 SiO 2 Inorganic materials 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 3
- 230000031700 light absorption Effects 0.000 description 3
- 239000011358 absorbing material Substances 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000000992 sputter etching Methods 0.000 description 2
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Plasma & Fusion (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Drying Of Semiconductors (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1995/18640 | 1995-06-30 | ||
KR1019950018640A KR0174951B1 (ko) | 1995-06-30 | 1995-06-30 | 미세 패턴 형성 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0917769A true JPH0917769A (ja) | 1997-01-17 |
Family
ID=19419084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7349864A Pending JPH0917769A (ja) | 1995-06-30 | 1995-12-21 | 薄膜層パターニング方法 |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPH0917769A (zh) |
KR (1) | KR0174951B1 (zh) |
CN (1) | CN1139767A (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100383667C (zh) * | 2002-02-08 | 2008-04-23 | 旺宏电子股份有限公司 | 半导体元件的图案转移的方法 |
-
1995
- 1995-06-30 KR KR1019950018640A patent/KR0174951B1/ko not_active IP Right Cessation
- 1995-12-21 JP JP7349864A patent/JPH0917769A/ja active Pending
- 1995-12-28 CN CN95121173A patent/CN1139767A/zh active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100383667C (zh) * | 2002-02-08 | 2008-04-23 | 旺宏电子股份有限公司 | 半导体元件的图案转移的方法 |
Also Published As
Publication number | Publication date |
---|---|
CN1139767A (zh) | 1997-01-08 |
KR0174951B1 (ko) | 1999-04-01 |
KR970003554A (ko) | 1997-01-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2593601B2 (ja) | 位相シフトマスクの作製方法 | |
KR950008384B1 (ko) | 패턴의 형성방법 | |
US5234780A (en) | Exposure mask, method of manufacturing the same, and exposure method using the same | |
EP0773477B1 (en) | Process for producing a phase shift photomask | |
JPH0455323B2 (zh) | ||
WO1985004026A1 (en) | Method for making integrated circuit devices using a layer of indium arsenide as an antireflective coating | |
US5609994A (en) | Method for patterning photoresist film having a stepwise thermal treatment | |
JPH0917769A (ja) | 薄膜層パターニング方法 | |
JPH07273021A (ja) | 半導体装置の製造方法 | |
JP2560773B2 (ja) | パターン形成方法 | |
JPH07106224A (ja) | パターン形成方法 | |
US5882825A (en) | Production method of a phase shift photomask having a phase shift layer comprising SOG | |
JPS63258022A (ja) | 半導体装置の製造方法 | |
KR0130168B1 (ko) | 미세 패턴 형성방법 | |
KR940005623B1 (ko) | 패턴형성방법 | |
JPS63110725A (ja) | 半導体装置の製造方法 | |
JP2802611B2 (ja) | 位相反転マスク | |
JPH04239116A (ja) | 半導体装置の製造方法 | |
JPH0574701A (ja) | レジストパターン形成方法 | |
KR0139578B1 (ko) | 리소그래피 공정에 의한 감광막 패턴 형성방법 | |
JP2666420B2 (ja) | 半導体装置の製造方法 | |
JPH01238659A (ja) | パターン形成方法 | |
JPH08293454A (ja) | レジストパターンの形成方法 | |
JPS6351637A (ja) | マスク形成方法 | |
JPH05304167A (ja) | レジストパターン形成方法 |