JPH08316602A - Circuit board - Google Patents

Circuit board

Info

Publication number
JPH08316602A
JPH08316602A JP34038195A JP34038195A JPH08316602A JP H08316602 A JPH08316602 A JP H08316602A JP 34038195 A JP34038195 A JP 34038195A JP 34038195 A JP34038195 A JP 34038195A JP H08316602 A JPH08316602 A JP H08316602A
Authority
JP
Japan
Prior art keywords
hole
pattern
circuit pattern
conductive
conductive material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34038195A
Other languages
Japanese (ja)
Inventor
Toshiji Shimamoto
敏次 島本
Toshihiro Katayama
俊宏 片山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokuyama Corp
Original Assignee
Tokuyama Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokuyama Corp filed Critical Tokuyama Corp
Priority to JP34038195A priority Critical patent/JPH08316602A/en
Publication of JPH08316602A publication Critical patent/JPH08316602A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE: To improve electrical contact between a through hole part and a circuit pattern, by filling a through hole with a hardening conductive material in a way that the same horizontal face as the circuit pattern is formed, and making a conductive pattern cover the contact part between the hardened part and the circuit pattern. CONSTITUTION: A through hole 3 is filled with a conductive material 4 to form a through hole part with the same face as both sides or at least one face of the circuit pattern 2. A conductive pattern 7 made of hardening conductive material is formed with uniform thickness at a contact part between the through hole part and the surface circuit pattern 2 so that the conductive pattern 7 covers the contact part. Then, the through hole part and the surface circuit pattern 2 are connected electrically to each other. In addition, the circuit pattern 2 connected to the through hole part may have a land part 8 and preferably, the conductive pattern 7 covering the land part 8 is formed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、新規な回路基板に
関する。詳しくは両面に回路パターンを有する回路基
板、或いは積層体の少なくとも一表面と複数の絶縁基板
の間に回路パターンを有する回路基板において、該回路
パターン間の導通を硬化性導電物質の硬化体よりなるス
ルーホール部を設けて行う場合に、信頼性よく、且つ簡
便に行うことが可能な回路基板に関する。
TECHNICAL FIELD The present invention relates to a novel circuit board. Specifically, in a circuit board having a circuit pattern on both sides or a circuit board having a circuit pattern between at least one surface of a laminate and a plurality of insulating substrates, conduction between the circuit patterns is made of a cured body of a curable conductive material. The present invention relates to a circuit board which is reliable and can be easily performed when a through hole portion is provided.

【0002】[0002]

【従来の技術】一般に、両面に回路パターンを形成した
回路基板における表裏の回路パターンの導通は、スルー
ホール部を介して行われる。従来、かかるスルーホール
部を有する回路基板の製造方法としては、(イ)両面に
導電層を有する絶縁基板にドリリングにより貫通孔を形
成し、該貫通孔に化学鍍金・電気鍍金を施した後、該導
電層をエッチングすることにより回路パターンを形成す
る方法、或いは、(ロ)両面に導電層を有する絶縁基板
に、ドリリングまたはパンチングによりスルーホール用
の貫通孔を形成した後、該導電層をエッチングして回路
パターンを形成し、次いで、該貫通孔に銅ペースト・銀
ペーストに代表される硬化性導電物質をスクリーン印刷
法或いはピン挿入法により充填、硬化して導電物質が充
填されたスルーホールを形成する方法などが一般に知ら
れている。
2. Description of the Related Art In general, a circuit board having circuit patterns formed on both sides is electrically connected to the circuit patterns on the front and back sides through through holes. Conventionally, as a method of manufacturing a circuit board having such through-hole portions, (a) through holes are formed in an insulating substrate having conductive layers on both sides by drilling, and after the through holes are subjected to chemical plating / electroplating, A method of forming a circuit pattern by etching the conductive layer, or (b) forming through holes for through holes by drilling or punching in an insulating substrate having conductive layers on both sides, and then etching the conductive layer To form a circuit pattern, and then a curable conductive material typified by a copper paste / silver paste is filled into the through hole by a screen printing method or a pin insertion method and cured to form a through hole filled with a conductive material. A forming method and the like are generally known.

【0003】特に、上記の(イ)の回路基板の製造方法
は、古くから工業的に行われているものであり、現在の
主流を占めている。
In particular, the above-mentioned method (a) for manufacturing a circuit board has been industrially carried out for a long time and occupies the present mainstream.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上記
(イ)の回路基板の製造方法において、スルーホール部
の信頼性を向上させるためには鍍金を2度以上にわたっ
て行う必要があり、コストの面では必ずしも有利な方法
とは言えない。また、回路基板全面に電気鍍金が行われ
るため、導電層の厚みが不均一となり、パターン形成の
ためのエッチングの際、バラツキが生じるおそれがあ
る。そのため、ファインパターンを有する回路基板への
対応が困難であるという欠点を有している。
However, in the method of manufacturing a circuit board described in (a) above, it is necessary to perform plating twice or more in order to improve the reliability of the through hole portion, which is costly. It is not always an advantageous method. Further, since the electroplating is performed on the entire surface of the circuit board, the thickness of the conductive layer becomes non-uniform, and variations may occur during etching for pattern formation. Therefore, it has a drawback that it is difficult to deal with a circuit board having a fine pattern.

【0005】また、上記(ロ)の回路基板の製造方法
は、スルーホール用貫通孔内への化学鍍金・電気鍍金が
必要ないため、製造工程が短い等の特徴を有しているこ
とから近年需要が増大しつつあるが、導電物質を充填し
て得られたスルーホール部は、これに接続する配線パタ
ーンとの電気的な接続の信頼性を確保するため、スルー
ホール用貫通孔の周囲にまで導電物質を覆い被せ、回路
基板の平面よりも突出するように充填する必要がある。
その結果、得られた回路基板は、突出した導電物質によ
る基板表面の凹凸が表面実装部品の実装時における半田
ペースト印刷の障害となり、表面実装部品を信頼性良く
接続する妨げとなっている。
In addition, the above-mentioned method (b) for manufacturing a circuit board is characterized in that the manufacturing process is short because chemical plating / electroplating is not required in the through-holes for through-holes. Demand is increasing, but the through-hole portion obtained by filling with a conductive material is placed around the through-hole for through-hole in order to secure the reliability of the electrical connection with the wiring pattern connected to this. It is necessary to cover it with a conductive material and to fill it so as to protrude from the plane of the circuit board.
As a result, in the obtained circuit board, the unevenness of the board surface due to the protruding conductive material becomes an obstacle to solder paste printing at the time of mounting the surface mount component, which hinders reliable connection of the surface mount component.

【0006】一方、本発明者らは、上記(ロ)の回路基
板を改良すべく、スルーホール用貫通孔に硬化性導電物
質を突出するように充填・硬化した後、導電物質よりな
る突出部を絶縁基板の両面に設けられた導電層と同一表
面を形成するように研削してスルーホール部を形成し、
ついで、導電層のエッチングを行い回路パターンを形成
した回路基板を提供した。また、この場合、スルーホー
ル部の導電物質と導電層の上に共通した鍍金層を形成
し、その後、導電層のエッチングを行って回路パターン
を形成させ、該回路パターンと該スルーホール部との電
気的接続の信頼性を向上する手段についても提案した。
On the other hand, in order to improve the circuit board of the above (b), the present inventors fill and harden the through holes for through holes so as to project the curable conductive material, and then form the protruding portion made of the conductive material. To form through holes by grinding so as to form the same surface as the conductive layers provided on both sides of the insulating substrate,
Then, a conductive layer was etched to provide a circuit board on which a circuit pattern was formed. Further, in this case, a common plating layer is formed on the conductive material and the conductive layer in the through hole portion, and then the conductive layer is etched to form a circuit pattern, and the circuit pattern and the through hole portion are formed. We also proposed means to improve the reliability of electrical connections.

【0007】上記方法によって得られた回路基板は、基
板表面の凹凸も少なく、表面実装部品の実装時における
半田ペースト印刷も良好に行え、表面実装部品を信頼性
よく接続することが可能であるが、導電層上に更に鍍金
層を形成する必要があり、前記(イ)の回路基板までで
はないが、ファインパターンの形成において若干の問題
を有していた。
The circuit board obtained by the above method has few irregularities on the surface of the board, and solder paste printing can be favorably performed at the time of mounting the surface mount component, and the surface mount component can be connected with high reliability. It is necessary to further form a plating layer on the conductive layer, and there are some problems in forming a fine pattern, although not limited to the circuit board of the above (a).

【0008】[0008]

【課題を解決するための手段】本発明者らは、スルーホ
ール部を有する回路基板における上記の問題を解決すべ
く鋭意研究を重ねた。
DISCLOSURE OF THE INVENTION The inventors of the present invention have conducted extensive studies to solve the above problems in a circuit board having a through hole portion.

【0009】その結果、スルーホール用貫通孔に導電性
物質が充填されて表面の回路パターンと同一平面を有す
るスルーホール部が形成され、該スルーホール部と表面
の回路パターンとの接続部分を覆うように硬化性導電物
質による均一な厚みの導電パターンが形成された回路基
板が、該スルーホール部とこれに接続する表面の回路パ
ターンとの電気的接続の信頼性の向上を極めて効果的に
図ることができること、また、該導電パターンの形成は
印刷等の簡易な方法により行うことができ、且つ鍍金に
よる手段に比べて導電層の厚みに影響を与えないため、
回路パターンの形成におけるエッチングにも悪影響を与
えることがなく、高度なファインパターンにも十分に対
応し得ることを見いだし、本発明を完成するに至った。
As a result, a conductive material is filled in the through hole for a through hole to form a through hole portion having the same plane as the surface circuit pattern, and the connection portion between the through hole portion and the surface circuit pattern is covered. As described above, the circuit board on which the conductive pattern having a uniform thickness is formed by the curable conductive material extremely effectively improves the reliability of the electrical connection between the through hole portion and the circuit pattern on the surface connected to the through hole portion. In addition, since the conductive pattern can be formed by a simple method such as printing, and does not affect the thickness of the conductive layer as compared with plating,
The present invention has been completed by finding that it does not adversely affect etching in forming a circuit pattern and can sufficiently deal with a high-level fine pattern.

【0010】即ち、本発明は、両面に回路パターンが形
成された絶縁基板よりなり、該絶縁基板の両面に存在す
る回路パターン間の電気的な接続が必要な箇所に、該絶
縁基板を貫通するスルーホール用貫通孔が設けられ、該
スルーホール用貫通孔に導電物質が充填されて該回路パ
ターンと実質的に同一平面を有するスルーホール部が形
成され、且つ、該スルーホール部と回路パターンとの接
続部分を覆う均一な厚みの、硬化性導電物質の硬化体よ
りなる導電パターンが形成されたことを特徴とする回路
基板である。
That is, the present invention comprises an insulating substrate having circuit patterns formed on both sides thereof, and penetrates the insulating substrate to a location where electrical connection between circuit patterns on both sides of the insulating substrate is required. A through hole for a through hole is provided, a through hole is filled with a conductive material to form a through hole portion having substantially the same plane as the circuit pattern, and the through hole portion and the circuit pattern are formed. Is a circuit board having a uniform thickness and a conductive pattern made of a cured body of a curable conductive material, which covers the connection part.

【0011】[0011]

【発明の実施の形態】以下、本発明を添付図面に従って
更に詳細に説明するが、本発明はこれら添付図面になん
ら限定されるものではない。本発明の回路基板の代表的
な態様を図1および図2に示した。
BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in more detail below with reference to the accompanying drawings, but the present invention is not limited to these accompanying drawings. A typical embodiment of the circuit board of the present invention is shown in FIGS.

【0012】図1において、絶縁基板1は特に制限され
ず、公知の材質、構造を有するものが制限なく使用する
ことができる。例えば、紙基材−フェノール樹脂積層基
板、紙基材−エポキシ樹脂積層基板、紙基材−ポリエス
テル樹脂積層基板、ガラス基材−エポキシ樹脂積層基
板、紙基材−テフロン樹脂積層基板、ガラス基材−ポリ
イミド樹脂積層基板、ガラス基材−BT(ビスマレイミ
ド−トリアジン)レジン樹脂積層基板、コンポジット樹
脂基板等の合成樹脂基板や、ポリイミド樹脂、ポリエス
テル樹脂等のフレキシブル基板や、アルミニウム、鉄、
ステンレス等の金属をエポキシ樹脂等で覆って絶縁処理
した金属系絶縁基板、あるいはセラミックス基板等が挙
げられる。
In FIG. 1, the insulating substrate 1 is not particularly limited, and those having known materials and structures can be used without limitation. For example, paper base material-phenolic resin laminated board, paper base material-epoxy resin laminated board, paper base material-polyester resin laminated board, glass base material-epoxy resin laminated board, paper base material-Teflon resin laminated board, glass base material -Polyimide resin laminated substrate, glass base material-BT (bismaleimide-triazine) resin resin laminated substrate, synthetic resin substrate such as composite resin substrate, flexible substrate such as polyimide resin and polyester resin, aluminum, iron,
Examples thereof include a metal-based insulating substrate obtained by insulating a metal such as stainless steel with an epoxy resin or the like, or a ceramic substrate.

【0013】本発明の回路基板において複数の絶縁基板
の積層体を用いる場合、該積層体の形成方法は、特に限
定されない。通常、必要に応じて回路パターンが施され
た絶縁基板を積層する方法が採用され、一般的には、絶
縁基板間にプリプレグを挟み積層されるピンラミネート
方式およびマスラミネート方式が好適に用いられる。ま
た、絶縁基板の層数は、パターンの必要に応じて決定さ
れる。回路パターンは、該積層体の両表面或いは一表面
と、複数の絶縁基板の間に形成される。
When a laminate of a plurality of insulating substrates is used in the circuit board of the present invention, the method for forming the laminate is not particularly limited. Usually, a method of laminating insulating substrates provided with a circuit pattern as needed is adopted, and generally, a pin laminating method and a mass laminating method in which a prepreg is sandwiched between insulating substrates are preferably used. Further, the number of layers of the insulating substrate is determined according to the need of the pattern. The circuit pattern is formed between both surfaces or one surface of the laminate and a plurality of insulating substrates.

【0014】本発明の回路基板は、絶縁基板が1枚の場
合には、その両面に回路パターンを有しており、絶縁基
板が複数枚の積層体の場合には、少なくとも一表面と複
数の絶縁基板の間に回路パターンを有する。上記の回路
パターンとしては、配線パターン、ランド部、パッド部
等の公知のパターンが必要に応じて形成される。
The circuit board of the present invention has a circuit pattern on both sides in the case of one insulating substrate, and at least one surface and a plurality of layers in the case of a laminated body of a plurality of insulating substrates. A circuit pattern is provided between the insulating substrates. As the circuit pattern, a known pattern such as a wiring pattern, a land portion, a pad portion or the like is formed as needed.

【0015】形成される回路パターンの材質は特に制限
されないが、代表的な材質を例示すれば、銅、ニッケル
等が挙げられる。また、上記回路パターンの厚み等につ
いても特に制限されないが、一般には、5〜70μmの
厚みが適当である。
The material of the circuit pattern to be formed is not particularly limited, but typical examples of the material include copper and nickel. The thickness of the circuit pattern is not particularly limited, but generally a thickness of 5 to 70 μm is suitable.

【0016】本発明において、スルーホール用貫通孔3
は、絶縁基板が1枚の場合にはその両面に形成された回
路パターン間の電気的な接続の必要な箇所に、また、絶
縁基板が複数の積層体の場合には、積層体の表面に形成
された回路パターンと絶縁基板の間に形成された回路パ
ターンとの間、または、該積層体の両表面に回路パター
ンが形成されている場合には、両表面回路パターン同士
の間、さらには、該積層体の両表面の回路パターンと絶
縁基板の間に形成された回路パターンとの間で電気的な
接続の必要な箇所に設けられる。
In the present invention, the through hole 3 for through hole is used.
On the surface of the laminated body when the number of insulating substrates is one, and on the surface of the laminated body when the insulating substrates are a plurality of laminated bodies. Between the formed circuit pattern and the circuit pattern formed between the insulating substrates, or in the case where circuit patterns are formed on both surfaces of the laminate, between both surface circuit patterns, and further , Are provided at locations where electrical connection is required between the circuit patterns on both surfaces of the laminate and the circuit patterns formed between the insulating substrates.

【0017】該スルーホール用貫通孔3の径は、特に制
限されるのものではなく、任意に設定することができ
る。本発明において、上記スルーホール用貫通孔の径
は、導電物質を充填することが可能な程度の孔径以上、
通常0.1mm以上、好ましくは、0.2mm〜2mm
より選択することができる。そして、本発明において
は、かかる微少な孔径であっても確実に導通をとること
が可能であるため、後記するファインパターンの形成に
有効である。本発明において、上記スルーホール用貫通
孔3には、導電物質4が充填されて両面或いは少なくと
も一表面の回路パターン(以下表面回路パターンと記
す)2と実質的に同一平面を有するスルーホール部が形
成される。該導電物質4の材質は、スルーホール用貫通
孔3に固定されると共に、導電性を有するものであれば
特に制限されない。本発明においては、回路基板の製造
工程において、スルーホール用貫通孔3への充填の容易
さや、生産性の面などから、硬化後に導電性を有する硬
化体を与える硬化性導電物質9が好適である。
The diameter of the through hole 3 for through hole is not particularly limited and can be set arbitrarily. In the present invention, the diameter of the through hole for the through hole is equal to or larger than the diameter of the hole capable of being filled with a conductive substance,
Usually 0.1 mm or more, preferably 0.2 mm to 2 mm
You can choose more. Further, in the present invention, it is possible to surely establish conduction even with such a minute hole diameter, which is effective for forming a fine pattern described later. In the present invention, the through hole 3 for through hole has a through hole portion which is filled with the conductive material 4 and has substantially the same plane as the circuit pattern 2 on both sides or at least one surface (hereinafter referred to as a surface circuit pattern) 2. It is formed. The material of the conductive material 4 is not particularly limited as long as it is fixed to the through hole 3 for through hole and has conductivity. In the present invention, the curable conductive material 9 that gives a cured product having conductivity after curing is suitable in the process of manufacturing a circuit board in view of ease of filling the through holes 3 for through holes, productivity, and the like. is there.

【0018】上記硬化性導電物質9としては、金、銀、
銅、ニッケル、鉛、カーボン等よりなる粉状の導電材料
とエポキシ樹脂、フェノール樹脂等の架橋性の熱硬化性
樹脂とを必要により有機溶剤と共に混合してペースト状
とした公知の硬化性導電物質を使用することができる。
これらの硬化性導電物質の中から、エッチングに使用す
るエッチング液、例えば、塩化第二鉄エッチング液、塩
化第二銅エッチング液、過硫酸アンモニウムエッチング
液、過硫酸ナトリウムエッチング液、過硫酸カリウムエ
ッチング液、過酸化水素/硫酸エッチング液、硫酸アン
モニウム錯イオンを主成分とするアルカリ性エッチング
液等のエッチング液により実質的に溶解されない硬化体
を与えるものを選択して使用することが好ましい。
As the curable conductive material 9, gold, silver,
A known curable conductive substance which is made into a paste by mixing a powdery conductive material made of copper, nickel, lead, carbon or the like and a crosslinkable thermosetting resin such as epoxy resin or phenol resin together with an organic solvent as necessary. Can be used.
From these curable conductive materials, the etching solution used for etching, for example, ferric chloride etching solution, cupric chloride etching solution, ammonium persulfate etching solution, sodium persulfate etching solution, potassium persulfate etching solution, It is preferable to select and use a material that gives a cured product that is not substantially dissolved by an etching solution such as a hydrogen peroxide / sulfuric acid etching solution or an alkaline etching solution containing ammonium sulfate complex ions as a main component.

【0019】また、上記硬化性導電物質9は、良好なス
ルーホール抵抗を得るために、硬化後の電気抵抗が、1
×10-2Ω・cm以下となるように、導電材料の選択、
及び使用量を調節することが好ましい。
The curable conductive material 9 has a cured electric resistance of 1 in order to obtain good through-hole resistance.
Selection of conductive material so that it is less than × 10 -2 Ω · cm,
And it is preferable to adjust the amount used.

【0020】本発明において、スルーホール用貫通孔3
に充填された導電物質4と表面回路パターン2とが実質
的に同一平面をなすように形成することが、得られる回
路基板への表面実装部品の実装時における半田ペースト
印刷を良好に行うことができ、表面実装部品を信頼性よ
く接続するために重要であり、また該スルーホール部と
表面回路パターン2との接続部分を覆うように形成され
る硬化性導電物質の硬化体よりなる導電パターン7を、
精度よく且つ高い信頼性で確実に形成するために必要で
ある。
In the present invention, through hole 3 for through hole
It is preferable that the conductive material 4 and the surface circuit pattern 2 that are filled in the surface be formed so as to be substantially coplanar with each other so that the solder paste can be printed well when the surface mount component is mounted on the obtained circuit board. The conductive pattern 7 is made of a hardened material of a curable conductive material and is formed so as to cover the connection portion between the through-hole portion and the surface circuit pattern 2 and is important for reliable connection of the surface mount component. To
It is necessary for forming with accuracy and high reliability.

【0021】本発明において、上記スルーホール部と表
面回路パターン2との接続部分は、該接続部分を覆うよ
うに硬化性導電物質の硬化体による均一な厚みの導電パ
ターン7が形成され、スルーホール部と表面回路パター
ンの電気的な接続がなされる。
In the present invention, at the connecting portion between the through hole portion and the surface circuit pattern 2, a conductive pattern 7 having a uniform thickness is formed by a cured body of a curable conductive material so as to cover the connecting portion, and the through hole is formed. Electrical connection between the parts and the surface circuit pattern is made.

【0022】上記導電パターン7でスルーホール部と表
面回路パターン2との接続部分を均一な厚みで覆うこと
により、簡易な手段で、スルーホール部と表面回路パタ
ーン2との電気的接続の信頼性を確実に向上させること
が可能となる。かかる手段は、スルーホール部と表面回
路パターン2との電気的接続の信頼性を向上させる目的
で、前記した従来の導電物質をスルーホール用貫通孔の
周囲にまで覆い被せ、回路基板の平面よりも突出するよ
うに充填する手段よりも、回路基板の表面が平滑に維持
される点で、後工程の精度、部品の実装等において極め
て有利である。
By covering the connection portion between the through-hole portion and the surface circuit pattern 2 with the conductive pattern 7 with a uniform thickness, the reliability of the electrical connection between the through-hole portion and the surface circuit pattern 2 can be achieved by a simple means. It is possible to surely improve. In order to improve the reliability of the electrical connection between the through hole portion and the surface circuit pattern 2, such means covers the through holes for through holes with the above-mentioned conventional conductive material so as to cover the surface of the circuit board. Also, the surface of the circuit board is maintained smoother than the means for filling so as to project, which is extremely advantageous in accuracy of the post-process, mounting of components, and the like.

【0023】また、同目的で、スルーホール部と回路パ
ターンとを鍍金層によって覆う手段では、スルーホール
部に充填された導電物質の硬化体と鍍金層との、熱膨張
係数の差が大きく、部品実装のリフロー時において熱応
力が該鍍金層に集中し、場合によっては、スルーホール
の導通不良につながるおそれがある。これに対して、本
発明は、スルーホール部に充填される導電物質と、スル
ーホール部と回路パターンを覆う硬化性導電物質とし
て、これらの硬化体の熱膨張係数の近似しているものを
使用すれば、リフロー時に発生する熱応力が小さく、高
い接続信頼性を得ることができる。更に、エッチングの
ばらつきの原因である鍍金層を有さないため、回路パタ
ーンの形成精度に関して有利である。
Further, for the same purpose, in the means for covering the through hole portion and the circuit pattern with the plating layer, the difference in the coefficient of thermal expansion between the hardened body of the conductive material filled in the through hole portion and the plating layer is large, Thermal stress concentrates on the plating layer at the time of reflow for mounting components, which may lead to poor conduction of the through hole in some cases. On the other hand, in the present invention, as the conductive material with which the through hole portion is filled and the curable conductive material that covers the through hole portion and the circuit pattern, those having similar thermal expansion coefficients of these cured bodies are used. By doing so, thermal stress generated during reflow is small and high connection reliability can be obtained. Furthermore, since the plating layer that causes the variation in etching is not included, it is advantageous in terms of circuit pattern formation accuracy.

【0024】上記導電パターン7によってスルーホール
部と表面回路パターン2との接続部分を覆う態様は、少
なくともスルーホール部の周縁と表面回路パターン2と
が接触する箇所を覆って導電パターンが存在する態様で
あればよいが、より好ましくは、スルーホール部の実質
的に全表面とスルーホール部に接続する表面回路パター
ンの辺縁部とを覆う態様が好ましい。かかる回路パター
ンの辺縁部の幅は回路パターンの回路幅等にもよるが、
一般には、信頼性を考慮すれば該スルーホール部との接
触境界線から0.05mm以上で決定することが好まし
い。
In the embodiment in which the connecting portion between the through hole portion and the surface circuit pattern 2 is covered with the conductive pattern 7, the conductive pattern is present so as to cover at least the contact portion between the peripheral edge of the through hole portion and the surface circuit pattern 2. However, it is more preferable to cover substantially the entire surface of the through hole and the peripheral portion of the surface circuit pattern connected to the through hole. The width of the peripheral portion of the circuit pattern depends on the circuit width of the circuit pattern, etc.
Generally, in consideration of reliability, it is preferable that the distance is 0.05 mm or more from the contact boundary line with the through hole portion.

【0025】また、図1の(A)に示すように、更に、
信頼性を向上させるため、スルーホール部に接続する回
路パターン2にランド部8を設け、上記導電パターンを
該ランド部も含めて覆うように形成することが更に好ま
しい。該ランド部の大きさはスルーホール部の周からの
長さが0.05mm以上がよいが、回路基板の配線密度
を考慮すると2mm以下になるように設計することが好
適である。勿論、図1の(B)に示すようにランド部を
形成しない態様であっても十分に信頼性を確保すること
が可能である。
Further, as shown in FIG.
In order to improve reliability, it is more preferable that the land portion 8 is provided in the circuit pattern 2 connected to the through hole portion, and the conductive pattern is formed so as to cover the land portion as well. The size of the land portion is preferably 0.05 mm or more from the circumference of the through hole portion, but it is preferable to design the land portion to be 2 mm or less in consideration of the wiring density of the circuit board. Of course, it is possible to secure sufficient reliability even in the mode in which the land portion is not formed as shown in FIG.

【0026】上記の導電パターン7によってスルーホー
ル部と表面回路パターン2との接続部分を覆う何れの態
様においても、図6に示すように、スルーホール部と該
表面回路パターンの接続部分の形状を、いわゆるティア
ドロップ状に形成することもできる。上記接続部分をテ
ィアドロップ状に形成することで、該導電パターン7に
覆われる表面回路パターンの面積が増し、特に、図1の
(B)に示すランド部を設けない態様においても、接続
部の信頼性をより向上することが可能となる。
In any of the embodiments in which the connecting portion between the through hole portion and the surface circuit pattern 2 is covered with the conductive pattern 7, the shape of the connecting portion between the through hole portion and the surface circuit pattern is changed as shown in FIG. It can also be formed in a so-called teardrop shape. By forming the connection portion in a tear drop shape, the area of the surface circuit pattern covered with the conductive pattern 7 increases, and even in the mode in which the land portion shown in FIG. The reliability can be further improved.

【0027】また、上記図1の(A)のように表面回路
パターン2にランド部8を設け、上記導電パターン7を
該ランド部8も含めて覆うように形成する態様では、図
7に示すように、該導電パターンをスルーホール部の中
心部を除いて、ドーナッツ状に形成することもできる。
このように導電パターン7をドーナッツ状に形成するこ
とで、後記する該導電パターンに使用される硬化性導電
物質の使用量を低減することができ、経済的にも有利で
ある。
Further, as shown in FIG. 1A, the land portion 8 is provided on the surface circuit pattern 2 and the conductive pattern 7 is formed so as to cover the land portion 8 as well, as shown in FIG. As described above, the conductive pattern may be formed in a donut shape except for the central portion of the through hole portion.
By forming the conductive pattern 7 in a donut shape in this manner, the amount of the curable conductive material used in the conductive pattern described later can be reduced, which is economically advantageous.

【0028】また、本発明において、上記スルーホール
部と該表面回路パターン2との接続部分を覆うように形
成される導電パターン7は、均一な厚みであることが必
要である。即ち、該導電パターンを均一にすることで、
安定したスルーホール抵抗値を得ることができ、製造時
の歩留まりが向上する。また、該導電パターンが厚みに
関して均一性を有することによって、部品の実装等にお
いて行う半田ペーストの印刷、オーバーコート層の形成
等を精度よく行うことができ、表面実装部品の接続信頼
性等が向上することができる。
In the present invention, the conductive pattern 7 formed so as to cover the connecting portion between the through hole portion and the surface circuit pattern 2 needs to have a uniform thickness. That is, by making the conductive pattern uniform,
A stable through-hole resistance value can be obtained, and the yield during manufacturing is improved. Further, since the conductive pattern has a uniform thickness, it is possible to accurately perform solder paste printing, overcoat layer formation, etc., when mounting components, etc., and improve connection reliability of surface mount components. can do.

【0029】更に、上記導電パターン7を均一な厚みに
することで、該導電パターン上において、表面実装部品
が安定な状態で搭載される。よって該導電パターン上に
表面実装部品を直接接続することが可能となるため、部
品実装密度を向上させることができる。
Further, by making the conductive pattern 7 have a uniform thickness, the surface mount component is mounted on the conductive pattern in a stable state. Therefore, since it becomes possible to directly connect the surface mount component to the conductive pattern, the component mount density can be improved.

【0030】上記導電パターン7の厚みは、特に制限さ
れないが、スルーホールの信頼性および半田ペーストの
印刷性を考慮すると5μm〜100μmの厚みが好まし
く。また、5〜50μmの範囲に制御すると部品実装が
極めて容易に行えるためさらに好適である。また、該導
電パターン7の厚みのばらつきは、該導電パターン7の
形成方法や表面実装部品の接続部の大きさに依存する
が、その平均厚みに対して±30%以下となるように調
整することが好ましい。
Although the thickness of the conductive pattern 7 is not particularly limited, a thickness of 5 μm to 100 μm is preferable in consideration of reliability of through holes and printability of solder paste. Further, it is more preferable to control the thickness in the range of 5 to 50 μm, because component mounting can be extremely easily performed. The variation in the thickness of the conductive pattern 7 depends on the method of forming the conductive pattern 7 and the size of the connection portion of the surface mount component, but is adjusted to be ± 30% or less of the average thickness. It is preferable.

【0031】更に、本発明においては、上記スルーホー
ル部と該表面回路パターン2との接続部分を覆うように
形成される導電パターン7の材質は、前記スルーホール
用貫通孔に充填する導電物質として使用される硬化性導
電物質と同材質のものを使用することもできるが、特
に、スルーホール用貫通孔に充填する導電物質より耐湿
性を備えた硬化体を与える硬化性導電物質を使用するこ
とが好ましい。
Further, in the present invention, the material of the conductive pattern 7 formed so as to cover the connecting portion between the through hole portion and the surface circuit pattern 2 is a conductive substance filled in the through hole for through hole. It is possible to use the same material as the curable conductive material used, but in particular, use a curable conductive material that gives a cured body with more moisture resistance than the conductive material filling the through holes for through holes. Is preferred.

【0032】かかる耐湿性を備えた導電パターン7を形
成することにより、信頼性、特に耐湿性に優れたスルー
ホール部を有する回路基板を得ることができる。
By forming the conductive pattern 7 having such moisture resistance, it is possible to obtain a circuit board having a through hole portion having excellent reliability, particularly moisture resistance.

【0033】上記耐湿性の硬化体を与える硬化性導電物
質は、公知の硬化性導電物質より選択して使用すること
ができる。例えば、上記耐湿性の硬化体を与える硬化性
導電物質に含まれる導電材料としては、特には制限され
ないが、酸化されにくく、且つ固有抵抗値の低い金、
銀、銅等の金属や、抵抗値は若干高いが全く酸化の影響
を受けないカーボン等が好適に使用できる。
The curable conductive substance which gives the above-mentioned moisture resistant cured product can be selected from known curable conductive substances and used. For example, the conductive material contained in the curable conductive substance that gives the moisture-resistant cured body is not particularly limited, but is hard to be oxidized, and gold having a low specific resistance value,
Metals such as silver and copper, and carbon which has a slightly high resistance value but is not affected by oxidation at all can be preferably used.

【0034】また、上記導電材料の中で、隣接する表面
回路パターン2との絶縁信頼性を考慮すれば、マイグレ
ーションの少ない金属を採用することが好ましい。中で
も、銅は導電性、酸化防止の作業性、コスト等から考え
て、特に好適に用いられる。
Further, among the above conductive materials, considering the insulation reliability with the adjacent surface circuit pattern 2, it is preferable to use a metal with less migration. Among them, copper is particularly preferably used in consideration of conductivity, workability for preventing oxidation, cost and the like.

【0035】更に、上記硬化性導電物質に含まれる銅等
の金属の酸化を防止するため、バインダー成分として熱
硬化時に還元性雰囲気を与えるレゾール型のフェノール
樹脂を主として使用したものがより好ましい。
Further, in order to prevent the oxidation of the metal such as copper contained in the curable conductive material, it is more preferable to mainly use a resol type phenol resin as a binder component which gives a reducing atmosphere during thermosetting.

【0036】上記レゾール型のフェノール樹脂をスルー
ホール用貫通孔3に充填する硬化性導電物質として用い
た場合、該樹脂の熱硬化時に副生成物として発生する水
分やホルマリンの影響でスルーホール内にボイドが発生
し、スルーホール内に充填された硬化性導電物質の硬化
体の導電性の低下、更には該スルーホール近辺の回路の
信頼性をも損ねるおそれが有るが、本発明においては、
導電パターン7の形成において有効に使用することがで
きる。
When the above-mentioned resol-type phenol resin is used as a curable conductive material for filling the through-holes 3 for through-holes, the through-holes will be formed in the through-holes due to the effects of water and formalin generated as by-products during thermosetting of the resin. Void occurs, the conductivity of the cured body of the curable conductive material filled in the through hole may decrease, and further, the reliability of the circuit in the vicinity of the through hole may be impaired, but in the present invention,
It can be effectively used in the formation of the conductive pattern 7.

【0037】一方、前記したように、スルーホール用貫
通孔3に充填する硬化性導電物質9は、特に限定されな
いが、バインダー成分として、バインダーの硬化時に副
生成物の発生の少ないエポキシ樹脂と硬化剤よりなるエ
ポキシ樹脂系バインダーを用いたものが好ましい。該バ
インダーを用いた硬化性導電物質は、耐湿性において、
前述のレゾール型のフェノール樹脂をバインダーとして
主として使用した硬化性導電物質より若干劣るものであ
る。しかしながら、本発明の上記態様によれば、かかる
耐湿性に乏しい硬化性導電物質を、導電パターン7の耐
湿性により保護することができ信頼性を一層高めること
が可能である。
On the other hand, as described above, the curable conductive material 9 to be filled in the through holes 3 for through holes is not particularly limited, but as a binder component, a curable conductive substance 9 and an epoxy resin which hardly generate by-products when the binder is cured are cured. It is preferable to use an epoxy resin binder composed of an agent. The curable conductive material using the binder has
It is slightly inferior to the curable conductive material mainly using the above-mentioned resol type phenol resin as a binder. However, according to the above aspect of the present invention, such a curable conductive substance having poor moisture resistance can be protected by the moisture resistance of the conductive pattern 7, and the reliability can be further enhanced.

【0038】尚、上記スルーホール用貫通孔に充填する
硬化性導電物質9の材質のうち、金属成分は特に制限は
されないが、隣接するスルーホールとの絶縁信頼性を考
慮すれば、マイグレーションの少ない金属を採用するこ
とが好ましい。中でも、銅は導電性、酸化防止の作業
性、コスト等から考えて、特に好適に用いられる。
Of the materials of the curable conductive material 9 to be filled in the through holes for through holes, the metal component is not particularly limited, but if the insulation reliability with adjacent through holes is taken into consideration, less migration will occur. It is preferable to employ a metal. Among them, copper is particularly preferably used in consideration of conductivity, workability for preventing oxidation, cost and the like.

【0039】本発明においては、スルーホール用貫通孔
3にはバインダーの硬化時に副生成物の発生の少ないエ
ポキシ樹脂系のバインダーを用いた硬化性導電物質9を
充填し、スルーホール内部の導電物質4を形成し、且つ
スルーホール部と表面回路パターン2の接続部分を覆う
ように形成される硬化性導電物質に、レゾール型のフェ
ノール樹脂をバインダー主成分とし、マイグレーション
の少ない銅を金属成分とした耐湿性銅ペーストを用いる
態様が最も推奨される。
In the present invention, the through holes 3 for through holes are filled with a curable conductive material 9 using an epoxy resin-based binder which causes less by-products when the binder is cured, and the conductive material inside the through holes is filled. No. 4 and a curable conductive material formed so as to cover the connection portion of the through-hole portion and the surface circuit pattern 2 with a resol type phenol resin as a binder main component and copper with less migration as a metal component. The embodiment using a moisture resistant copper paste is most recommended.

【0040】かかる構成でスルーホール部を形成するこ
とにより、スルーホール内部に欠陥が存在せず、且つ信
頼性の高いスルーホール部を有する回路基板を得ること
ができる。
By forming the through-hole portion with such a structure, it is possible to obtain a circuit board having a highly reliable through-hole portion without defects inside the through-hole.

【0041】本発明において他の部分は公知の技術を採
用でき、特に制限されない。例えば、回路パターンの接
続端子以外の部分は、公知の絶縁樹脂(レジスト)によ
り、オーバーコート層を形成することにより保護しても
良いし、該表面回路パターン2の表面に公知の手段によ
り接続端子を除いて形成された絶縁層を介して、銅等の
鍍金層よりなる回路パターンを形成することもできる。
In the present invention, known techniques can be used for the other portions and there is no particular limitation. For example, a portion of the circuit pattern other than the connection terminal may be protected by forming an overcoat layer with a known insulating resin (resist), or the surface of the surface circuit pattern 2 may be protected by a known means. It is also possible to form a circuit pattern made of a plated layer of copper or the like through the insulating layer formed except for.

【0042】また、表面実装部品が片面だけに実装され
る場合は、表面実装部品が実装される面のみを本発明の
回路基板の態様にすることもできる。即ち、部品が実装
されない面は、従来の導電物質をスルーホール用貫通孔
の周囲に覆い被せ、導電物質を回路基板の平面から突出
するように充填した状態にし、部品を実装する面のみに
本発明の回路基板の態様を採用することもできる。
When the surface mount component is mounted on only one surface, only the surface on which the surface mount component is mounted may be the circuit board of the present invention. That is, the surface on which the component is not mounted is covered with a conventional conductive material around the through-hole for the through hole, and the conductive material is filled so as to project from the plane of the circuit board. The circuit board aspect of the invention may also be employed.

【0043】更にまた、上記スルーホール部と表面回路
パターン2との接続部分を覆うように形成される導電パ
ターン7の材質に、硬化後に半田がコートできる硬化体
或いは通常端子鍍金等に用いられるニッケル・金鍍金を
形成することのできる硬化体を与える硬化性導電物質を
採用すると、導電パターン7(スルーホール部)上に表
面実装部品を直接接続することができるため、更に、部
品実装密度を向上することが可能となる。上記様態にお
ける該導電パターンの形状は、特に限定されないが、図
8に示すように、該導電パターンと表面実装部品の接続
の安定性を向上させるため、パッド部のほとんど全てを
覆い、パッド部を平坦な形状とすることが表面実装部品
の実装の容易さから好ましい。更に、実装部品を搭載す
る全てのパッド部についても該導電パターンを形成する
態様が、表面実装部品がより安定した状態で搭載される
ため、表面実装部品の実装の容易さから、更に好まし
い。
Furthermore, the material of the conductive pattern 7 formed so as to cover the connection portion between the through hole portion and the surface circuit pattern 2 is a hardened material which can be coated with solder after hardening, or nickel which is usually used for terminal plating or the like. When a curable conductive material that gives a hardened body capable of forming gold plating is adopted, surface mount components can be directly connected to the conductive pattern 7 (through hole portion), further improving the component mounting density. It becomes possible to do. The shape of the conductive pattern in the above mode is not particularly limited, but as shown in FIG. 8, in order to improve the stability of the connection between the conductive pattern and the surface mount component, almost all of the pad section is covered and the pad section is A flat shape is preferable in terms of ease of mounting the surface mount component. Furthermore, the mode in which the conductive patterns are formed on all the pad portions on which the mounting components are mounted is more preferable because the surface mounting components are mounted in a more stable state, and therefore the mounting of the surface mounting components is easy.

【0044】本発明の回路基板の態様は、特に制限され
るものではないが、代表的な態様を図1および図2に示
す。
The mode of the circuit board of the present invention is not particularly limited, but typical modes are shown in FIGS. 1 and 2.

【0045】図1の(A)に示す様態は、スルーホール
部に接続する両面の表面回路パターンにランド部8を設
け、導電パターン7を該ランド部も含めて覆うように形
成したものである。
In the mode shown in FIG. 1A, land portions 8 are provided on the surface circuit patterns on both surfaces connected to the through holes, and the conductive patterns 7 are formed so as to cover the land portions. .

【0046】図1の(B)に示す様態は、スルーホール
部に接続する両面の表面回路パターンにランド部8を設
けないで、導電パターン7を形成したものである。
In the mode shown in FIG. 1B, the conductive pattern 7 is formed without providing the land portion 8 on the surface circuit patterns on both surfaces connected to the through hole portion.

【0047】図1の(C)に示す様態は、スルーホール
部に接続する両面の表面回路パターンにランド部8を設
け、片面のみ導電パターン7を該ランド部も含めて覆う
ように形成したものである。
In the mode shown in FIG. 1C, the land portions 8 are provided on the surface circuit patterns on both surfaces connected to the through holes, and the conductive pattern 7 is formed so as to cover the conductive pattern 7 on only one surface. Is.

【0048】図1の(D)に示す様態は、スルーホール
部に接続する両面の表面回路パターンにランド部8を設
け、導電パターンを該ランド部も含めて覆うように形成
し、表面回路パターン部および導電パターン部の上にニ
ッケル・金鍍金層を設けたものである。これにより導電
パターンが半田濡れ性の悪い導電性ペーストである場合
においても、該導電パターン上に表面実装部品を搭載で
きる。
In the mode shown in FIG. 1D, the land portions 8 are provided on the surface circuit patterns on both surfaces connected to the through holes, and the conductive patterns are formed so as to cover the land portions. A nickel / gold plating layer is provided on the portion and the conductive pattern portion. Thereby, even when the conductive pattern is a conductive paste having poor solder wettability, the surface mount component can be mounted on the conductive pattern.

【0049】図2の(A)に示す様態は、3つの絶縁基
板の積層体よりなる回路基板であって、該絶縁基板の間
および該積層体の両表面に表面回路パターン2が形成さ
れた場合のもので、スルーホール部に接続する表面回路
パターン2にランド部8を設け、導電パターンを該ラン
ド部も含めて覆うように形成したものである。
The mode shown in FIG. 2A is a circuit board comprising a laminate of three insulating substrates, and the surface circuit pattern 2 is formed between the insulating substrates and on both surfaces of the laminate. In this case, the land portion 8 is provided on the surface circuit pattern 2 connected to the through hole portion, and the conductive pattern is formed so as to cover the land portion as well.

【0050】図2の(B)および(C)に示す様態は、
3つの絶縁基板の積層体よりなる回路基板であって、該
絶縁基板の間および該積層体の一表面に表面回路パター
ン2が形成された場合のもので、スルーホール部に接続
する表面回路パターン2にランド部8を設け、導電パタ
ーン7を該ランド部も含めて覆うように形成したもので
ある。
The modes shown in FIGS. 2B and 2C are as follows.
A circuit board comprising a laminated body of three insulating substrates, wherein the surface circuit pattern 2 is formed between the insulating substrates and on one surface of the laminated body, the surface circuit pattern being connected to the through hole portion. 2 is provided with a land portion 8 and is formed so as to cover the conductive pattern 7 including the land portion.

【0051】本発明の回路基板の製造方法は特に制限さ
れるものではないが、代表的な製造方法を例示すれば、
図3、図4及び図5に示す方法が挙げられる。
The method for manufacturing the circuit board of the present invention is not particularly limited, but if a typical manufacturing method is illustrated,
The method shown in FIGS. 3, 4 and 5 may be mentioned.

【0052】即ち、本発明の回路基板は図3に示すよう
に、(a)絶縁基板1の両面に形成された表面回路パタ
ーン2間の電気的な接続が必要な箇所にスルーホール用
貫通孔3を設け、(b)該スルーホール用貫通孔3に導
電性を有する硬化体を与える硬化性導電物質9を充填し
て硬化させた後、(c)絶縁基板の両面に形成された表
面回路パターン2及び導電物質4によって構成される表
面を実質的に平滑に研削し、(d)次いで、該スルーホ
ール部と上記表面回路パターン2との接続部分を覆うよ
うに硬化性導電物質を塗布して均一な厚みの導電パター
ン7を形成することによって得ることができる。
That is, in the circuit board of the present invention, as shown in FIG. 3, (a) through-holes for through holes are formed at positions where electrical connection between the surface circuit patterns 2 formed on both surfaces of the insulating board 1 is required. 3 and (b) a through-hole through-hole 3 is filled with a curable conductive substance 9 that gives a cured product having conductivity and cured, and (c) a surface circuit formed on both sides of the insulating substrate. The surface constituted by the pattern 2 and the conductive material 4 is ground to be substantially smooth, and (d) a curable conductive material is then applied so as to cover the connecting portion between the through hole portion and the surface circuit pattern 2. Can be obtained by forming the conductive pattern 7 having a uniform thickness.

【0053】また、予め絶縁基板の両面に表面回路パタ
ーン2を形成しない他の方法として、図4に示すよう
に、(a)両面に導電層5を有する絶縁基板1にスルー
ホール用貫通孔3を設け、(b)該スルーホール用貫通
孔3に導電性を有する硬化体を与える硬化性導電物質9
を充填して硬化させた後、(c)該導電層5及び導電物
質4によって構成される表面を平滑に研削し、(d)次
いで、上記導電層5に表面回路パターン2を形成した
後、(e)該スルーホール部と該表面回路パターン2と
の接続部分を覆うように硬化性導電物質を塗布して均一
な厚みの導電パターン7を形成することによって本発明
の回路基板を製造することができる。
As another method in which the surface circuit pattern 2 is not formed on both sides of the insulating substrate in advance, as shown in FIG. 4, (a) the through hole 3 for through holes is formed in the insulating substrate 1 having the conductive layers 5 on both sides. And (b) a curable conductive substance 9 which gives a cured product having conductivity to the through hole 3 for through hole.
And then hardened, (c) the surface constituted by the conductive layer 5 and the conductive material 4 is ground smoothly, and (d) the surface circuit pattern 2 is then formed on the conductive layer 5, (E) A circuit board of the present invention is manufactured by applying a curable conductive material to form a conductive pattern 7 having a uniform thickness so as to cover a connecting portion between the through hole portion and the surface circuit pattern 2. You can

【0054】さらに、絶縁基板の両面に表面回路パター
ン2を形成する前に、予め導体パターンを形成する方法
として、図5に示すように、(a)両面に導電層5を有
する絶縁基板1にスルーホール用貫通孔3を設け、
(b)該スルーホール用貫通孔に導電性を有する硬化体
を与える硬化性導電物質9を充填して硬化させた後、
(c)該導電層5及び導電物質4によって構成される表
面を平滑に研削し、(d)次いで、該スルーホール部と
該スルーホール周辺の導電層を覆うように硬化性導電物
質を塗布して均一な厚みの導電パターン7を形成した
後、(e)上記導電層5に表面回路パターン2を形成す
ることによって本発明の回路基板を製造することができ
る。
Further, as a method of forming conductor patterns in advance before forming the surface circuit pattern 2 on both surfaces of the insulating substrate, as shown in FIG. 5, (a) an insulating substrate 1 having conductive layers 5 on both surfaces is formed. Providing a through hole 3 for through hole,
(B) After the curable conductive substance 9 that gives a cured body having conductivity is filled in the through hole for through hole and cured,
(C) The surface constituted by the conductive layer 5 and the conductive material 4 is ground smoothly, and (d) a curable conductive material is then applied so as to cover the through hole portion and the conductive layer around the through hole. After forming the conductive pattern 7 having a uniform thickness by (e) forming the surface circuit pattern 2 on the conductive layer 5, the circuit board of the present invention can be manufactured.

【0055】複数の絶縁基板間に回路パターン11が形
成された複数の絶縁基板の積層体を用いた場合も、上記
と同様の方法により製造することができる。該積層体に
スルーホール用貫通孔3を設けた場合、特に限定されな
いが、該貫通孔の内壁をスミヤ除去或いはエッチバック
処理が実施されることにより、該貫通孔内に形成される
導電物質と絶縁基板の間に形成された回路パターン11
との接続安定性が向上し、スルーホール部の導通の信頼
性が向上する。
Even when a laminate of a plurality of insulating substrates in which the circuit pattern 11 is formed between the plurality of insulating substrates is used, it can be manufactured by the same method as described above. When the through hole 3 for a through hole is provided in the laminated body, it is not particularly limited, but the inner wall of the through hole is subjected to smear removal or etch back treatment to form a conductive material formed in the through hole. Circuit pattern 11 formed between insulating substrates
The connection stability with and the reliability of the conduction of the through hole portion are improved.

【0056】上記方法において、スルーホール用貫通孔
3の形成方法は、ドリリング加工、パンチング加工、レ
ーザー加工等の通常の回路基板の製造と同様の公知の手
段が特に限定されずに用いられる。
In the above method, as the method for forming the through hole 3 for through holes, known means similar to those for manufacturing a usual circuit board such as drilling, punching, and laser processing may be used without any particular limitation.

【0057】また、上記絶縁基板1に形成されたスルー
ホール用貫通孔3への硬化性導電物質の充填は、該硬化
性導電物質9がスルーホール用貫通孔の全空間を満た
し、且つ表面回路パターン2或いは導電層5の表面より
若干、具体的には、0.1mm以上、好ましくは、0.
1mm〜2mm突出する程度に充填することが望まし
い。硬化性導電物質の代表的な充填法を例示すれば、印
刷法によって1回或いは複数回の塗布を行う方法、絶縁
基板の表裏両面側から表裏一対のスキージで圧入する方
法、ロールコーター或いはカーテンコーターによって充
填する方法等の手段が好適に用いられる。
The through-hole through-hole 3 formed in the insulating substrate 1 is filled with the curable conductive material so that the curable conductive material 9 fills the entire space of the through-hole through-hole and the surface circuit is formed. Slightly from the surface of the pattern 2 or the conductive layer 5, specifically, 0.1 mm or more, preferably 0.
It is desirable to fill so as to project by 1 mm to 2 mm. A typical filling method of a curable conductive material is, for example, a method of applying one or more times by a printing method, a method of press-fitting with a pair of front and back squeegees from both sides of an insulating substrate, a roll coater or curtain coater Means such as a filling method is preferably used.

【0058】また、上記硬化性導電物質9の充填に際
し、硬化性導電物質は本来、バインダー硬化時の硬化収
縮により硬化性導電物質に含有される導電材料が接触す
るため、導電性を呈するものであり、必ず硬化時には収
縮が伴う。従って、スルーホール用貫通孔3に該硬化性
導電物質9を充填する場合、硬化後に該硬化性導電物質
の硬化体表面が上記回路パターン2より凹むことのない
よう、収縮率を勘案して充填することが好ましい。
Further, when the curable conductive substance 9 is filled, the curable conductive substance originally exhibits conductivity because the conductive material contained in the curable conductive substance comes into contact due to curing contraction during curing of the binder. Yes, there is always shrinkage during curing. Therefore, when the through-hole through-hole 3 is filled with the curable conductive substance 9, the shrinkage rate is taken into consideration so that the surface of the cured body of the curable conductive substance does not become recessed from the circuit pattern 2 after curing. Preferably.

【0059】また、上記スルーホール用貫通孔3に充填
された硬化性導電物質9の硬化は、熱風炉、赤外線炉、
遠赤外線炉、紫外線硬化炉、電子線硬化炉等の公知の硬
化方法より、適するものを適宜選んで硬化させれば良
い。
The hardening of the curable conductive material 9 filled in the through holes 3 for through holes is carried out by hot air oven, infrared oven,
A suitable one may be appropriately selected and cured from known curing methods such as a far infrared ray furnace, an ultraviolet ray curing furnace, and an electron beam curing furnace.

【0060】更にまた、上記スルーホール用貫通孔3に
充填された硬化性導電物質9の硬化は、一般的には充填
後すぐ実施するが、後工程である導電パターン7形成時
に同時に行うことも可能である。
Furthermore, the hardening of the curable conductive material 9 filled in the through holes 3 for through holes is generally carried out immediately after the filling, but it may be carried out at the same time as the later step of forming the conductive pattern 7. It is possible.

【0061】スルーホール用貫通孔3に充填した導電物
質4を、上記絶縁基板1の表面回路パターン2或いは導
電層5と実質的に同一平面とする方法を具体的に例示す
れば、上記硬化性導電物質9をスルーホール用貫通孔3
に充填した後、硬化させ、該硬化性導電物質の硬化体
(導電物質)が該表面回路パターン2或いは導電層5よ
り突出した部分を平滑に研削する方法が好適である。上
記導電物質4が該表面回路パターン或いは導電層5より
突出した部分を平滑に研削する方法としては、スラリー
研磨、バフ研磨、スクラブ研磨、ベルト研磨等の通常の
回路基板の研磨に用いられる方法が好適に用いられる。
The method of making the conductive material 4 filled in the through-holes 3 for through holes substantially flush with the surface circuit pattern 2 of the insulating substrate 1 or the conductive layer 5 will be described below. Conductive material 9 through hole for through hole 3
It is preferable to use a method in which the hardened material (conductive material) of the curable conductive material is smoothed after it has been filled in, and the portion where the hardened material (conductive material) protrudes from the surface circuit pattern 2 or the conductive layer 5 is smoothed. As a method for smoothly grinding the surface circuit pattern or the portion where the conductive material 4 protrudes from the conductive layer 5, a method used for polishing a normal circuit board such as slurry polishing, buff polishing, scrub polishing, and belt polishing is used. It is preferably used.

【0062】尚、図には示されていないが、図3の
(c)の工程において、導電物質4の表面を平滑に研削
する際、表面回路パターン2を保護するために該表面回
路パターン2に前記レジストよりなるオーバーコート層
を形成させることも可能である。
Although not shown in the figure, in the step (c) of FIG. 3, the surface circuit pattern 2 is protected to protect the surface circuit pattern 2 when the surface of the conductive material 4 is ground smoothly. It is also possible to form an overcoat layer composed of the above-mentioned resist.

【0063】また、絶縁基板1の導電層5から回路パタ
ーン2を形成する方法は特に限定されず、公知の方法が
特に制限なく採用される。
The method of forming the circuit pattern 2 from the conductive layer 5 of the insulating substrate 1 is not particularly limited, and a known method can be used without particular limitation.

【0064】一般的な形成方法を例示すれば、例えば、
両面に導電層5を有する絶縁基板1の該導電層5の表面
に、エッチングレジストによりエッチングパターンを形
成後、エッチングを行う方法が一般的である。ここで用
いられるエッチングレジストはドライフィルム、レジス
トインク等が特に制限なく使用され、パターンのファイ
ン度によって適宜選択して使用すれば良い。また、エッ
チングレジストパターンはエッチング法によってポジパ
ターン或いはネガパターンを適宜採用すれば良い。例え
ば、テンティング法に代表されるエッチング法ではポジ
パターンを、半田剥離法、SES法に代表されるエッチ
ング法ではネガパターンを採用すれば良い。
To give an example of a general forming method, for example,
A general method is to perform etching after forming an etching pattern with an etching resist on the surface of the conductive layer 5 of the insulating substrate 1 having the conductive layers 5 on both sides. As the etching resist used here, a dry film, a resist ink or the like is used without particular limitation, and it may be appropriately selected and used depending on the fineness of the pattern. Further, as the etching resist pattern, a positive pattern or a negative pattern may be appropriately adopted by the etching method. For example, a positive pattern may be adopted in the etching method typified by the tenting method, and a negative pattern may be adopted in the etching method typified by the solder peeling method and the SES method.

【0065】また、図4および図5に示す予め回路パタ
ーンを形成しないで、導電層5及び導電物質4によって
構成される表面を平滑に研削した後、回路パターンを形
成する場合は、電着フォトレジスト膜を用いたED法で
形成すると、レジスト膜を電気的に形成するため、ゴミ
等の悪影響を受けず高精度で且つ信頼性の高い回路パタ
ーンが得られる。
If the circuit pattern shown in FIGS. 4 and 5 is not formed in advance and the surface formed by the conductive layer 5 and the conductive material 4 is ground smoothly and then the circuit pattern is formed, the electrodeposition photo When the resist film is formed by the ED method, since the resist film is electrically formed, a highly accurate and highly reliable circuit pattern can be obtained without being adversely affected by dust and the like.

【0066】特に、ネガ型の電着フォトレジスト膜を用
いると、スルーホール用貫通孔3が導電物質4で充填さ
れているため、該スルーホール用貫通孔内を露光する必
要がなく、0.3mm以下の小径のスルーホールを信頼
性よく形成することができる。
In particular, when a negative electrodeposition photoresist film is used, since the through holes 3 for through holes are filled with the conductive material 4, it is not necessary to expose the inside of the through holes for through holes, and Through holes having a small diameter of 3 mm or less can be reliably formed.

【0067】また、前記スルーホール部と表面回路パタ
ーン2或いは該スルーホール部周辺の導電層5との接続
部分を覆うように硬化性導電物質を塗布して均一な厚み
の導電パターン7を形成する方法としては、公知の印刷
による導電パターンの製造方法が好適に採用される。具
体的には、ディスペンサーを用いて必要な箇所に硬化性
導電物質を塗布した後、硬化する方法や、スクリーン印
刷機用いて印刷塗布した後、硬化する方法などが挙げら
れる。尚、前記した上記スルーホール部上の導体パター
ン7上に表面実装部品を直接接続する場合において、該
部品を安定して搭載するために、表面実装部品を直接搭
載するスルーホール部上以外の回路パターン上へ、該硬
化性導電物質を塗布して均一な厚みの導電パターンを形
成する場合においても、上記と同様な形成方法が採用さ
れ、通常、同時に行われる。
Further, a curable conductive material is applied so as to cover the connection portion between the through hole portion and the surface circuit pattern 2 or the conductive layer 5 around the through hole portion to form a conductive pattern 7 having a uniform thickness. As the method, a known method for producing a conductive pattern by printing is preferably adopted. Specifically, there may be mentioned a method of applying a curable conductive substance to a required portion using a dispenser and then curing, a method of applying a curable conductive substance by a screen printing machine and then curing. In the case where the surface mount component is directly connected to the conductor pattern 7 on the through hole portion described above, in order to stably mount the component, a circuit other than the through hole portion on which the surface mount component is directly mounted is mounted. Also when the curable conductive substance is applied onto the pattern to form a conductive pattern having a uniform thickness, the same forming method as described above is adopted, and is usually performed simultaneously.

【0068】上記スルーホール部と表面回路パターン2
或いは該スルーホール部周辺の導電層5との接続部分を
覆う硬化性導電物質の硬化は、前述のスルーホール用貫
通孔3に充填された硬化性導電物質9の硬化方法と同様
に、熱風炉、赤外線炉、遠赤外線炉、紫外線硬化炉、電
子線硬化炉等の公知の硬化方法より、硬化性導電物質の
硬化に適するものを適宜選んで硬化させれば良い。
The through hole and the surface circuit pattern 2
Alternatively, the hardening of the curable conductive material covering the connection portion with the conductive layer 5 around the through hole portion is carried out in the same manner as the hardening method of the curable conductive material 9 filled in the through hole for through hole 3 described above. A known one, such as an infrared furnace, a far infrared furnace, an ultraviolet curing furnace, and an electron beam curing furnace, may be appropriately selected and cured by a suitable curing agent for the curable conductive material.

【0069】本発明においては、前述したように、スル
ーホール用貫通孔3に充填された導電物質4と表面回路
パターン2或いは導電層5とが実質的に同一平面をなす
ように形成されているため、例えば、スクリーン印刷機
を用いて硬化性導電物質を上記接続部分に塗布する場
合、印刷時の滲みの発生がなく、その結果、作業性に優
れ、しかも均一に硬化性導電物質を塗布することが可能
となる。
In the present invention, as described above, the conductive substance 4 filled in the through hole 3 for through hole and the surface circuit pattern 2 or the conductive layer 5 are formed so as to be substantially flush with each other. Therefore, for example, when a curable conductive material is applied to the connection portion using a screen printing machine, no bleeding occurs during printing, resulting in excellent workability and even application of the curable conductive material. It becomes possible.

【0070】また、スルーホール部と表面回路パターン
2の接続部分とに形成される導電パターン7の厚みが均
一で且つ薄い。よって、前記した従来の導電物質をスル
ーホール用貫通孔の周囲に覆い被さるよう、導電物質を
突出するように充填する手段では、表面回路パターン部
と突出部に2回に分けて形成していたが、本発明によれ
ば半田レジスト層の形成が1回で精度良く行うことが可
能となった。
Further, the conductive pattern 7 formed in the through hole portion and the connection portion of the surface circuit pattern 2 is uniform and thin. Therefore, in the above-mentioned conventional means for filling the conductive material in a protruding manner so as to cover the through hole through hole, the conductive material is formed in the surface circuit pattern portion and the protruding portion in two steps. However, according to the present invention, the solder resist layer can be formed once and accurately.

【0071】また、図5に示す予め表面回路パターン2
を形成しないで、導電層5及び導電物質4によって構成
される表面を平滑に研削した後、導電パターン7を形成
し、表面回路パターン2を形成した場合、スルーホール
用貫通孔3に充填された導電物質4の表面がエッチング
レジストや、該エッチングレジストの剥離液等のアルカ
リ性溶液および表面処理用の酸洗液に曝されることがな
く、該導電物質4の表面や該導電物質とランド部8との
接続界面を汚染することがないため、信頼性のよいスル
ーホールを形成することができる。
Further, the surface circuit pattern 2 shown in FIG.
In the case where the surface formed by the conductive layer 5 and the conductive material 4 is not ground, the conductive pattern 7 is formed and the surface circuit pattern 2 is formed, the through holes 3 for through holes are filled. The surface of the conductive material 4 is not exposed to an etching resist, an alkaline solution such as a stripping solution of the etching resist, or a pickling solution for surface treatment, and the surface of the conductive material 4 or the conductive material and the land portion 8 are not exposed. Since the connection interface with and is not contaminated, a reliable through hole can be formed.

【0072】本発明において、表面回路パターン2或い
は硬化性導電物質9、及び導電物質4によって構成され
る表面を平滑に研削し、導電パターン7を形成する方法
において、片面を平滑に研削し、導電パターン7を形成
した後、もう一方の面を研削し、導電パターン7を形成
してもよい。
In the method of the present invention, the surface formed by the surface circuit pattern 2 or the curable conductive material 9 and the conductive material 4 is ground smoothly to form the conductive pattern 7. After forming the pattern 7, the other surface may be ground to form the conductive pattern 7.

【0073】従って、本発明の方法によれば、スルーホ
ール部と回路パターンとの電気的接続を信頼性よく、確
実に行うことができる。
Therefore, according to the method of the present invention, the electrical connection between the through hole portion and the circuit pattern can be made reliably and reliably.

【0074】[0074]

【効果】以上の説明において明らかなように、本発明の
回路基板は、化学鍍金、電気鍍金を行うことなく、しか
も、スルーホール部と表面回路パターンの接続部分に形
成される導電パターンの厚みが均一で、スルーホールの
導通信頼性が高く、且つ表面実装部品の実装時の半田ペ
ースト印刷が精度よく行え、表面実装部品の接続信頼性
が高い。
As is apparent from the above description, the circuit board of the present invention does not require chemical plating or electroplating, and the thickness of the conductive pattern formed at the connecting portion between the through hole portion and the surface circuit pattern is small. Uniformity, high through-hole conduction reliability, and accurate solder paste printing during mounting of surface mount components, and high connection reliability of surface mount components.

【0075】更に、本発明の製造方法によれば、スルー
ホール用貫通孔に充填、硬化された硬化性導電物質の表
面が回路パターンと実質的に同一平面を有するため、後
の工程であるスルーホール部と回路パターンの接続部分
の硬化性導電物質による導電パターンの形成が、精度よ
く均一に行うことができる。
Further, according to the manufacturing method of the present invention, since the surface of the curable conductive material filled and cured in the through hole for the through hole has substantially the same plane as the circuit pattern, a through step which is a subsequent step is performed. The conductive pattern can be accurately and uniformly formed from the curable conductive material at the connection between the hole and the circuit pattern.

【0076】したがって、本発明の回路基板は、従来の
化学鍍金や電気鍍金をおこなった回路基板に比べて高歩
留で、且つ実装密度や配線密度の高い回路基板である。
Therefore, the circuit board of the present invention is a circuit board having a high yield and a high mounting density and wiring density as compared with the conventional circuit boards which have been subjected to chemical plating or electric plating.

【0077】[0077]

【実施例】以下、本発明を具体的に説明するために実施
例を示すが、本発明はこれらの実施例に限定されるもの
ではない。
EXAMPLES Examples will be shown below for specifically explaining the present invention, but the present invention is not limited to these examples.

【0078】実施例1 スルーホール用貫通孔3に充填する硬化性導電物質9と
して、以下の組成の銅ペーストを用いた。即ち、バイン
ダー成分として、エポキシ当量が173g/当量のビス
フェノールAジグリシジルエーテルと該ビスフェノール
Aジグリシジルエーテル100重量部に対して、35重
量部のデシルグリシジルエーテルと、硬化剤としてノボ
ラック型フェノール樹脂を39重量部と、銅粉として平
均粒径10.5μmの樹枝状銅粉を、バインダー100
重量部に対し360重量部添加し、更に、2−エチル−
4−メチルイミダゾールを、バインダー100重量部に
対し2.8重量部加えたものを三本ロールで45分間混
練して銅ペーストを調製した。
Example 1 As the curable conductive material 9 with which the through holes 3 for through holes were filled, a copper paste having the following composition was used. That is, 35 parts by weight of decyl glycidyl ether as a binder component and 35 parts by weight of bisphenol A diglycidyl ether having an epoxy equivalent of 173 g / equivalent and 100 parts by weight of the bisphenol A diglycidyl ether, and a novolac type phenol resin as a curing agent are used. Binder 100 parts by weight and dendritic copper powder having an average particle size of 10.5 μm as copper powder
360 parts by weight is added to parts by weight, and 2-ethyl-
What added 2.8 weight part of 4-methylimidazole with respect to 100 weight part of binders was knead | mixed for 45 minutes with a three roll, and the copper paste was prepared.

【0079】また、スルーホール部と回路パターンとの
接続部分を覆うようにして形成される導電パターン7の
硬化性導電物質としては、バインダーの主成分がレゾー
ル型のフェノール樹脂であるタツタ電線(株)社製銅ペ
ーストNF−2000を用いた。
Further, as the curable conductive material of the conductive pattern 7 formed so as to cover the connecting portion between the through hole portion and the circuit pattern, the main component of the binder is a resol-type phenol resin (Tatsuta Electric Wire Co., Ltd.). ) Copper Paste NF-2000 manufactured by the same company was used.

【0080】以下、前者のエポキシ樹脂をバインダーの
主成分とする銅ペーストを「銅ペーストA」、後者のレ
ゾール型のフェノール樹脂を主成分とするタツタ電線
(株)製の銅ペーストNF2000を「銅ペーストB」
として記載する。
Hereinafter, the copper paste containing the former epoxy resin as the main component of the binder is "copper paste A", and the latter copper paste containing the resol-type phenol resin as the main component is Tatsuta Electric Wire Co., Ltd.'s copper paste NF2000. Paste B "
Described as.

【0081】図3に示す工程に従って回路基板の製造を
実施した。即ち、(a)絶縁基板1として両面に銅箔よ
りなる導電層5を有する厚さ1.2mmのガラスエポキ
シ基板を用い、直径が0.6mmのスルーホール用貫通
孔3をドリリングにより100穴設け、該絶縁基板の両
面に幅50μm、間隔50μmのラインおよびランド部
を含む表面回路パターン2を形成し、(b)該スルーホ
ール用貫通孔に硬化性導電物質9として銅ペーストAを
上記表面回路パターンより0.25mm突出するよう
に、スクリーン印刷法により充填し、エアオーブンで5
0℃−30分、180℃−60分の条件で硬化させた
後、(c)該表面回路パターン及び硬化性導電物質によ
って構成される表面を200番のバフと360番のバフ
を順次使用して、平滑に研削して導電物質4が充填され
たスルーホール部を形成した後、(d)該スルーホール
部の実質的全面と、該スルーホールに接続する表面回路
パターン2の幅0.1mmの辺縁部とを覆う硬化性導電
物質として銅ペーストBをスクリーン印刷法によって塗
布して、エアーオーブンで160℃−30分の条件で硬
化して平均厚さ30μm(±約10%のバラツキ)の導
電パターン7を形成し、両面回路基板を100枚得た。
A circuit board was manufactured according to the steps shown in FIG. That is, (a) a 1.2 mm-thick glass epoxy substrate having conductive layers 5 made of copper foil on both surfaces is used as the insulating substrate 1, and 100 through-hole through holes 3 having a diameter of 0.6 mm are provided by drilling. Forming a surface circuit pattern 2 including lines and lands having a width of 50 μm and a space of 50 μm on both surfaces of the insulating substrate, and (b) using the copper paste A as a curable conductive material 9 in the through hole for the through hole. Fill it by screen printing so that it protrudes 0.25 mm from the pattern, and use an air oven to fill it.
After curing under conditions of 0 ° C. for 30 minutes and 180 ° C. for 60 minutes, (c) the surface composed of the surface circuit pattern and the curable conductive material is sequentially used with the 200th buff and the 360th buff. Then, after smoothing to form a through hole portion filled with the conductive material 4, (d) the substantially entire surface of the through hole portion and the width of the surface circuit pattern 2 connected to the through hole of 0.1 mm. The copper paste B as a curable conductive material covering the peripheral portion of the is coated by a screen printing method and cured in an air oven at 160 ° C. for 30 minutes to have an average thickness of 30 μm (± 10% variation). Conductive pattern 7 was formed to obtain 100 double-sided circuit boards.

【0082】得られた回路基板は、回路パターンの短絡
および断線が発生せず、歩留まりは100%だった。該
回路基板について、回路基板の表裏に形成された導電パ
ターン7間でスルーホールの抵抗値を測定したところ、
平均で15mΩ/穴であった。この回路基板を60℃−
90%RHの高温高湿条件で1000時間曝した後、ス
ルーホール抵抗値を再度測定すると、平均で17mΩ/
穴であった。また、上記回路基板は、基板表面の凸凹も
少なく、表面実装部品の実装時における半田ペースト印
刷も良好に行え、表面実装部品を信頼性よく接続するこ
とができた。
The obtained circuit board did not cause short circuit and disconnection of the circuit pattern, and the yield was 100%. When the resistance value of the through hole was measured between the conductive patterns 7 formed on the front and back of the circuit board for the circuit board,
The average was 15 mΩ / hole. This circuit board is 60 ℃
After exposing for 1000 hours under the high temperature and high humidity condition of 90% RH, the through hole resistance value was measured again, and it was 17 mΩ / average.
It was a hole. In addition, the above-mentioned circuit board has few irregularities on the surface of the board, and solder paste printing during mounting of the surface mount component can be performed well, and the surface mount component can be connected with high reliability.

【0083】実施例2 図4に示す工程に従って、回路基板の製造を実施した。
即ち、(a)両面に銅箔よりなる導電層5を有する厚さ
1.2mmのガラスエポキシ基板の絶縁基板1に、直径
が0.5mmのスルーホール用貫通孔3をドリリングに
より100穴設け、(b)該スルーホール用貫通孔3に
硬化性導電物質9として銅ペーストAをスクリーン印刷
法により充填し、エアオーブンで50℃−30分、18
0℃−60分の条件で硬化させた後、(c)該導電層及
び硬化性導電物質によって構成される表面を200番の
バフと360番のバフを順次使用して、平滑に研削して
導電物質4が充填されたスルーホール部を形成した後、
(d)次いで該導電層5にエッチングレジストを用い
て、両面に幅50μm、間隔50μmのラインおよびラ
ンド部を含む表面回路パターン2を形成した後、(e)
該スルーホール部の実質的全面と、該スルーホールに接
続する表面回路パターン2の幅0.1mmの辺縁部とを
覆う硬化性導電物質として銅ペーストBをスクリーン印
刷法にて塗布して、エアーオーブン160℃−30分の
条件で銅ペーストBを硬化し、平均厚さ25μm(±約
10%のバラツキ)の導電パターン7を形成し、両面回
路基板を100枚得た。
Example 2 A circuit board was manufactured according to the steps shown in FIG.
That is, (a) 100 holes of through holes 3 for through holes having a diameter of 0.5 mm are provided by drilling in an insulating substrate 1 of a glass epoxy substrate having a thickness of 1.2 mm having conductive layers 5 made of copper foil on both sides. (B) The through holes 3 for through holes are filled with a copper paste A as a curable conductive material 9 by a screen printing method, and the mixture is placed in an air oven at 50 ° C. for 30 minutes for 18 minutes.
After curing under conditions of 0 ° C. and 60 minutes, (c) the surface constituted by the conductive layer and the curable conductive material is ground smoothly using a 200th buff and a 360th buff. After forming the through hole portion filled with the conductive material 4,
(D) Next, using an etching resist on the conductive layer 5, a surface circuit pattern 2 including lines and lands having a width of 50 μm and a spacing of 50 μm is formed on both surfaces, and then (e).
A copper paste B is applied by a screen printing method as a curable conductive material that covers substantially the entire surface of the through hole portion and the edge portion of the surface circuit pattern 2 connected to the through hole, which has a width of 0.1 mm. The copper paste B was cured under the conditions of 160 ° C. for 30 minutes in an air oven to form a conductive pattern 7 having an average thickness of 25 μm (variation of ± about 10%), and 100 double-sided circuit boards were obtained.

【0084】得られた回路基板は、回路パターンの短絡
および断線が発生せず、歩留まりは100%だった。該
回路基板について、回路基板の表裏に形成された導電パ
ターン7間でスルーホールの抵抗値を測定したところ、
平均で19mΩ/穴であった。この回路基板を60℃−
90%RHの高温高湿条件で1000時間曝した後、ス
ルーホール抵抗値を再度測定すると、平均で22mΩ/
穴であった。また、上記回路基板は、基板表面の凸凹も
少なく、表面実装部品の実装時における半田ペースト印
刷も良好に行え、表面実装部品を信頼性よく接続するこ
とができた。
The obtained circuit board did not cause short circuit and disconnection of the circuit pattern, and the yield was 100%. When the resistance value of the through hole was measured between the conductive patterns 7 formed on the front and back of the circuit board for the circuit board,
The average was 19 mΩ / hole. This circuit board is 60 ℃
After exposure for 1000 hours under the high temperature and high humidity condition of 90% RH, the through hole resistance value was measured again, and the average was 22 mΩ /
It was a hole. In addition, the above-mentioned circuit board has few irregularities on the surface of the board, and solder paste printing during mounting of the surface mount component can be performed well, and the surface mount component can be connected with high reliability.

【0085】実施例3 図5に示す工程に従って、回路基板の製造を実施した。
即ち、(a)両面に銅箔よりなる導電層5を有する厚さ
1.2mmのガラスエポキシ基板の絶縁基板1に、直径
が0.5mmのスルーホール用貫通孔3をドリリングに
より100穴設け、(b)該スルーホール用貫通孔3に
硬化性導電物質9として銅ペーストAをスクリーン印刷
法により充填し、エアオーブンで50℃−30分、18
0℃−60分の条件で硬化させた後、(c)該導電層及
び硬化性導電物質によって構成される表面を200番の
バフと360番のバフを順次使用して、平滑に研削して
導電物質4が充填されたスルーホール部を形成した後、
(d)該スルーホール部の実質的全面と、該スルーホー
ルに接続する表面回路パターン2の幅0.1mmの辺縁
部とを覆う硬化性導電物質として銅ペーストBをスクリ
ーン印刷法にて塗布して、エアーオーブン160℃30
分の条件で銅ペーストBを硬化し、平均厚さ25μm
(±約10%のバラツキ)の導電パターン7を形成し、
(e)次いで該導電層5にエッチングレジストを用い
て、両面に幅50μm、間隔50μmのラインおよびラ
ンド部を含む表面回路パターン2を形成し、両面回路基
板を100枚得た。
Example 3 A circuit board was manufactured according to the steps shown in FIG.
That is, (a) 100 holes of through holes 3 for through holes having a diameter of 0.5 mm are provided by drilling in an insulating substrate 1 of a glass epoxy substrate having a thickness of 1.2 mm having conductive layers 5 made of copper foil on both sides. (B) The through holes 3 for through holes are filled with a copper paste A as a curable conductive material 9 by a screen printing method, and the mixture is placed in an air oven at 50 ° C. for 30 minutes for 18 minutes.
After curing under conditions of 0 ° C. and 60 minutes, (c) the surface constituted by the conductive layer and the curable conductive material is ground smoothly using a 200th buff and a 360th buff. After forming the through hole portion filled with the conductive material 4,
(D) Applying a copper paste B as a curable conductive material by a screen printing method so as to cover substantially the entire surface of the through hole portion and the edge portion having a width of 0.1 mm of the surface circuit pattern 2 connected to the through hole. Then, air oven 160 ℃ 30
The copper paste B is hardened under the condition of min.
Form the conductive pattern 7 (variation of about ± 10%),
(E) Next, using an etching resist for the conductive layer 5, a surface circuit pattern 2 including lines and lands having a width of 50 μm and a spacing of 50 μm was formed on both surfaces to obtain 100 double-sided circuit boards.

【0086】得られた回路基板は、回路パターンの短絡
および断線が発生せず、歩留まりは100%だった。該
回路基板について、回路基板の表裏に形成された導電パ
ターン7間でスルーホールの抵抗値を測定したところ、
平均で18mΩ/穴であった。この回路基板を60℃−
90%RHの高温高湿条件で1000時間曝した後、ス
ルーホール抵抗値を再度測定すると、平均で19mΩ/
穴であった。また、上記回路基板は、基板表面の凸凹も
少なく、表面実装部品の実装時における半田ペースト印
刷も良好に行え、表面実装部品を信頼性よく接続するこ
とができた。
The obtained circuit board did not cause short circuit and disconnection of the circuit pattern, and the yield was 100%. When the resistance value of the through hole was measured between the conductive patterns 7 formed on the front and back of the circuit board for the circuit board,
The average was 18 mΩ / hole. This circuit board is 60 ℃
After exposure for 1000 hours under the high temperature and high humidity condition of 90% RH, the through hole resistance value was measured again, and the average value was 19 mΩ /
It was a hole. In addition, the above-mentioned circuit board has few irregularities on the surface of the board, and solder paste printing during mounting of the surface mount component can be performed well, and the surface mount component can be connected with high reliability.

【0087】実施例4 図4に示す工程に従って、回路基板の製造を実施し、最
後にニッケル・金鍍金を施した。即ち、(a)両面に銅
箔よりなる導電層5を有する厚さ1.2mmのガラスエ
ポキシ基板の絶縁基板1に、直径が0.5mmのスルー
ホール用貫通孔3をドリリングにより100穴設け、
(b)該スルーホール用貫通孔3に硬化性導電物質9と
して銅ペーストAをスクリーン印刷法により充填し、エ
アオーブンで50℃−30分、180℃−60分の条件
で硬化させた後、(c)該導電層及び硬化性導電物質に
よって構成される表面を200番のバフと360番のバ
フを順次使用して、平滑に研削して導電物質4が充填さ
れたスルーホール部を形成した後、(d)次いで該導電
層5にエッチングレジストを用いて、両面に幅50μ
m、間隔50μmのラインおよびランド部を含む表面回
路パターン2を形成した後、(e)該スルーホール部の
実質的全面と、該スルーホールに接続する表面回路パタ
ーン2の幅0.1mmの辺縁部とを覆い、かつ表面実装
部品を搭載するパッド部を覆うように硬化性導電物質と
して銅ペーストBをスクリーン印刷法にて塗布して、エ
アーオーブン160℃−30分の条件で銅ペーストBを
硬化し、平均厚さ25μm(±約10%のバラツキ)の
導電パターン7を形成した後、該表面回路パターン上お
よび該導電パターン上にニッケル鍍金4μm、金鍍金
0.2μm施して、両面回路基板を100枚得た。
Example 4 A circuit board was manufactured according to the steps shown in FIG. 4, and finally nickel-gold plating was applied. That is, (a) 100 holes of through holes 3 for through holes having a diameter of 0.5 mm are provided by drilling in an insulating substrate 1 of a glass epoxy substrate having a thickness of 1.2 mm having conductive layers 5 made of copper foil on both sides.
(B) After filling the through-holes 3 for through holes with a copper paste A as a curable conductive material 9 by a screen printing method and curing in an air oven under conditions of 50 ° C.-30 minutes and 180 ° C.-60 minutes, (C) The surface constituted by the conductive layer and the curable conductive material was sequentially ground by using No. 200 buff and No. 360 buff to form a through hole portion filled with the conductive substance 4. After that, (d) an etching resist is used for the conductive layer 5, and the width is 50 μm on both sides.
m), after forming the surface circuit pattern 2 including a line and a land portion with a space of 50 μm, (e) a substantially entire surface of the through hole portion and a side having a width of 0.1 mm of the surface circuit pattern 2 connected to the through hole. A copper paste B as a curable conductive material is applied by a screen printing method so as to cover the edge portion and the pad portion on which the surface mount component is mounted, and the copper paste B is applied under the conditions of an air oven 160 ° C. for 30 minutes. Is cured to form a conductive pattern 7 having an average thickness of 25 μm (± 10% variation), and then nickel plating 4 μm and gold plating 0.2 μm are applied on the surface circuit pattern and the conductive pattern to form a double-sided circuit. 100 substrates were obtained.

【0088】得られた回路基板は、回路パターンの短絡
および断線が発生せず、歩留まりは100%だった。該
回路基板について、回路基板の表裏に形成された導電パ
ターン7間でスルーホールの抵抗値を測定したところ、
平均で19mΩ/穴であった。この回路基板を60℃−
90%RHの高温高湿条件で1000時間曝した後、ス
ルーホール抵抗値を再度測定すると、平均で20mΩ/
穴であった。また、上記回路基板は、基板表面の凸凹も
少なく、表面実装部品の実装時における半田ペースト印
刷も良好に行え、表面実装部品を信頼性よく接続するこ
とができた。また、導電パターン上においても、表面実
装部品を信頼性よく接続することができた。
The obtained circuit board did not cause short circuit and disconnection of the circuit pattern, and the yield was 100%. When the resistance value of the through hole was measured between the conductive patterns 7 formed on the front and back of the circuit board for the circuit board,
The average was 19 mΩ / hole. This circuit board is 60 ℃
After exposure for 1000 hours under high temperature and high humidity conditions of 90% RH, the through-hole resistance value was measured again, and the average was 20 mΩ /
It was a hole. In addition, the above-mentioned circuit board has few irregularities on the surface of the board, and solder paste printing during mounting of the surface mount component can be performed well, and the surface mount component can be connected with high reliability. In addition, the surface-mounted components could be connected on the conductive pattern with high reliability.

【0089】実施例5 絶縁基板の積層体を用い、図4に示す工程に従って、回
路基板の製造を実施し、最後にニッケル・金鍍金を施し
た。即ち、(a)3枚の絶縁基板の積層体よりなり、絶
縁基板の間には銅箔よりなる回路パターンを有し、該積
層体の両表面に銅箔よりなる導電層5を有する厚さ1.
2mmのガラスエポキシの絶縁基板の積層体に、直径が
0.5mmのスルーホール用貫通孔3をドリリングによ
り100穴設け、(b)該スルーホール用貫通孔3に硬
化性導電物質9として銅ペーストAをスクリーン印刷法
により充填し、エアオーブンで50℃−30分、180
℃−60分の条件で硬化させた後、(c)該導電層及び
硬化性導電物質によって構成される表面を200番のバ
フと360番のバフを順次使用して、平滑に研削して導
電物質4が充填されたスルーホール部を形成した後、
(d)次いで該導電層5にエッチングレジストを用い
て、両面に幅50μm、間隔50μmのラインおよびラ
ンド部を含む表表面回路パターン2を形成した後、
(e)該スルーホール部と表面回路パターン2との接続
部分を覆うように、かつ表面実装部品を搭載するパッド
部を覆うように硬化性導電物質として銅ペーストBをス
クリーン印刷法にて塗布して、エアーオーブン160℃
−30分の条件で銅ペーストBを硬化し、平均厚さ25
μm(±約10%のバラツキ)の導電パターン7を形成
した後、該回路パターン上および該導電パターン上にニ
ッケル鍍金4μm、金鍍金0.2μm施して、多層回路
基板を100枚得た。
Example 5 A circuit board was manufactured using the laminated body of insulating substrates according to the steps shown in FIG. 4, and finally nickel-gold plating was applied. That is, (a) a thickness of a laminated body of three insulating substrates, a circuit pattern made of copper foil between the insulating substrates, and conductive layers 5 made of copper foil on both surfaces of the laminated body. 1.
100 mm through-hole through-holes 3 having a diameter of 0.5 mm are provided by drilling in a laminated body of a 2 mm glass epoxy insulating substrate, and (b) copper paste as a curable conductive material 9 is provided in the through-hole through-holes 3. A was filled by the screen printing method, and it was heated in an air oven at 50 ° C. for 30 minutes for 180 minutes.
After being cured under conditions of -60 ° C, (c) the surface constituted by the conductive layer and the curable conductive material is ground and smoothed by sequentially using the 200th buff and the 360th buff. After forming the through holes filled with the substance 4,
(D) Next, using an etching resist for the conductive layer 5, after forming the surface circuit pattern 2 including lines and lands having a width of 50 μm and a spacing of 50 μm on both surfaces,
(E) Applying a copper paste B as a curable conductive material by a screen printing method so as to cover the connecting portion between the through hole portion and the surface circuit pattern 2 and to cover the pad portion where the surface mount component is mounted. Air oven 160 ℃
The copper paste B is cured under the condition of -30 minutes, and the average thickness is 25
After forming the conductive pattern 7 of μm (± 10% variation), 4 μm of nickel plating and 0.2 μm of gold plating were applied on the circuit pattern and the conductive pattern to obtain 100 multilayer circuit boards.

【0090】得られた回路基板は、回路パターンの短絡
および断線が発生せず、歩留まりは100%だった。該
回路基板について、回路基板の表裏に形成された導電パ
ターン7間でスルーホールの抵抗値を測定したところ、
平均で19mΩ/穴であった。また、内層同士のスルー
ホールの抵抗値を測定したところ、22mΩ/穴であっ
た。この回路基板を60℃−90%RHの高温高湿条件
で1000時間曝した後、回路基板表裏に形成された導
体パターンのスルーホール抵抗値を再度測定すると、平
均で20mΩ/穴、内層同士のスルーホール抵抗値を再
度測定すると、平均で22mΩ/穴であった。また、上
記回路基板は、基板表面の凸凹も少なく、表面実装部品
の実装時における半田ペースト印刷も良好に行え、表面
実装部品を信頼性よく接続することができた。また、導
電パターン上においても、表面実装部品を信頼性よく接
続することができた。
The obtained circuit board did not cause short circuit and disconnection of the circuit pattern, and the yield was 100%. When the resistance value of the through hole was measured between the conductive patterns 7 formed on the front and back of the circuit board for the circuit board,
The average was 19 mΩ / hole. The resistance value of the through hole between the inner layers was measured and found to be 22 mΩ / hole. After this circuit board was exposed to high temperature and high humidity conditions of 60 ° C.-90% RH for 1000 hours, the through-hole resistance values of the conductor patterns formed on the front and back of the circuit board were measured again, and the average value was 20 mΩ / hole, between inner layers. When the through-hole resistance value was measured again, it was 22 mΩ / hole on average. In addition, the above-mentioned circuit board has few irregularities on the surface of the board, and solder paste printing during mounting of the surface mount component can be performed well, and the surface mount component can be connected with high reliability. In addition, the surface-mounted components could be connected on the conductive pattern with high reliability.

【0091】比較例1 実施例1において、(a)〜(b)の工程により回路基
板の製造を実施した。得られた回路基板に表面実装部品
を実装するために、該回路基板に半田ペーストをスクリ
ーン印刷法で印刷したが、半田ペーストはほとんど該回
路基板には印刷されず、部品を実装することができなか
った。また、得られた回路基板の表裏でスルーホールの
抵抗値を測定したところ、平均で17mΩ/穴であっ
た。この回路基板を60℃−90%RHの高温高湿条件
で1000時間曝した後、スルーホール抵抗値を再度測
定すると、平均で98mΩ/穴になり、抵抗値の上昇が
顕著であった。
Comparative Example 1 In Example 1, a circuit board was manufactured by the steps (a) and (b). In order to mount the surface mount component on the obtained circuit board, a solder paste was printed on the circuit board by a screen printing method, but the solder paste was hardly printed on the circuit board and the component could be mounted. There wasn't. Moreover, when the resistance value of the through holes was measured on the front and back of the obtained circuit board, it was found to be 17 mΩ / hole on average. After this circuit board was exposed to high temperature and high humidity conditions of 60 ° C. and 90% RH for 1000 hours, the through hole resistance value was measured again, which was 98 mΩ / hole on average, and the resistance value was remarkably increased.

【0092】比較例2 実施例3において、(a)〜(c)の工程により、スル
ーホール部を形成した後、スルーホール部と導電層の上
に共通した鍍金層を形成し、次いで該鍍金層および該導
電層5にエッチングレジストを用いて、両面に幅50μ
m、間隔50μmのラインおよびランド部を含む表面回
路パターン2を形成し、両面回路基板を100枚得た。
得られた回路基板は、回路パターンの短絡および断線が
発生し、歩留まりは27%だった。
Comparative Example 2 In Example 3, after forming the through holes by the steps (a) to (c), a common plating layer was formed on the through holes and the conductive layer, and then the plating was performed. 50 μm wide on both sides using an etching resist for the layer and the conductive layer 5.
The surface circuit pattern 2 including lines and lands each having m and an interval of 50 μm was formed to obtain 100 double-sided circuit boards.
The resulting circuit board had a short circuit pattern and a broken wire, and the yield was 27%.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の回路基板の代表的な態様を示す断面
図である。
FIG. 1 is a cross-sectional view showing a typical aspect of a circuit board of the present invention.

【図2】 本発明の回路基板の代表的な態様を示す断面
図である。
FIG. 2 is a cross-sectional view showing a typical aspect of the circuit board of the present invention.

【図3】 本発明の回路基板の代表的な製造方法示す工
程図である。
FIG. 3 is a process drawing showing a typical method for manufacturing a circuit board of the present invention.

【図4】 本発明の回路基板の代表的な製造方法示す工
程図である。
FIG. 4 is a process drawing showing a typical method for manufacturing a circuit board of the present invention.

【図5】 本発明の回路基板の代表的な製造方法示す工
程図である。
FIG. 5 is a process drawing showing a typical method for manufacturing a circuit board of the present invention.

【図6】 本発明の回路基板における導電パターンの代
表的な態様を示す平面である。
FIG. 6 is a plan view showing a typical embodiment of a conductive pattern in the circuit board of the present invention.

【図7】 本発明の回路基板における導電パターンの代
表的な態様を示す平面である。
FIG. 7 is a plan view showing a typical embodiment of a conductive pattern in the circuit board of the present invention.

【図8】 本発明の回路基板における導電パターンの代
表的な態様を示す平面である。
FIG. 8 is a plan view showing a typical embodiment of a conductive pattern in the circuit board of the present invention.

【符号の説明】[Explanation of symbols]

1 絶縁基板 2 表面回路パターン 3 スルーホール用貫通孔 4 導電物質 5 導電層 6 オーバーコート層 7 導電パターン 8 ランド部 9 硬化性導電物質 11 絶縁基板の間に形成された回路パターン 12 ニッケル・金鍍金層 13 パッド部 1 Insulating Substrate 2 Surface Circuit Pattern 3 Through Hole Through Hole 4 Conductive Material 5 Conductive Layer 6 Overcoat Layer 7 Conductive Pattern 8 Land Part 9 Curable Conductive Material 11 Circuit Pattern Formed Between Insulating Boards 12 Nickel / Gold Plating Layer 13 Pad part

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】両面に回路パターンが形成された絶縁基板
よりなり、該絶縁基板の両面に存在する回路パターン間
の電気的な接続の必要な箇所に、該絶縁基板を貫通する
スルーホール用貫通孔が設けられ、該スルーホール用貫
通孔に導電物質が充填されて該回路パターンと実質的に
同一平面を有するスルーホール部が形成され、且つ、該
スルーホール部と回路パターンとの接続部分を覆う均一
な厚みの、硬化性導電物質の硬化体よりなる導電パター
ンが形成されたことを特徴とする回路基板。
1. A through hole penetrating through an insulating substrate, comprising an insulating substrate having a circuit pattern formed on both sides thereof, and where electrical connection between circuit patterns existing on both sides of the insulating substrate is required. A hole is provided, the through hole for through hole is filled with a conductive material to form a through hole portion having substantially the same plane as the circuit pattern, and a connecting portion between the through hole portion and the circuit pattern is formed. A circuit board having a conductive pattern formed of a cured body of a curable conductive material having a uniform thickness.
【請求項2】複数の絶縁基板の積層体よりなる回路基板
であって、該積層体の少なくとも一表面と複数の絶縁基
板の間には回路パターンが形成されてなり、該積層体の
表面に形成された回路パターンと絶縁基板の間に形成さ
れた回路パターンとの間、或いは該積層体の両表面に回
路パターンが形成されている場合には、両表面回路パタ
ーン同士の間で電気的な接続が必要な箇所に、該積層体
を貫通するスルーホール用貫通孔が設けられ、該スルー
ホール用貫通孔に導電物質が充填されて該積層体の表面
に形成された回路パターンと実質的に同一表面を有する
スルーホール部が形成され、且つ、該スルーホール部と
表面に形成された回路パターンとの接続部分を覆う均一
な厚みの、硬化性導電物質の硬化体よりなる導電パター
ンが形成されたことを特徴とする回路基板。
2. A circuit board comprising a laminate of a plurality of insulating substrates, wherein a circuit pattern is formed between at least one surface of the laminate and the plurality of insulating substrates, and a circuit pattern is formed on the surface of the laminate. Between the formed circuit pattern and the circuit pattern formed between the insulating substrates, or when a circuit pattern is formed on both surfaces of the laminate, an electrical connection is made between the surface circuit patterns on both surfaces. Through holes for through holes that penetrate the laminated body are provided at places where connection is required, and the through holes for through holes are filled with a conductive substance to substantially form a circuit pattern formed on the surface of the laminated body. A through hole portion having the same surface is formed, and a conductive pattern made of a cured body of a curable conductive material having a uniform thickness is formed to cover a connection portion between the through hole portion and the circuit pattern formed on the surface. Octopus Circuit board according to claim.
JP34038195A 1995-03-01 1995-12-27 Circuit board Pending JPH08316602A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34038195A JPH08316602A (en) 1995-03-01 1995-12-27 Circuit board

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP4215395 1995-03-01
JP7-52877 1995-03-13
JP5287795 1995-03-13
JP7-42153 1995-03-13
JP34038195A JPH08316602A (en) 1995-03-01 1995-12-27 Circuit board

Publications (1)

Publication Number Publication Date
JPH08316602A true JPH08316602A (en) 1996-11-29

Family

ID=27291085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34038195A Pending JPH08316602A (en) 1995-03-01 1995-12-27 Circuit board

Country Status (1)

Country Link
JP (1) JPH08316602A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10308576A (en) * 1997-01-10 1998-11-17 Ibiden Co Ltd Printed wiring board and its manufacture
KR100362145B1 (en) * 2001-03-21 2002-11-22 주식회사 아이에스시테크놀러지 Surface structure of electric contact and method of forming the contact
USRE40947E1 (en) 1997-10-14 2009-10-27 Ibiden Co., Ltd. Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10308576A (en) * 1997-01-10 1998-11-17 Ibiden Co Ltd Printed wiring board and its manufacture
US6986917B2 (en) 1997-01-10 2006-01-17 Ibiden Co., Ltd. Printed wiring board and method of manufacturing the same
US7594320B2 (en) 1997-01-10 2009-09-29 Ibiden Co., Ltd. Method of manufacturing printed wiring board
US7765692B2 (en) 1997-01-10 2010-08-03 Ibiden Co., Ltd. Method of manufacturing printed wiring board
USRE40947E1 (en) 1997-10-14 2009-10-27 Ibiden Co., Ltd. Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole
KR100362145B1 (en) * 2001-03-21 2002-11-22 주식회사 아이에스시테크놀러지 Surface structure of electric contact and method of forming the contact

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