JPH08316489A - Manufacture of thin film semiconductor device - Google Patents

Abstract

PURPOSE: To control optimally a gate parasitic capacitance by the respective thin film transistors of the pixel part and the drive circuit part of a thin film semiconductor device by a method wherein before or after a gate formation process and a semiconductor film formation process, a semiconductor thin film and an optical filter layer, which is formed on the opposite side to the semiconductor thin film, are selectively provided by region holding a gate electrode between them. CONSTITUTION: Before and after a gate formation process and a semiconductor film formation process, a semiconductor thin film 4 and an optical filter layer 11, which is formed on the opposite side to the thin film 4, are selectively provided by region holding a gate electrode 2 between them. Then, a light irradiation is performed on a transparent substrate 1 through the rear of the substrate 1 via the layer 11 and a rear exposure treatment is performed in a self alignment using the electrode 2 as a mask in a state that the amount of transmitted light is controlled by region. Then, an ion stop layer 7 having a desired overlap to respond to a creeping of the amount of the transmitted light to the electrode 2 is formed by patterning on the thin film 4 by region. Lastly, impurities are implanted in the thin film 4 using the layer 7 as a mask to provide source and drain regions S and D in the thin film 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film semiconductor device. More specifically, it relates to a method of forming a bottom gate type thin film transistor having a semiconductor thin film made of polycrystalline silicon or the like as an active layer by backside exposure.

[0002]

2. Description of the Related Art A thin film semiconductor device in which thin film transistors are integrated is suitable for, for example, a drive substrate (active element substrate) of an active matrix type liquid crystal display panel, and has been actively developed. Amorphous silicon thin films and polycrystalline silicon thin films are typically used as active layers of thin film transistors. Further, as the structure of the thin film transistor, a bottom gate type and a top gate type have been mainly developed. All of these are field effect transistors. In the bottom gate type, a gate electrode is patterned on the surface of a transparent substrate, and then a semiconductor thin film to be an active layer is formed on the gate electrode via a gate insulating film. In the top gate type, a semiconductor thin film to be an active layer is first formed on a transparent substrate, and then a gate electrode is patterned on the transparent substrate through a gate insulating film. The bottom gate type is superior in reliability while the manufacturing process is complicated. That is, since the active layer is separated from the transparent substrate via the gate insulating film, adverse effects of contaminants contained in the substrate are small. On the other hand, the top gate type has a relatively simple manufacturing process, but is inferior in reliability. That is, since the active layer is in direct contact with the substrate surface, it may be contaminated.

[0003]

In order to simplify the manufacturing process of the bottom gate type thin film transistor, back surface exposure processing has been conventionally performed, and various patterning is performed by self alignment using the underlying gate electrode as a mask. For example, a source region and a drain region of a thin film transistor are formed by patterning an ion blocking layer aligned with a gate electrode on a semiconductor thin film and using this as a mask to dope impurities. In this case, since the light radiated from the back surface wraps around (diffracts), the pattern of the ion blocking layer is reduced inward as compared with the gate electrode, and some offset occurs. This offset amount affects the operating characteristics of the thin film transistor. In the conventional backside exposure process, it is difficult to selectively control the offset amount for each thin film transistor, and they all have the same operating characteristics. However, in a thin film semiconductor device for display in which thin film transistors are integratedly formed, a structure has been developed in which, in addition to a pixel switching thin film transistor formed in a screen region, a drive circuit is similarly integrated and formed in a peripheral region in a thin film transistor. In this case, in the screen region and the peripheral region, although it is desired to optimize the operating characteristics of the thin film transistors, the conventional backside exposure process can only obtain thin film transistors having uniform operating characteristics.

Further, since the thin film transistor formed in the screen area is used for pixel switching, a so-called LDD structure is adopted to suppress the leak current. On the other hand, since the thin film transistor formed in the peripheral region constitutes a driving circuit, a high operating speed and a large on-current are required, and it is preferable not to adopt the LDD structure. When the LDD structure is formed by using the back surface exposure process, first, an ion blocking layer (for example, a photoresist, an insulating oxide film, etc.) is formed by self-alignment by the back surface exposure, and then the thin film transistors belonging to both the screen region and the peripheral region are formed. Ion implantation or ion doping with a relatively low concentration of impurities is performed on the source region and the drain region. Next, LD of the screen area
After performing a photolithography process for protecting the D region and a photolithography process for protecting the channel portion of the thin film transistor belonging to the peripheral region, a high concentration impurity is ion-implanted or ion-doped. As a result, a thin film transistor having an LDD structure is formed in the screen region, and a thin film transistor having no LDD structure is formed in the peripheral region. Since the photolithography process described above is not self-alignment, the precision of the LDD region depends on the photolithography precision, and the leak current of the thin film transistor varies. In addition, a large offset region may occur in the thin film transistor that constitutes the drive circuit in the peripheral region, which makes it impossible to drive. As a result, there is a problem that the uniformity of the display image quality becomes poor. Further, in the above-described conventional method, in order to stabilize the leak current reduction effect of the thin film transistor, it is necessary to secure a process margin of the LDD region and a process margin of the thin film transistor forming the drive circuit. These process margins result in a problem that the pixel aperture ratio is lowered.

[0005]

Means for Solving the Problems The following means have been taken in order to solve the above-mentioned problems of the conventional technology. That is, according to the present invention, the thin film semiconductor device is manufactured by the following steps.
First, a gate forming step is performed to form a gate electrode having a light shielding property on the surface side of the transparent substrate by patterning. Next, a semiconductor film forming step is performed to form a light-transmitting semiconductor thin film on the gate electrode via a gate insulating film. A filter disposing step is performed before or after the gate forming step and the semiconductor film forming step, and an optical filter layer is selectively provided in each region on the side opposite to the semiconductor thin film with the gate electrode interposed therebetween. Next, a blocking layer forming step is performed, and light is emitted from the back surface of the transparent substrate through the optical filter layer to control the amount of transmitted light for each area, and the back surface is exposed by self-alignment using the gate electrode as a mask. Then, an ion blocking layer having a desired offset (overlap) depending on the amount of transmitted light with respect to the gate electrode is patterned and formed on the semiconductor thin film for each region. Finally, a transistor forming step is performed, and the semiconductor thin film is doped with impurities by self-alignment using the ion blocking layer as a mask to integrally form a bottom gate type thin film transistor in which a gate offset amount is controlled for each region.

Preferably, in the step of forming a semiconductor film, a semiconductor thin film is formed over both a screen area defined on a transparent substrate and a peripheral area surrounding the screen area. In this case, in the transistor forming step, a thin film transistor for switching is integrated and formed in the screen area, and at the same time, a thin film transistor is integrated in the peripheral area to form a driving circuit for driving the thin film transistor for switching. In addition, a pixel forming step is performed to form a pixel electrode switched by the switching thin film transistor in the screen area.
In the case of assembling an active matrix type display device using the thin film semiconductor device thus manufactured as a drive substrate, the counter substrate on which the counter electrode is formed in advance is bonded to the transparent substrate through a predetermined gap, An electro-optical material such as liquid crystal may be filled in the gap. In addition, in the semiconductor film forming step, for example, a semiconductor thin film made of polycrystalline silicon, which is superior in light transmittance to amorphous silicon, is formed.

In one aspect of the present invention, the filter disposing step disposes an optical filter layer made of a single-layer filter film, a multi-layer filter film or a filter plate along the back surface of the transparent substrate. Alternatively, the filter disposing step may be a step of disposing an optical filter layer made of a single-layer filter film or a multi-layer filter film below the gate electrode along the surface of the transparent substrate. In another aspect of the present invention, the blocking layer forming step includes a step of forming an insulator on the semiconductor thin film, and a back surface exposure process after forming a photoresist on the insulator. And a step of forming a photoresist pattern having an offset, and a step of etching the insulator through the photoresist pattern to form a channel stopper to form an ion blocking layer. Alternatively, the blocking layer forming step includes a step of forming a protective film made of an ion-permeable insulating material on the semiconductor thin film, and a back surface exposure after forming a photoresist on the protective film. And the step of performing the treatment to use the photoresist as an ion blocking layer as it is.

According to one aspect of the present invention, the blocking layer forming step forms a heat-deformable first ion blocking layer having a relatively small offset in the screen area, and a relatively large offset in the peripheral area. The second heat-deformable ion blocking layer is formed. In this case, the transistor forming step includes a step of doping a low concentration impurity using the first and second ion blocking layers as a mask, and a heat treatment to add a first step.
A step of thermally deforming the ion blocking layer to expand outward beyond a small offset while limiting the thermal deformation of the second ion blocking layer within a large offset; and masking the thermally deformed first and second ion blocking layers As a second step, a step of forming a thin film transistor having an LDD structure in the screen region by doping with a high concentration of impurities and forming a thin film transistor having no LDD structure in the peripheral region is included.

[0009]

According to the present invention, the bottom gate type field effect thin film transistor is the same in the screen region and the peripheral region with the semiconductor thin film made of polycrystalline silicon, which is superior in light transmittance as compared with amorphous silicon, as the active layer. It is formed on a transparent substrate. The gate electrode is formed of a light-shielding metal or a material having the same characteristics. By performing the exposure process by self-alignment from the back surface using the pattern of the gate electrode as a mask, an offset amount (around the gate electrode pattern due to light diffraction) ( The ion blocking layer is formed so that the overlap amount is uniquely determined. The active layer is doped with impurities using the ion blocking layer as a mask. In this case, an optical filter layer is formed on at least one of the screen area and the peripheral area along the back surface of the transparent substrate opposite to the surface on which the device is formed. This filter layer is composed of a single-layer filter film or a multi-layer filter film having a similar function that changes the transmittance of light used for the backside exposure processing. Alternatively, a filter plate having different transmittances between regions is closely attached to the back surface of the transparent substrate to form a filter layer. Thereby, the exposure amount from the back surface is made different between the screen area and the peripheral area. As a result, the amount of overlap between the thin film transistor for pixel switching formed in the screen region and the thin film transistor of the drive circuit portion formed in the peripheral region is formed to have different sizes. For this reason, the gate parasitic capacitance can be optimally controlled by the pixel switching thin film transistor and the thin film transistor of the drive circuit unit, respectively. Alternatively, before forming the gate electrode, a filter layer for changing the transmittance of the wavelength required for the back surface exposure may be formed in advance in at least one of the screen area and the peripheral area.
By differentiating the amount of exposure from the back surface in the screen region and the peripheral region, it is possible to form the pixel switching thin film transistor and the thin film transistor in the drive circuit unit with different overlap amounts in the same manner. Furthermore, by using a thermally deformable photoresist as the ion blocking layer,
A thin film transistor having an LDD structure can be formed in the screen region, and a thin film transistor having no LDD structure can be formed in the peripheral region. In this case, one back exposure process and two ion implantations or dopings divided into low concentration and high concentration for forming the source region and the drain region,
It is possible to form the LDD structure by one heat treatment of the photoresist.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a process chart showing an example of a method of manufacturing a thin film semiconductor device according to the present invention. First, in step (A), a gate electrode 2 having a light-shielding property is patterned on the surface side of a transparent substrate 1 made of glass or the like. For example,
After forming a metal or alloy such as Mo or Ta by sputtering or the like, it is patterned into a predetermined shape by using photolithography and etching and processed into the gate electrode 2. Then, the gate insulating film 3 is formed on the gate electrode 2. For example, the gate insulating film 3 is formed by depositing SiO ₂ , SiN or the like by the CVD method. Alternatively, the surface of the gate electrode 2 made of metal may be anodized to be a part of the gate insulating film 3. Further, a semiconductor thin film 4 made of polycrystalline silicon, which is superior in light transmittance to amorphous silicon, is formed on the gate insulating film 3. For example, after depositing amorphous silicon by the CVD method, excimer laser light is irradiated to once melt and recrystallize to convert it into high-quality polycrystalline silicon. After that, the insulator 5 is formed on the semiconductor thin film 4. For example, SiO ₂ is formed into a film having a predetermined thickness by the CVD method and the insulator 5 is provided.

As a feature of the present invention, before or after the above-mentioned gate formation step and semiconductor film formation step, the optical filter layer 11 is selected for each region on the side opposite to the semiconductor thin film 4 with the gate electrode 2 interposed therebetween. To set up. In the illustrated example, only the region where the optical filter layer 11 is provided is shown. Subsequently, after forming a photoresist film on the insulator 5, the photoresist is exposed from the back surface of the transparent substrate 1 through the optical filter layer 11 using the gate electrode 2 as a mask by self-alignment. As a result, a photoresist pattern 6 that is substantially aligned with the gate electrode 2 is created.

In step (B), the insulator 5 is etched through the photoresist pattern 6 to form an ion blocking layer (channel stopper) 7 substantially aligned with the gate electrode 2. The photoresist pattern 6 can be formed in a desired size by adjusting the back surface exposure intensity via the optical filter layer 11. By etching the insulator 5 using the photoresist pattern 6 as a mask, the dimensions of the channel stopper to be the ion blocking layer 7 can be freely controlled. Assuming that the offset amount (overlap amount) that wraps around the pattern of the gate electrode 2 by the diffraction of light by the back surface exposure is ΔL, the size of the width W−2 × ΔL of the gate electrode 2 determines the channel length L. Generally, the smaller ΔL is, the smaller the gate parasitic capacitance of the thin film transistor becomes, and the higher performance operation characteristics can be obtained. As described above, in the present invention, the backside exposure process is performed by self-alignment using the gate electrode 2 as a mask in a state where the backside of the transparent substrate 1 is irradiated with light through the optical filter layer 11 and the amount of transmitted light is controlled for each region. An ion blocking layer 7 having a desired overlap depending on the amount of transmitted light with respect to the electrode 2 is patterned and formed on the semiconductor thin film 4 for each region.

Finally, in the step (C), the semiconductor thin film 4 is doped with impurities by self-alignment using the ion blocking layer 7 as a mask.
To form a source region S and a drain region D.
As a result, bottom gate type thin film transistors (TFTs) whose gate parasitic capacitance is controlled are integrated. The implantation of impurities is performed by ion doping, for example.
In this method, after the source gas is ionized, the semiconductor thin film 4 is accelerated and accelerated without mass separation. This ion doping method is suitable for manufacturing a large-area thin film semiconductor device. However, the present invention is not limited to this, and ion implantation can also be used as an impurity implantation method. In this method, after ionizing a source gas, mass separation is performed and acceleration is performed to inject ions of a desired impurity species into a semiconductor thin film in a beam shape. Then, the drain wiring 8D is connected to the drain region D to be patterned, and the source wiring 8S is connected to the source region S to be patterned.

FIG. 3 is a process drawing showing another example of the method for manufacturing a thin film semiconductor device according to the present invention. The basic steps are the same as in the example shown in FIG. 1, and corresponding parts are designated by corresponding reference numerals to facilitate understanding. In this example, the pixel electrode and its switching thin film transistor are collectively formed in the screen area set on the transparent substrate, and the circuit for driving the switching thin film transistor is integratedly formed in the peripheral area set on the same substrate. . The thin film semiconductor device having such a configuration is suitable as an active element substrate of an active matrix display device. First, in step (A), a gate electrode 2x is patterned on a screen area X set on the surface of the transparent substrate 1, and another gate electrode 2y is simultaneously formed on a peripheral area Y also set on the surface of the transparent substrate 1. Patterning is formed. These gate electrodes 2x and 2y are covered with a common gate insulating film 3. Further, the semiconductor thin film 4 is formed on the gate insulating film 3 over both the screen region X and the peripheral region Y surrounding the screen region X. Further, an insulator 5 made of SiO ₂ or the like is formed on the semiconductor thin film 4. Here, the optical filter layer 11 is provided on the back surface of the transparent substrate 1. In this example, the optical filter layer 11 is provided only in the screen area X, and compared with the amount of transmitted light in the peripheral area Y,
The amount of transmitted light in the screen area X is controlled to be small. That is, the optical filter layer 11 controls the amount of transmitted light for each of the regions X and Y when light is irradiated from the back surface of the transparent substrate 1. Subsequently, after forming a photoresist film on the insulator 5, the photoresist is exposed from the back surface of the transparent substrate 1 by self-alignment using the gate electrodes 2x and 2y as a mask to substantially align with the gate electrodes 2x and 2y. Photoresist patterns 6x and 6y are created. At this time, the screen area X
The back surface exposure intensity of the peripheral region Y is smaller than that of the optical filter layer 11
Will increase as there is no intervention. Therefore, the amount of overlap due to light diffraction is larger in the photoresist pattern 6y than in the photoresist pattern 6x.

In step (B), the insulator 5 is etched by using the photoresist patterns 6x and 6y as masks to form the ion blocking layers (channel stoppers) 7x and 7y respectively overlapping the gate electrodes 2x and 2y. Subsequently, in step (C), the semiconductor thin film 4 is patterned into an island shape, and separated into blocking regions. Subsequently, impurities are implanted into the semiconductor thin film 4 by self-alignment using the channel stoppers 7x and 7y as masks. As a result, a thin film transistor (TFT-S) for switching is displayed in the screen area X.
W) is formed in an integrated manner, and a thin film transistor (TFT-CKT) is also integrated in the peripheral region Y to form a TFT-SW.
Create a circuit to drive. As shown, TFT-C
The channel length of KT is shortened by the amount of overlap larger than the channel length of TFT-SW. Here, P (phosphorus) is ion-doped or ion-implanted as an impurity to form an N-channel TFT-SW and a TFT-CKT. The part of the semiconductor thin film 4 into which the impurity P is implanted becomes the source region S and the drain region D of each thin film transistor. After that, the source wiring 8S is formed by connecting to the source region S of the TFT-SW. At the same time, the drain wiring 8D is formed by connecting to the drain region D of the TFT-CKT, and the source wiring 8S is formed by connecting to the source region S.

Finally, in step (E), the TFT-SW
And the TFT-CKT is covered with an interlayer insulating film 9 made of PSG or the like. A contact hole is opened in the interlayer insulating film 9 to partially expose the drain region D of the TFT-SW. A transparent conductive film made of ITO or the like is formed on the interlayer insulating film 9 by sputtering or the like, and then patterned into a predetermined shape by photolithography and etching to form the pixel electrode 10. The pixel electrode 10 is electrically connected to the drain region D of the TFT-SW and is switching-driven by the TFT-SW. In this way, by using the semiconductor thin film 4 made of polycrystalline silicon as the active layer, it becomes possible to form the pixel portion and the drive circuit portion on the same transparent substrate 1. The thin film semiconductor device having such a structure is used for assembling an active matrix type display device. In this case, a counter substrate on which a counter electrode is formed in advance may be bonded to the transparent substrate 1 through a predetermined gap, and an electro-optical substance such as liquid crystal may be sealed in the gap.

FIG. 4 is a schematic partial cross-sectional view showing another example of the thin film semiconductor device manufactured according to the present invention. The basic structure is similar to that shown in FIG. 2E, and corresponding parts are designated by corresponding reference numerals to facilitate understanding. In the structure shown in FIG. 2E, only the N-channel TFT-CKT is formed in the peripheral region Y to form a drive circuit. On the other hand, in the example shown in FIG. 3, in the peripheral region Y, in addition to the N-channel type thin film transistor (Nch-TFT-CKT), the P-channel type thin film transistor (Pch-TFT-CKT) is formed integrally. . Thus, in this example, the CMOS is used to form the drive circuit unit. In the case of this example, first, an N-type impurity (for example, P) is ion-doped, and the drain region D and the source region S of the TFT-SW and the Nch-TFT-CKT are formed.
A drain region D and a source region S are formed. Subsequently, P-type impurities (for example, B) are selectively ion-doped to form the drain region D and the source region S of the Pch-TFT-CKT. After that, by patterning the source wiring 8S, the drain wiring 8D, and the pixel electrode 10, the pixel portion and the driving circuit portion can be formed on the same substrate. Also in this example, the corresponding channel stoppers 7x, 7yn, and 7yp are formed by the back surface exposure process using the gate electrodes 2x, 2yn, and 2yp as masks through the region-selectively formed optical filter layer 11. Therefore,
By setting the exposure intensity to an appropriate value for each region by the optical filter layer 11 without depending on the alignment accuracy of the photolithography process that has been conventionally performed, the TFT-SW
And the parasitic capacitance of TFT-CKT can be controlled appropriately.

FIG. 4 is a graph showing the relationship between the back surface exposure amount and the overlap amount. The back-side exposure amount (J / cm ² ) is plotted on the horizontal axis of this guffler, and the overlap amount ΔL (μ that entered the gate pattern due to light diffraction by the back-side exposure is plotted on the vertical axis.
m) is shown. As is clear from the graphula, as the intensity of the back surface exposure amount increases, the light diffraction increases and the overlap amount ΔL increases. According to the present invention, the optimum overlap amount ΔL is realized for each area by adjusting the effective back surface exposure amount by selectively interposing the optical filter layer.

FIG. 5 is a schematic view showing a specific structure of the optical filter layer 11. In this example, the optical filter layer 11 is provided only on the screen area on the back surface side of the transparent substrate 1 made of glass or the like. By reflecting the specific wavelength component used for the back surface exposure on the optical filter layer 11, the exposure amount reaching the front surface side is adjusted, and the overlap amount ΔL having different sizes in the screen region and the peripheral region is obtained. In FIG. 5, the refractive index of air is n0, and the refractive index of the transparent substrate 1 is n.
2. Assuming that the refractive index of the single-layer filter film constituting the optical filter layer 11 is n1 and the film thickness thereof is d1, n1> n0, n2
Then, the maximum reflection condition is obtained when n1 · d1 = (2k + 1) λ / 4. However, k is an arbitrary integer value. For example, the gate electrodes 2x, 2y, the gate insulating film 3, the semiconductor thin film 4 made of polycrystalline silicon, and the insulator 5 made of SiO ₂ are formed on the transparent substrate 1, and SiN _x is formed on the single-layer filter film of the optical filter layer 11. When (n1 = 1.8) is used, d1 = at a wavelength (380 to 440 nm) generally used for exposure.
By setting the thickness to 40 to 80 nm, the reflectance increases by about 15%.
In this case, as is apparent from the exposure amount dependency of ΔL shown in FIG. 4, the overlap amount ΔLp in the screen region and the overlap amount ΔLd in the peripheral region are about 0.
A difference of about 2 μm can be generated. In addition, the single-layer filter film forming the optical filter layer 11 is made of TiO ₂ (n1
= 2.9), by setting d1 = 25 to 50 nm, the reflectance becomes about 40%, and a difference of about 0.6 μm can be generated between ΔLp and ΔLd. . Although a single layer filter film is used as the optical filter layer 11 in this example, a similar effect can be obtained by using a multilayer filter film instead of this.

FIG. 6 shows the optical filter layer 11 shown in FIG.
3 shows a film forming jig (mask) used for forming the film. In this way, the optical filter layer 11 does not use a photolithography process or the like, and the simple film forming jig 5 having the opening 51 is formed.
Regions can be selectively formed by using 0.

7 and 8 show another example of the optical filter layer. Here, a filter plate 11a having an ND filter 11b instead of the filter film is closely arranged on the back surface side of the transparent substrate 1. Thus, by controlling the transmittance from the back surface with respect to the screen area and the peripheral area, it is possible to cause a difference in effective exposure amount and obtain two different ΔLp and ΔLd on the same transparent substrate. This is an effective method because it does not depend on the exposure wavelength and does not require a special process.

Further, FIG. 9 shows that the single-layer filter film 11c is selectively provided under the gate electrode 2x along the surface of the transparent substrate 1.
Alternatively, an example in which an optical filter layer made of a multilayer filter film is arranged is shown. The single-layer filter film 11c has n1> n0,
The film is formed to satisfy the conditions of n2 and n1 · d1 = (2k + 1) λ / 4, and is formed not on the back surface of the transparent substrate 1 but on the device-side surface before forming the gate electrode 2x.
After that, the same effect can be obtained by forming a bottom gate type transistor.

Next, FIG. 10 shows a pixel switching thin film transistor having an LDD structure and an LDD on the same substrate.
This shows a method of forming an N-channel type drive circuit thin film transistor having no structure, which is an example using the ND filter described above. First, in step (A), the gate electrodes 2x and 2y, the gate insulating film 3, the semiconductor thin film 4, and the protective film 5a made of an ion-permeable insulator are sequentially formed on the transparent substrate 1. The protective film 5a is made of, for example, SiO _{2 having} a film thickness that enables ion implantation. Proceeding to step (B), the ND filter 11b is provided only on the back surface of the screen region X,
The transmittance of the screen area X is smaller than that of the peripheral area Y. Further, a thermally deformable photoresist is applied on the protective film 5a. This photoresist can be laterally deformed by heat treatment. After this, the filter plate 11
Backside exposure is performed via a.
Get x, 6y. These photoresist patterns 6x,
6y is used as it is as an ion blocking layer. As a result, ΔLp is formed smaller than ΔLd. Here, by properly selecting the back surface exposure amount and the value of the ND filter 11b, control is performed so that ΔLp becomes approximately 0 to 0.5 μm and ΔLd becomes 1.5 to 2.0 μm. For example, in FIG.
As is clear from the graph of, the exposure amount is 1.2 to 2.0J
/ Cm ^2, and the transmittance of the ND filter 11b is 10 to 20.
The above-mentioned ΔLp and ΔLd can be incorporated by setting the ratio to%.

Proceeding to step (C), a low-concentration impurity (for example, P) is formed on the ion-permeable protective film 5a by ion implantation or ion doping using the photoresist patterns 6x and 6y as ion blocking layers (masks). ) Is implanted into the semiconductor thin film 4.

Proceeding to the step (D), a heat treatment for laterally expanding the photoresist patterns 6x and 6y used as the ion blocking layer is performed, and the photoresist pattern 6x which is the ion blocking layer is made larger than the size of the gate electrode 2x of the transistor. Is also increased by 0.5 to 1.0 μm on one side. On the other hand, the photoresist pattern 6y which is the ion blocking layer
Is controlled so as to be inside the size of the corresponding gate electrode 2y. In this state, a high-concentration impurity (P) is implanted into the semiconductor thin film 4 by ion implantation or ion doping using the photoresist patterns 6x and 6y enlarged in the lateral direction as a mask. As a result, a thin film transistor having an LDD region is formed in the screen region X, and a normal thin film transistor is formed in the peripheral region Y.

Finally, in step (E), a contact hole is opened in the protective film 5a by photolithography and etching. Further, the source wiring 8S, the drain wiring 8D, and the pixel electrode 10 are formed by using photolithography or etching. As described above, in this example, the thermally deformable first ion blocking layer (photoresist pattern 6x) having a relatively small overlap is formed in the screen area X, while the relatively large overlap is formed in the peripheral area. The heat-deformable second ion blocking layer (photoresist pattern 6y) is formed. Further, after doping low-concentration impurities using the first and second ion blocking layers as masks, heat treatment is applied to thermally deform the first ion blocking layers to expand outward beyond a small overlap, while Limit thermal deformation of the ion blocking layer to within a large overlap. Then, the thermally deformed first and second ion blocking layers are used as a mask to dope a high concentration of impurities to form a thin film transistor having an LDD structure in the screen region, while forming a thin film transistor having no LDD structure in the peripheral region. To do.

FIG. 11 shows a thin film transistor LDD-TF for pixel switching having an LDD structure in the screen area X.
T-SW and normal Nch-TFT-CK in the peripheral area Y
This shows an example in which a CMOS drive circuit composed of T and Pch-TFT-CKT is formed at the same time. Here, FIG.
Instead of the protective film 5a used in the above, an insulator made of SiO ₂ or the like having a film thickness sufficient for preventing ions is formed. 1
This insulator is etched after the back surface exposure for the second time, and a low concentration N-type impurity (P) is implanted into the semiconductor thin film 4 by ion implantation or ion doping while leaving the photoresist, thereby forming an N-type LDD region. . After that, a heat treatment for laterally expanding the photoresist is performed to obtain a high concentration of N.
Type impurity (P) is implanted into the semiconductor thin film 4, and LDD-T
A source region and a drain region of FT-SW and Nch-TFT-CKT are formed. Next, LDD-TFT-SW
While masking the Nch-TFT-CKT portion with a resist, a high-concentration P-type impurity (for example, B) is used with the ion blocking layer 7yp made of an etched insulator as a mask.
Is implanted to form a drain region and a source region of Pch-TFT-CKT. After that, a source wiring 8S and a drain wiring 8D are formed, and a self-aligned CM is formed.
The OS drive circuit is completed. In this way, the gate electrode 2
LDD-self-aligned with x, 2yn, and 2yp
Self-aligned Nch-TFT as well as TFT-SW
-CKT, Pch-TFT-CKT can be obtained at the same time. Also, using the above self-alignment method,
As the panel has a smaller pixel pitch such as a high-definition panel, the margin of the photolithography process (about 1.0 to 3.0 μm depending on the exposure device) becomes unnecessary. Therefore, the LDD region and the driving of the pixel switching transistor are required. The margin portion of the protective resist pattern of the channel portion of the circuit transistor may be small, which is effective for producing a high aperture ratio panel.

Finally, FIG. 12 shows an example of an active matrix type display device assembled by using the thin film semiconductor device manufactured according to the present invention. As shown in the figure, the display device has a panel structure including a transparent substrate 101, a counter substrate 102, and an electro-optical material composed of a liquid crystal 103 and the like held between the transparent substrate 101 and the counter substrate 102. A pixel portion 104 and a driving circuit portion are integrated and formed on the transparent substrate 101. The drive circuit section is divided into a vertical drive circuit 105 and a horizontal drive circuit 106. Further, a terminal portion 107 for external connection is formed on the upper end of the peripheral portion of the transparent substrate 101. Terminal part 10
7 is connected to the vertical drive circuit 105 and the horizontal drive circuit 106 via the wiring 108. A gate wiring 109 and a signal wiring 110 which intersect with each other are formed in the pixel portion 104. The gate wiring 109 is connected to the vertical driving circuit 105, and the signal wiring 110 is connected to the horizontal driving circuit 106. A pixel electrode 111 and a thin film transistor 112 for switching and driving the pixel electrode 111 are formed at the intersection of the gate line 109 and the signal line 110. The drain region of the thin film transistor 112 is connected to the corresponding pixel electrode 111, the source region is connected to the corresponding signal line 110, and the gate electrode is connected to the corresponding gate line 109.

[0029]

As described above, according to the present invention, the pixel portion and the driving circuit portion are formed on the same substrate by using the back surface exposure processing through the optical filter layer provided selectively. There is. According to the present invention, the amount of overlap ΔL between the gate electrode and the source region / drain region, which determines the parasitic capacitance of the thin film transistor in the pixel portion and the driving circuit portion, can be optimized by one back exposure process. . Conventionally, the overlap amount ΔL has the same size in the pixel section and the drive circuit section, and it has been difficult to form different sizes. or,
According to the present invention, the LDD structure of the pixel transistor of the self-alignment and the self-alignment are formed by one back exposure process, two ion implantation processes of low concentration and high concentration, and one photoresist heating process. Both the transistor structure of the align drive circuit can be formed at the same time, and the LD
The D process can be simplified. Since all bottom-gate thin film transistors are self-aligned,
It is possible to reduce the parasitic capacitance and the variation, and improve the image quality when applied to an active matrix type display device or the like. The reduction of the parasitic capacitance and the variation are also useful for reducing the storage capacitance (pixel auxiliary capacitance) that greatly affects the aperture ratio. In addition, the self-alignment process eliminates the need for a process margin for the photolithography process for the ion blocking layer, thereby improving the pixel aperture ratio of the panel.

[Brief description of drawings]

FIG. 1 is a process chart showing an example of a method of manufacturing a thin film semiconductor device according to the present invention.

FIG. 2 is a process drawing showing another example of the method for manufacturing a thin film semiconductor device according to the present invention.

FIG. 3 is a schematic view showing another example of the method for manufacturing a thin film semiconductor device according to the present invention.

[FIG. 4] Overlap Δ of backside exposure and channel size
It is a graph which shows the relationship with L.

FIG. 5 is a schematic cross-sectional view showing an example of an optical filter layer used in the manufacturing method according to the present invention.

6 is a schematic plan view showing a film forming jig used for forming the optical filter layer shown in FIG.

FIG. 7 is a schematic cross-sectional view showing another example of the optical filter layer.

FIG. 8 is a schematic plan view of the optical filter layer shown in FIG.

FIG. 9 is a schematic cross-sectional view showing another example of the optical filter layer.

FIG. 10 is a process drawing showing still another example of the method for manufacturing a thin film semiconductor device according to the present invention.

FIG. 11 is a schematic view showing still another example of the method for manufacturing a thin film semiconductor device according to the present invention.

FIG. 12 is a schematic perspective view showing an example of an active matrix type liquid crystal display device assembled using the thin film semiconductor device manufactured according to the present invention.

[Explanation of symbols]

 1 Transparent Substrate 2 Gate Electrode 3 Gate Insulating Film 4 Semiconductor Thin Film 5 Insulator 6 Photoresist Pattern 7 Ion Blocking Layer (Channel Stopper) 10 Pixel Electrode 11 Optical Filter Layer

Claims (9)

[Claims] 1. A gate formation step of patterning a light-shielding gate electrode on the surface side of a transparent substrate, and a semiconductor in which a light-transmitting semiconductor thin film is formed on the gate electrode through a gate insulating film. A film forming step, and a filter disposing step of selectively providing an optical filter layer for each region on the side opposite to the semiconductor thin film with the gate electrode interposed before or after the gate forming step and the semiconductor film forming step. , The rear surface of the transparent substrate is irradiated with light through the optical filter layer and the amount of transmitted light is controlled for each region, and the rear surface exposure process is performed by self-alignment using the gate electrode as a mask, and the light is transmitted to the gate electrode. A step of forming an ion blocking layer having a desired offset depending on the amount of light wrapping on the semiconductor thin film by region, and Method of manufacturing a thin film semiconductor device in which impurities are doped into the semiconductor thin film in self-alignment, is performed and a transistor forming step of integrally formed a bottom gate type thin film transistor controls the gate offset for each region as a. 2. The semiconductor film forming process forms a semiconductor thin film over both a screen region defined on a transparent substrate and a peripheral region surrounding the screen region, and in the transistor forming process, a switching thin film transistor is formed in the screen region. And forming a driving circuit for driving the switching thin film transistor by integrating thin film transistors also in the peripheral region at the same time as forming the pixel electrode and switching the pixel electrode switched by the switching thin film transistor to the screen region. The method for manufacturing a thin film semiconductor device according to claim 1, wherein the thin film semiconductor device is formed. 3. The thin film semiconductor according to claim 1, wherein the filter disposing step is a step of disposing an optical filter layer made of a single-layer filter film, a multi-layer filter film or a filter plate along the back surface of the transparent substrate. Device manufacturing method. 4. The filter disposing step is a step of disposing an optical filter layer made of a single-layer filter film or a multi-layer filter film below the gate electrode along the surface of the transparent substrate. Of manufacturing a thin film semiconductor device of. 5. The blocking layer forming step comprises: a step of forming an insulator on the semiconductor thin film; 2. The thin film semiconductor device according to claim 1, further comprising: a step of forming a photoresist pattern having an offset by etching, and a step of etching the insulator through the photoresist pattern to form a channel stopper into an ion blocking layer. Production method. 6. The blocking layer forming step comprises a step of forming a protective film made of an ion-permeable insulator on the semiconductor thin film, and a back surface exposure after forming a photoresist on the protective film. 2. The method for manufacturing a thin film semiconductor device according to claim 1, further comprising the step of performing the treatment to use the photoresist as an ion blocking layer as it is. 7. The blocking layer forming step forms a heat-deformable first ion blocking layer having a relatively small offset in a screen area, and a heat-deformable second ion blocking layer having a relatively large offset in a peripheral area. An ion blocking layer is formed, and the transistor forming step includes a step of doping a low concentration of impurities using the first and second ion blocking layers as a mask, and a heat treatment to thermally deform the first ion blocking layer to form a small offset. A step of expanding beyond the outside and limiting the thermal deformation of the second ion blocking layer within a large offset, and doping the high concentration impurity using the thermally deformed first and second ion blocking layers as a mask A thin film transistor having an LDD structure is formed on the other side, while LDD is formed on the peripheral region.
3. The method for manufacturing a thin film semiconductor device according to claim 2, further comprising the step of forming a thin film transistor having no structure. 8. The method of manufacturing a thin film semiconductor device according to claim 1, wherein the semiconductor film forming step is a step of forming a semiconductor thin film made of polycrystalline silicon, which has a higher light transmittance than amorphous silicon. 9. A gate forming step of patterning a light-shielding gate electrode on both the screen region and the peripheral region on the surface side of the transparent substrate, and a light-transmitting property is provided on the gate electrode through a gate insulating film. A semiconductor film forming step of forming a semiconductor thin film having the same, and an optical filter layer is selected for each region on the side opposite to the semiconductor thin film with the gate electrode interposed before or after the gate forming step and the semiconductor film forming step. A step of arranging an optical filter, and a backside exposure process by self-alignment using the gate electrode as a mask in a state where light is radiated from the backside of the transparent substrate through the optical filter layer and the amount of transmitted light is controlled for each region. Forming a blocking layer in which an ion blocking layer having a desired offset according to the amount of transmitted light wraps around the gate electrode is patterned on the semiconductor thin film for each region. And a step of self-aligning the semiconductor thin film with impurities by using the ion blocking layer as a mask to integrally form a switching thin film transistor having a predetermined gate offset amount on the screen region, while forming a different gate offset on the peripheral region. A transistor forming step of forming a driving circuit for driving the switching thin film transistor by integrating a certain amount of thin film transistors, and a pixel forming step of forming a pixel electrode switched by the switching thin film transistor in the screen area, A method of manufacturing an active matrix type display device, which comprises: an opposing substrate having electrodes formed thereon is bonded to the transparent substrate through a predetermined gap, and an electro-optical material is sealed in the gap.