JP3194551B2 - Method for manufacturing thin film transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display for driving a liquid crystal.
Manufacturing method of thin film transistors used in display devices and image reading sensors, etc. , especially at relatively low temperatures (600 ° C.
Or less) are those concerning the manufacturing how polysilicon thin film transistor using a polysilicon thin film formed by.

[0002]

2. Description of the Related Art A polysilicon thin film transistor whose application is being studied for a liquid crystal display device and a manufacturing method thereof will be described below with reference to the drawings. In recent years, in the field of liquid crystal display using thin film transistors, polysilicon thin film transistors using polysilicon thin films formed at a relatively low temperature (600 ° C. or less) have been attracting attention (for example, magazine `` Flat Panel Display 1991 '' pp. .117 (Nikkei B
(Company P))). However, one of the serious drawbacks of the polysilicon thin film transistor is that the leakage current is large, which is a serious problem particularly in the case of a thin film transistor for a pixel electrode. For this reason, a transistor having an LDD (lightly doped drain) structure and a transistor having an offset structure have been studied.

FIG. 10 is a process sectional view (a sectional view of a transistor portion) of a conventional method of manufacturing a polysilicon thin film transistor having an LDD structure. Hereinafter, this conventional manufacturing method will be briefly described. First, in FIG. 10, 1 is a light-transmitting substrate, 2 is a polysilicon layer containing a high concentration of impurities, 3 is an amorphous silicon layer, 3 'is a polysilicon layer obtained by crystallizing the amorphous silicon layer 3 by excimer laser irradiation. 4 is a gate insulating film, 5 is a gate electrode, 6 is an interlayer insulating film, 7 is a metal electrode, and L1 and L2 are gate electrodes 5
Is a low-concentration source / drain region (LDD region) which has been ion-implanted by using as a doping mask (functioning to inhibit ion implantation in that portion).

First, a polysilicon layer 2 containing a high-concentration impurity is formed on each part to be a source / drain on a light transmitting substrate 1, and an amorphous silicon layer 3 is formed thereon (FIG. 10 ( a)) Then, the amorphous silicon layer 3 is crystallized by irradiating an excimer laser to form a polysilicon layer 3 '(FIG. 10 (b)). Next, a gate insulating film 4 and a gate electrode 5 are formed, and ion implantation is performed using the gate electrode 5 as a doping mask to form an LDD region L1,
L2 is formed. Subsequently, an interlayer insulating film 6 is formed, and a metal electrode 7 is formed to manufacture a thin film transistor having an LDD structure (FIG. 10C). The polysilicon layer 2 and the gate electrode 5 are patterned by a photolithography process using an exposure machine.

If ion implantation is not performed in the above-mentioned manufacturing method, L1 and L2 become offset regions and become a thin film transistor having an offset structure (optimization of the element structure and doping conditions including the width of L1 and L2 is necessary). Is.). Such a thin film transistor having an LDD structure or an offset structure has a property of a small leak current, and has become an important technology when manufacturing a thin film transistor for a pixel electrode of a high-performance liquid crystal display device (polysilicon shown in FIG. 10). For the method of manufacturing thin film transistors, see 19
Proceedings of the 50th Annual Meeting of the Japan Society of Applied Physics Fall 1989 27a
-A-2, pp.539).

[0006]

However, when a polysilicon thin film transistor having an LDD structure or an offset structure is manufactured by the above-described conventional manufacturing method, there are the following problems. To form these conventional structures, a photolithography process using an exposure machine is used. The first problem is that the width of L1 and L2 varies depending on the location because a variation occurs in a certain range in the photomask alignment, which causes variation in the characteristics of the transistor (the liquid crystal display device). In the case of (1), it is necessary to manufacture a large number of transistors without variation.Especially, when used for a large substrate, a plurality of exposure areas are often connected and divided exposure is performed, and the width ratio between L1 and L2 is determined at the joint. The situation is serious because it may change rapidly.)

Next, in order to form the regions L1 and L2, the two widths of the photomask of the source / drain region and the photomask of the gate electrode 5 must be such that the alignment accuracy and the etching accuracy are secured (liquid crystal display). In the case of an exposure machine for a large substrate used for manufacturing an apparatus, it is necessary to design it with a width of several μm. For this reason, the second problem is that the element size must be larger than that of an element having neither L1 nor L2. (If the purpose is a thin film transistor for a pixel electrode of a liquid crystal display device, it is necessary to increase the aperture ratio (effective area) of the pixel as much as possible, so that the element size is a design problem. A major problem is how to reduce the leakage current.) Also, in the case of a thin film transistor having an LDD structure or an offset structure having a width of several μm and formed using a photolithography process using such an exposure device, the leakage current is reduced. However, on the other hand, the ON ability often decreases. Therefore, when the thin film transistor for the pixel electrode and the thin film transistor for the peripheral driving circuit are formed on the same substrate, if the performance of the thin film transistor for the pixel electrode is emphasized and the LDD structure or the offset structure is used, the performance of the peripheral driving circuit is reduced. That is the third problem.

[0008] The present invention has been made to solve the above and aims to provide a manufacturing how a thin film transistor fabricated in a self-aligned manner to the gate electrode of the LDD region or an offset region using backside exposure I do.

[0009]

In order to achieve the above object, a first method of manufacturing a thin film transistor according to the present invention is to form a semiconductor thin film on an upper part of a light-transmitting substrate and to form an insulating film so as to cover the upper part. Forming a thin film, forming an electrode of a non-light-transmitting conductive thin film on a part of the semiconductor thin film portion above the thin film, and then introducing a first dopant into the semiconductor thin film using the electrode as a doping mask Thereafter, a positive photosensitive thin film is formed so as to cover the upper part of the electrode, and light is irradiated from the back surface of the light-transmitting substrate to expose the positive photosensitive thin film, and a positive electrode patterned in the shape of the electrode is formed. type photosensitive thin film that have a step of etching the side surface portion of the electrode as an etching mask.

As a second manufacturing method, a semiconductor thin film is formed on an upper part of a light-transmitting substrate, an insulating thin film is formed so as to cover the semiconductor thin film, and a part of the semiconductor thin film part is further formed on the insulating thin film. Forming an electrode of a conductive thin film, and thereafter, exposing the positive photosensitive thin film by irradiating light from the back surface of the light-transmitting substrate by forming a positive photosensitive thin film so as to cover above the electrode, the positive photosensitive film is also heat-treated patterned positive photosensitive film in a shape obtained by deforming the shape larger than the shape of the electrode by swelling treatment of the electrode with the doping mask to the semiconductor thin film that having a first dopant introduction process.

[0011]

[0012]

[0013]

[0014]

According to the present invention, the electrodes (which are used as the gate electrodes of the transistors in the present invention) by the above-mentioned constitutional means without using an apparatus having a positioning mechanism such as an exposure machine.
, An LDD region (or offset region) is formed in a self-aligned manner, and LDD regions (or offset regions) formed on both sides of the gate electrode are formed with substantially the same width. Moreover, depending on the conditions it possible to ing to form these regions at a much smaller width than the alignment margin of the exposure machine.

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings. First, a method of manufacturing the thin film transistor according to the first embodiment of the present invention will be described. FIG. 1 shows the first embodiment of the present invention.
FIGS. 5A to 5C are cross-sectional views illustrating the steps of a method for manufacturing a thin film transistor according to an embodiment of the present invention.
Although not explicitly shown in FIG. 1, an amorphous silicon layer (about 1 μm thick) was formed on a translucent substrate 1 (Corning 7059 glass) coated with an SiO ₂ film as an undercoat by plasma CVD.
00 nm).

After that, annealing is performed at 450 ° C. for 1 hour in a vacuum to remove a part of the hydrogen in the amorphous silicon, and the amorphous silicon is separated into a transistor element size (pattern formation by etching). Crystallization is performed by irradiating light (wavelength 308 nm) to form a polysilicon layer 10 (FIG. 1A).

Next, a SiO ₂ thin film 11 to be used as a gate insulating film is deposited by a CVD method, and a Cr thin film (100 to 200
nm, Al thin film is also possible). Then, the gate electrode 12 is formed by patterning the Cr thin film. Then, using the gate electrode 12 in this state as a mask at the time of doping, high-concentration implantation for the source / drain region (first dopant introduction step) 13 is performed by ion shower doping (or bucket type ion doping;
For example, Extended Abstracts of the 22nd (1990 inter
national) Conference on SOLID STATE DEVICES AND MA
TERIALS, pp.971 or pp.1197. ) To form a polysilicon layer 14 containing high-concentration impurities in each part to be a source / drain region (FIG. 1B).

Next, a positive resist 15 is applied as a positive photosensitive thin film so as to cover the upper part of the gate electrode 12, and the back surface of the substrate (in this specification, the surface on which the thin film transistor is formed is the front surface, the surface opposite to the front surface) Is defined as a back surface), and the positive resist 15 is exposed (FIG. 1C).
Thereafter, when development is performed, a positive resist pattern 15 'having the shape of the gate electrode 12 is formed (FIG. 1D). Subsequently, when the gate electrode 12 is etched by wet etching or the like,
Side surface of gate electrode 12 is etched (side etching)
Thus, a gate electrode 12 'is completed (FIG. 1 (e)).

[0019] Then removing the positive resist pattern 15 ', an insulating film (SiO ₂ film) 19 for interlayer insulation, a contact hole, the polysilicon thin film transistor is completed by forming a metal wire 20 ( FIG.
(f)). In the case of this manufacturing method (FIG. 1 (f)), the portion L3 is an offset region. In the present embodiment, the gate electrode 12 and the positive resist pattern 15 'are drawn and represented in exactly the same shape, but the positive resist pattern 15' is actually slightly smaller. However, this is rather convenient when etching a part of the gate electrode.

Next, a method of manufacturing a thin film transistor according to a second embodiment of the present invention will be described. FIG. 2 is a process sectional view of a method of manufacturing a thin film transistor according to a second embodiment of the present invention, and the manufacturing method will be described below in order. The first part of the process is the same as in the first embodiment (FIG. 2 (a)).
The steps up to the cross-sectional structure shown in FIG.
Since the processing is performed in the same steps as those up to (FIG. 1 (d)), the description is omitted. The side surface of the gate electrode 12 is etched by wet etching or the like, thereby completing the gate electrode 12 '. Then, the positive resist pattern 15 'is removed, and the low concentration implantation for the LDD region is performed using the gate electrode 12' as a mask for doping (the second dopant introduction process; the first dopant introduction process for the source / drain regions). The ion implantation is performed with a smaller amount (27) by ion shower doping to form a polysilicon layer 18 containing low-concentration impurities at each portion to be an LDD region (FIG. 2B). After this, an insulating film (SiO ₂ film) 19 for interlayer insulation, contact holes, metal wiring
LD having LDD region L3 'by forming 20
A polysilicon thin film transistor having a D structure is completed (FIG. 2C).

Next, a method of manufacturing a thin film transistor according to a third embodiment of the present invention will be described. FIG. 3 is a process sectional view of a method of manufacturing a thin film transistor according to a third embodiment of the present invention, and the manufacturing method will be described below in order. The first part of the process is the same as in the first embodiment, and the same components are denoted by the same reference numerals and description thereof is omitted. The steps up to the first embodiment (FIG. 1A) are manufactured in the same steps (FIG. 3A). Next, a SiO ₂ thin film 11 is deposited as a gate insulating film by a CVD method,
Further, a Cr thin film (thickness of 100 to 200 nm, which can be an Al thin film) is deposited by a sputtering method. Then, the gate electrode 12 is formed by patterning the Cr thin film. Next, a positive resist 15 is coated as a positive photosensitive thin film so as to cover the upper part of the gate electrode 12, and ultraviolet light irradiation 16 is performed from the back side of the substrate to expose the positive resist 15 (FIG. 3 (b)).

Thereafter, when development is performed, a positive resist pattern 15 'having the shape of the gate electrode 12 is formed (FIG. 3C).
Subsequently, baking or swelling treatment is performed to increase the area of the positive resist pattern 15 'adhered to the substrate, and the gate electrode 12
Fabricate a positive resist pattern 15 ″ larger than the shape of
(FIG. 3 (d)). Then, after this, the positive resist pattern 15 ″
Is used as a mask at the time of doping, high-concentration implantation for source / drain regions (first dopant introduction step) 33 is performed by ion shower doping, and high-concentration impurities are implanted into each part to be a source / drain region. A poly-silicon layer 14 is formed (FIG. 3 (e)). Then, the positive resist pattern 15 ″ is removed, and an insulating film (SiO ₂ film) 19 for interlayer insulation is formed.
A polysilicon thin film transistor is completed by forming a contact hole and a metal wiring 20 (FIG. 3).
(f)). In the case of this manufacturing method (FIG. 3 (f)), the L4 portion is the offset region.

Next, a method of manufacturing a thin film transistor according to a fourth embodiment of the present invention will be described. FIG. 4 is a process sectional view of a method for manufacturing a thin film transistor according to a fourth embodiment of the present invention, and the manufacturing method will be described below in order. The first part of the process is the same as that of the third embodiment, and the same components are denoted by the same reference numerals and description thereof is omitted. The same steps are performed up to the state of the third embodiment (FIG. 3E) (FIG. 4A).
Then, after that, the positive resist pattern 15 ″ is removed,
LD using gate electrode 12 as a mask during doping
Low concentration implantation for D region (second dopant introduction step) 47
Is performed by an ion shower doping method to form a polysilicon layer 18 'containing a low concentration of impurities (FIG. 4B). Then, by forming an insulating film (SiO ₂ ) 19 for interlayer insulation, a contact hole, and a metal wiring 20, a polysilicon thin film transistor is completed (FIG. 4C). In the case of this manufacturing method (FIG. 4C), the L4 'portion becomes the LDD region.

As described in the first to fourth embodiments,
LDD around gate electrode 12 and self-aligned
The region (or offset region) is formed without using an apparatus having a positioning mechanism such as an exposure machine. Moreover, LDD regions formed on both sides of the gate electrode
(Or offset areas) are made with approximately the same width. Depending on the conditions, it is possible to form these regions with a width much smaller than the alignment margin of the exposure machine, and in the above embodiment, the element size does not increase while having these structures.

As described above, when a thin film transistor having an LDD structure (or an offset structure) is introduced, the leakage current is reduced, but the ON capability may be reduced. When a thin film transistor for a pixel electrode and a thin film transistor for a peripheral driving circuit are formed on the same substrate, the performance of the peripheral driving circuit may be reduced if an LDD structure or an offset structure is used with emphasis on the performance of the thin film transistor for the pixel electrode. An embodiment as a solution to the problem of not being provided is described below.

FIG. 5 shows a liquid crystal display device in which a thin film transistor for a pixel electrode and a thin film transistor for a peripheral driving circuit are formed on the same substrate. (FIG. 5 (a)) is a schematic view of a liquid crystal display device (panel), wherein 1 is a light-transmitting substrate incorporating a thin film transistor, and 1 'is a light-transmitting substrate 1 (FIG. 5 (b)).
Reference numeral 8 denotes a display unit, 9 denotes a peripheral driving circuit unit, 50 denotes a counter substrate, and 51 denotes a terminal for connection to an external circuit. The liquid crystal is sandwiched between the translucent substrate 1 and the counter substrate 50, and a display is performed on the display unit 8. Translucent substrate 1
A large number of thin film transistors for pixel electrodes are arranged in a matrix in a portion corresponding to the display section 8. As can be seen from the large light-transmitting substrate 1 ', a large number of thin film transistors for the pixel electrodes of the display section 8 and thin film transistors for the peripheral drive circuit section 9 are arranged in a matrix.

Next, a method of manufacturing a thin film transistor according to a fifth embodiment of the present invention will be described. FIG. 6 shows both a thin film transistor forming region 61 for a peripheral driving circuit and a thin film transistor forming region 62 for a pixel electrode of a display portion, and is a process sectional view of a method for manufacturing a thin film transistor according to a fifth embodiment of the present invention. Hereinafter, the manufacturing method will be described step by step. The first part of the process is the same as in the first embodiment, and the same components are denoted by the same reference numerals and description thereof is omitted. First, the same steps are performed up to the middle step (FIG. 1 (b)) of the first embodiment.
A negative resist pattern 63 is formed as a protective film for etching on the thin film transistor forming region 61 for the peripheral drive circuit. And, as a positive photosensitive thin film, a positive resist
15 is applied so as to cover the upper part of each gate electrode 12, and ultraviolet light irradiation 16 is performed from the back side of the substrate to expose the positive resist 15 (FIG. 6 (a)).

Thereafter, when development is performed, a positive resist pattern 15 'having the shape of the gate electrode 12 is formed. Subsequently, when the gate electrode 12 is etched by wet etching or the like, the side surface of the gate electrode 12 in the pixel electrode thin film transistor forming region 62 is etched, and a gate electrode 12 'is completed (FIG. 6B). After that, the positive resist pattern 15 'and the negative resist pattern 63 are removed, and an insulating film (SiO ₂ film) 19 for interlayer insulation, a contact hole, and a metal wiring 20 are formed, thereby completing a polysilicon thin film transistor ( FIG. 6 (c)). In the case of this manufacturing method, FIG.
The L3 portion of the thin film transistor formed in the pixel electrode thin film transistor forming region 62 of (c)) becomes an offset region similar to that of the first embodiment. In the case of this embodiment, the thin film transistor for the pixel electrode has an offset structure with a small leak current, but the thin film transistor for the peripheral driving circuit has no offset region, and the ON capability is not impaired.

Next, the display device manufacturing method of the present invention
The case of application will be described. Figure 7 represents the both pixel electrode thin film transistor forming region 72 of the display unit thin film transistor forming region 71 for peripheral driving circuits, thin films of the present invention
It is obtained shows the cross-sectional views of application of a display device manufacturing method of the transistor. The main part of the process is the same as that of the first embodiment, and the same components are denoted by the same reference numerals and description thereof will be omitted. First, a non-translucent thin film pattern (in this case, a Cr thin film having a thickness of 100 nm) 73 is formed in a thin film transistor forming region 71 for a peripheral drive circuit on the surface of the translucent substrate 1.

Thereafter, an insulating film (SiO ₂ film) 74 for interlayer insulation is used.
(In this case, a SiO ₂ thin film having a thickness of 400 nm) is deposited. Next, after the step of forming an amorphous silicon layer (film thickness: about 100 nm) by the plasma CVD method performed in the first embodiment, the same steps as in the first embodiment are performed. In the process, a positive resist 15 as a positive type photosensitive thin film is applied so as to cover the upper part of each gate electrode 12, and ultraviolet light irradiation 16 is performed from the back side of the substrate to expose the positive resist 15 (FIG. 7). (a)). Thereafter, when development is performed, the positive resist pattern 15 ′ having the shape of the gate electrode 12 and the non-translucent thin film pattern are formed.
A positive resist pattern 15a having a 73 shape is produced.

Subsequently, when the gate electrode 12 is etched by wet etching or the like, the side surface of the gate electrode 12 in the pixel electrode thin film transistor forming region 72 is etched.
The gate electrode 12 'is completed (FIG. 7B). Then, after removing the positive resist patterns 15 'and 15a and forming an insulating film (SiO2 film) 19 for interlayer insulation, a contact hole, and a metal wiring 20, a polysilicon thin film transistor is completed (FIG. 7C). ). In the case of this manufacturing method, the L3 portion of the thin film transistor formed in the pixel electrode thin film transistor forming region 72 in FIG. 7C becomes an offset region similar to the first embodiment. In the case of this application example, since the display device has a configuration having the non-light-transmitting thin film pattern 73, the thin film transistor for the pixel electrode has an offset structure with a small leakage current, and the thin film transistor for the peripheral driving circuit has no offset region. The ON ability is not impaired.

Next, a display device as a second application example of the present invention will be described. Figure 8 represents the both pixel electrode thin film transistor forming region 82 of the display unit thin film transistor forming region 81 for peripheral driving circuits, thin films of the present invention transient
The method of manufacturing a static is obtained shows the cross-sectional views of application of the second display device. The main part of the process is the same as that of the first embodiment, and the same components are denoted by the same reference numerals and description thereof will be omitted. First, a non-light-transmitting thin film pattern 83 is formed on the rear surface of the light-transmitting substrate 1 in a thin film transistor forming region 81 for a peripheral drive circuit.

Thereafter, the same steps as in the first embodiment are performed. In the process, a positive resist 15 as a positive photosensitive thin film is applied so as to cover the upper part of each gate electrode 12, and ultraviolet light irradiation 16 is performed from the back side of the substrate to expose the positive resist 15 (FIG. 8). (a)). Thereafter, when development is performed, a positive resist pattern 15 'having a shape of the gate electrode 12 and a positive resist pattern 15a having a shape of the non-light-transmitting thin film pattern 83 are formed.
Is produced. Subsequently, when the gate electrode 12 is etched by wet etching or the like, the side surface of the gate electrode 12 in the pixel electrode thin film transistor forming region 82 is etched, and a gate electrode 12 'is completed (FIG. 8B).

Then, the positive resist patterns 15 ', 15a
Is removed and an insulating film (SiO2 film) 19 for interlayer insulation, a contact hole, and a metal wiring 20 are formed to complete a polysilicon thin film transistor (FIG. 8C). In the case of this manufacturing method, the L3 portion of the thin film transistor formed in the pixel electrode thin film transistor forming region 82 of FIG.
The offset area is the same as in the first embodiment. This second
In the case of the application example, since the display device has a configuration having the non-light-transmitting thin film pattern 83, the thin film transistor for the pixel electrode has an offset structure with a small leakage current, and the thin film transistor for the peripheral driving circuit has no offset region. The ON ability is not impaired.

Next, a display device as a third application example of the present invention will be described. Figure 9 represents both the thin film transistor forming region 91 and a display unit for a pixel electrode thin film transistor forming region 92 for peripheral driving circuits, thin films of the present invention transient
The method of manufacturing a static is obtained shows the cross-sectional views of application of the third display device. The main part of the process is the same as that of the first embodiment, and the same components are denoted by the same reference numerals and description thereof will be omitted.

In this case, the same steps as in the first embodiment are performed, but a backside exposure apparatus is used in the following steps among the steps. That is, a positive resist 15 is applied as a positive photosensitive thin film so as to cover the upper part of each gate electrode 12,
When performing the ultraviolet light irradiation 16 from the back side of the substrate, using the configuration of the apparatus as the light irradiation only to the pixel electrode for the thin film transistor forming region 92 of the display unit (in this application, the non-directly below the light transmitting substrate 1 A backside exposure apparatus having a mechanism capable of installing a photomask 94 having a translucent thin film pattern 93 was used.
Since the non-translucent thin film pattern 93 has a size that covers the peripheral drive circuit section 9 shown in FIG. 5 (FIG. 5), fine positioning such as in a normal exposure machine is unnecessary. ) (FIG. 9 (a)).

Thereafter, when development is performed, a positive resist pattern 15 'having the shape of the electrode 12 and a positive resist pattern 15a having the shape of the non-translucent thin film pattern 93 are formed. Subsequently, when the gate electrode 12 is etched by wet etching or the like, the side surface of the gate electrode 12 in the pixel electrode thin film transistor forming region 92 is etched, and a gate electrode 12 'is completed (FIG. 9B). After that, the positive resist patterns 15 ' and 15a are removed, and an insulating film for interlayer insulation (SiO2 film) is formed.
19, contact holes, and metal wiring 20 are formed to complete the polysilicon thin film transistor (FIG. 9).
(c)). Here, by using the backside exposure device, an offset region can be formed in the L3 portion of the thin film transistor formed in the pixel electrode thin film transistor forming region 92, as in the first embodiment.

The above-described first to fifth embodiments and the first application example
Although omitted in the description of (1) to ( 3) , in manufacturing these thin film transistors, the characteristics of the transistors are improved by exposing the substrate on which the transistors are formed to hydrogen plasma. In the drawing, the positive resist 15 is applied so as to cover the upper part of the gate electrode 12. However, a light-transmitting thin film material A is formed between the gate electrode 12 and the positive resist 15, and the light-transmitting thin film material A is once etched. After that, the same process may be performed. Further, another thin film material having the same shape may be on the gate electrode 12. In these embodiments and application examples , the ion shower doping method is described as an example of the doping method in the dopant introduction step. However, the same applies when the plasma doping method is used.

[0039]

As described above, by practicing the present invention, an LDD region (or an offset) can be formed around a gate electrode and in a self-aligned manner without using an exposure machine or the like using a photomask. Region) is formed. Moreover, LDs built on both sides of the gate electrode
The D region (or offset region) is formed with substantially the same width. For this reason, the width and balance of the LDD regions (or offset regions) on both sides do not vary from place to place as in the conventional example, and accordingly, the variation in transistor characteristics becomes very small.

The LDD region (or offset region) can be manufactured with a width (submicron is possible) much smaller than the alignment margin in the photomask process, and the LDD region (or offset region) does not have the conventional LDD structure (or offset structure). A thin film transistor having a structure in which leakage current is small while having substantially the same transistor size can be manufactured.

As described above, a display device using an LDD structure or an offset structure having a small leak current as a thin film transistor for a pixel electrode, and a conventional transistor having a high ON capability as a thin film transistor for a peripheral driving circuit. Can be easily supplied.

[Brief description of the drawings]

FIG. 1 is a structural sectional view showing each step of a method for manufacturing a thin film transistor according to a first embodiment of the present invention.

FIG. 2 is a structural cross-sectional view showing each step of a method for manufacturing a thin film transistor according to a second embodiment of the present invention.

FIG. 3 is a structural cross-sectional view showing each step of a method for manufacturing a thin film transistor according to a third embodiment of the present invention.

FIG. 4 is a structural cross-sectional view showing each step of a method for manufacturing a thin film transistor according to a fourth embodiment of the present invention.

FIG. 5 is an explanatory diagram of a liquid crystal display device and a substrate on which a thin film transistor for the liquid crystal display device is manufactured.

FIG. 6 is a structural sectional view showing each step of a method for manufacturing a thin film transistor according to a fifth embodiment of the present invention.

FIGS. 7A to 7C are cross-sectional views showing the steps of a method for manufacturing a thin film transistor, which are used to show the configuration of a display device as a first application example of the present invention.

FIG. 8 is a structural cross-sectional view showing each step of a method of manufacturing a thin film transistor used to show the structure of a display device as a second application example of the present invention.

FIG. 9 is a structural cross-sectional view showing each step of a method for manufacturing a thin film transistor, which is used to show the configuration of a display device as a third application example of the present invention.

FIG. 10 is a structural cross-sectional view showing each step of a conventional method of manufacturing a thin film transistor.

Continued on the front page (72) Inventor Mamoru Furuta 1006 Kadoma Kadoma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. References JP-A-4-171865 (JP, A) JP-A-3-10224 (JP, A) JP-A-4-331924 (JP, A) Japanese Utility Model Laid-Open No. 64-30535 (JP, U) (58) Field surveyed (Int.Cl. ⁷ , DB name) G02F 1/1368

Claims (10)

(57) [Claims] 1. A semiconductor thin film is formed on an upper part of a light-transmitting substrate, an insulating thin film is formed so as to cover an upper part thereof, and a non-light-transmitting conductive thin film is formed on a part of the semiconductor thin film part above the semiconductor thin film. Forming an electrode, and then forming a positive photosensitive thin film so as to cover above the electrode after the first dopant introducing step into the semiconductor thin film using the electrode as a doping mask, Irradiating light from the back side to expose the positive photosensitive thin film, and etching the side surface of the electrode using the positive photosensitive thin film patterned in the shape of the electrode as an etching mask. A method for manufacturing a thin film transistor. Wherein the electrode shape patterned positive photosensitive film a second of the semiconductor thin film using an electrode pattern produced by etching the side surface portion of the electrode as an etching mask as a doping mask 2. The method according to claim 1, further comprising a dopant introduction step. 3. A semiconductor thin film is formed on a light-transmitting substrate, an insulating thin film is formed so as to cover the semiconductor thin film, and a part of the semiconductor thin film portion is further formed thereon by a non-light-transmitting conductive thin film. Forming an electrode, and thereafter, exposing the positive photosensitive thin film by irradiating light from the back surface of the translucent substrate by forming a positive photosensitive thin film so as to cover above the electrode,
First the patterned positive photosensitive film where the positive photosensitive thin film heat treatment or by swelling treatment is deformed to a larger shape than the shape of the electrode to the shape of the electrode to the semiconductor thin film by using the doping mask A method for manufacturing a thin film transistor, comprising the step of introducing a dopant. 4. A method of manufacturing a thin film transistor according to claim 3, characterized in that the addition of the second dopant introduction step of using the electrode as a doping mask into the semi <br/> conductive thin film. 5. The method according to claim 1, wherein said electrode is used as a gate electrode. 6. The method of manufacturing a thin film transistor according to claim 2, wherein the amount of the introduced dopant is smaller in the second dopant introduction step than in the first dopant introduction step. 7. A method for producing a first dopant introduction step or the thin film transistor according to claim 1, 2, 3 or 4, wherein the second dopant introduction step characterized by using an ion shower doping or plasma doping . 8. The method of claim 1 or 3 The method for producing a thin film transistor, wherein the <br/> the polycrystalline silicon thin film used in the semiconductor layer. 9. The method for manufacturing a thin film transistor according to claim 8, wherein a polycrystalline silicon thin film which has been crystallized by a laser is used. 10. A display device having a thin film transistor for a peripheral drive circuit, wherein a positive photosensitive thin film patterned in the shape of an electrode is used as an etching mask or a doping mask. 4. The method for manufacturing a thin film transistor according to claim 1, further comprising a step of forming a protective film in a region where the thin film transistor is formed.