JPH08203713A - Manufacture of square with film chip resistor - Google Patents

Manufacture of square with film chip resistor

Info

Publication number
JPH08203713A
JPH08203713A JP7007408A JP740895A JPH08203713A JP H08203713 A JPH08203713 A JP H08203713A JP 7007408 A JP7007408 A JP 7007408A JP 740895 A JP740895 A JP 740895A JP H08203713 A JPH08203713 A JP H08203713A
Authority
JP
Japan
Prior art keywords
thin film
layer
resin
forming
surface electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7007408A
Other languages
Japanese (ja)
Other versions
JP3282424B2 (en
Inventor
Hiroyuki Yamada
博之 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP00740895A priority Critical patent/JP3282424B2/en
Publication of JPH08203713A publication Critical patent/JPH08203713A/en
Application granted granted Critical
Publication of JP3282424B2 publication Critical patent/JP3282424B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE: To provide a low cost and high reliability square thin film chip resistor which is generally used for an electronic circuit. CONSTITUTION: A pair of thin film top electrode layer 2 is formed on a main surface of a square-shaped 96% alumina board 1. A thin film resistor layer 4 is formed between thin film electrode layers so that it may be partially placed on the paired thin film top electrode layers 2, thereby forming a resin protective film layer 5 so that the thin film resistor layer 4 may be covered to a satisfactory extent while a conductor resin top electrode layer 6 is formed so that it may cover the thin film resistor layer 4 of the paired thin film top electrode layer 2 and be partially placed on both ends of the resin protective film layer 5. After the formation of the resin protective film layer 5, a pair of conductor resin rear surface electrode layer 3 are formed on the rear surface of the alumina board 1, thereby forming a pair of thin film end face electrode layers 7 on both ends of the 96% alumina board 1 so that it may be placed on the conductor resin top electrode layer 6 and the conductor resin rear surface electrode layer 3 respectively and forming an electrode plating layer 8 on the exposed electrode part.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、一般的に電子回路に用
いられる角形薄膜チップ抵抗器の製造方法に関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a rectangular thin film chip resistor generally used in electronic circuits.

【0002】[0002]

【従来の技術】近年、電子機器のダウンサイジング化に
伴い、その回路基板の実装密度を高めるため、搭載され
る電子部品に対する小形化への要求が高まっている。角
形チップ抵抗器に対しても小形化が進められるととも
に、高精度(抵抗値許容差、抵抗温度特性)かつ電流雑
音特性に優れた角形薄膜チップ抵抗器への要求が高まっ
ている。
2. Description of the Related Art In recent years, with the downsizing of electronic equipment, there is an increasing demand for miniaturization of electronic components to be mounted in order to increase the packaging density of the circuit board. Along with the miniaturization of the rectangular chip resistors, there is an increasing demand for rectangular thin film chip resistors with high accuracy (resistance tolerance, resistance temperature characteristics) and excellent current noise characteristics.

【0003】従来の角形薄膜チップ抵抗器の構造を図3
の断面図、その製造方法を図4の工程図に示す。
The structure of a conventional rectangular thin film chip resistor is shown in FIG.
4 is a sectional view and a manufacturing method thereof is shown in the process drawing of FIG.

【0004】図3において、従来の角形薄膜チップ抵抗
器は、方形の96%アルミナ基板11の表面上の端部に
形成したAuから成る一対の薄膜上面電極層12と、裏
面上の端部に形成した、同じくAuから成る一対の薄膜
裏面電極層13と、この一対の薄膜上面電極層12を覆
い、かつ薄膜上面電極層12間に形成したNi−Cr合
金から成る薄膜抵抗体層14と、この薄膜抵抗体層14
を完全に覆うエポキシ系樹脂保護膜層15と、一対の薄
膜上面電極層12上に露出した薄膜抵抗体層14を覆い
かつ樹脂保護膜層15の両端の一部に重なるように形成
した一対の導体樹脂上面電極層16と、導体樹脂上面電
極層16と薄膜裏面電極層13を接続するように96%
アルミナ基板11の両端部にそれぞれ形成した一対の薄
膜端面電極層17と、露出した電極部に形成したニッケ
ルおよびはんだによる電極めっき層18とから構成され
る。
Referring to FIG. 3, a conventional rectangular thin film chip resistor is composed of a pair of thin film upper surface electrode layers 12 made of Au formed at the end portions on the front surface of a square 96% alumina substrate 11 and at the end portions on the back surface. A pair of thin film back surface electrode layers 13 also formed of Au, and a thin film resistor layer 14 formed of a Ni—Cr alloy that covers the pair of thin film top surface electrode layers 12 and is formed between the thin film top surface electrode layers 12. This thin film resistor layer 14
A pair of epoxy resin protective film layers 15 that completely cover the resin protective film layer 15 and a pair of thin film resistor layers 14 that are exposed on the pair of thin film upper surface electrode layers 12 and that overlap a part of both ends of the resin protective film layer 15. The conductive resin upper surface electrode layer 16 and the conductive resin upper surface electrode layer 16 and the thin film rear surface electrode layer 13 are connected by 96%.
It is composed of a pair of thin film end face electrode layers 17 formed on both ends of the alumina substrate 11 and an electrode plating layer 18 formed on the exposed electrode portions by nickel and solder.

【0005】次に図4により従来の角形薄膜チップ抵抗
器の製造工程を説明する。まず、96%アルミナからな
る絶縁基板11を用意する。次に、96%アルミナ基板
11の表面および裏面にAuを主成分とする金属有機物
からなる電極ペーストをスクリーン印刷・乾燥した後、
金属有機物電極ペーストの有機成分だけを飛ばし、金属
成分だけをアルミナ基板11上に焼き付けるために、ベ
ルト式連続焼成炉によって焼成し、薄膜上面電極層12
及び薄膜裏面電極層13を形成する工程を行う。
Next, the manufacturing process of the conventional rectangular thin film chip resistor will be described with reference to FIG. First, the insulating substrate 11 made of 96% alumina is prepared. Next, after screen-printing and drying an electrode paste made of a metal organic compound containing Au as a main component on the front and back surfaces of the 96% alumina substrate 11,
In order to remove only the organic component of the metal organic electrode paste and burn only the metal component onto the alumina substrate 11, the thin film upper surface electrode layer 12 is fired in a belt-type continuous firing furnace.
And a step of forming the thin film rear surface electrode layer 13 is performed.

【0006】次に、絶縁基板11の表面上全体にNi−
Cr等の薄膜抵抗体層14を形成するスパッタ工程を行
い、前記薄膜抵抗体層を所定の抵抗パターン14aに形
成するフォトリソプロセス工程(レジスト塗布・乾燥、
露光、現像、エッチング、レジスト剥離)を行い、抵抗
パターン14aを安定な膜にするために、350〜40
0℃雰囲気での熱処理工程を行う。
Next, Ni- is formed on the entire surface of the insulating substrate 11.
A photolithography process step (resist application / drying, for performing a sputtering step for forming the thin film resistor layer 14 of Cr or the like, and forming the thin film resistor layer into a predetermined resistance pattern 14a
Exposure to light, development, etching, and resist stripping) to form a stable film for the resistance pattern 14a.
A heat treatment process in a 0 ° C. atmosphere is performed.

【0007】その後、抵抗パターンの抵抗値を所定の値
に修正するためにレーザートリミングにより、抵抗値修
正工程を行う。
After that, a laser resistance trimming process is performed by laser trimming to correct the resistance value of the resistance pattern to a predetermined value.

【0008】次に、抵抗値修正済み抵抗パターン14b
を保護するために、熱硬化性の樹脂による樹脂保護膜層
15の形成工程を行う。次に、薄膜上面電極層12上の
樹脂保護膜層15に覆われていない抵抗値修正済み抵抗
パターン14bを覆い、かつ樹脂保護膜層15の両端に
重なるように、熱硬化性の導電樹脂から成る導体樹脂上
面電極層16の形成工程を行う。
Next, the resistance value-corrected resistance pattern 14b
In order to protect the resin, a step of forming the resin protective film layer 15 with a thermosetting resin is performed. Next, a thermosetting conductive resin is used to cover the resistance-value-corrected resistance pattern 14b not covered with the resin protective film layer 15 on the thin film upper surface electrode layer 12 and to overlap both ends of the resin protective film layer 15. A step of forming the formed conductor resin upper surface electrode layer 16 is performed.

【0009】次に、絶縁基板11の端面にスパッタを用
い、薄膜端面電極層17を形成する端面電極形成工程を
行う。
Next, an end face electrode forming step of forming the thin film end face electrode layer 17 is performed by using sputtering on the end face of the insulating substrate 11.

【0010】最後に、はんだ付け時の信頼性の確保のた
め露出した電極部に電極めっき層18を形成する電極め
っき工程を行い、角形薄膜チップ抵抗器を形成してい
た。
Finally, an electrode plating step of forming an electrode plating layer 18 on the exposed electrode portion for ensuring reliability during soldering was performed to form a rectangular thin film chip resistor.

【0011】[0011]

【発明が解決しようとする課題】しかしながら、従来の
薄膜チップ抵抗器の製造方法では、裏面電極を形成後に
抵抗体形成を行うために、裏面電極材料が限定されてい
た。すなわち、抵抗体パターン形成のフォトリソプロセ
ス工程で行うエッチングで、エッチング液(強酸性)に
浸漬されるため、従来例のようにエッチング液に浸され
ない金系の薄膜電極を採用したり、あるいは銅、ニクロ
ム系の薄膜電極をスパッタ形成後フォトリソプロセスに
よりパターン形成することにより、裏面電極層を構成し
ていた。このため、金を使用する場合には設備コストは
高価ではないが材料コストが高くなり、銅、ニクロム系
を使用する場合には設備コストならびに工数が高くな
り、製造原価を低減することが難しいという課題があっ
た。
However, in the conventional method of manufacturing a thin film chip resistor, the back electrode material is limited because the resistor is formed after the back electrode is formed. That is, in the etching performed in the photolithography process step of forming the resistor pattern, since it is immersed in an etching solution (strongly acidic), a gold-based thin film electrode that is not immersed in the etching solution as in the conventional example is used, or copper, The back electrode layer was formed by patterning a nichrome thin film electrode by a photolithography process after forming by sputtering. Therefore, when gold is used, the equipment cost is not expensive, but the material cost is high, and when copper or nichrome is used, the equipment cost and man-hours are high, and it is difficult to reduce the manufacturing cost. There were challenges.

【0012】本発明は上記課題を解決するために、安価
な角形薄膜チップ抵抗器を提供することを目的とする。
In order to solve the above problems, it is an object of the present invention to provide an inexpensive rectangular thin film chip resistor.

【0013】[0013]

【課題を解決するための手段】前記目的を達成するため
に本発明の角形薄膜チップ抵抗器の製造方法は、方形の
絶縁基板の主面上に一対の薄膜上面電極層を形成する工
程と、前記一対の薄膜上面電極層それぞれに重なり、か
つ前記絶縁基板の主面上の前記薄膜上面電極層間に薄膜
抵抗体層を形成する工程と、前記薄膜抵抗体層を完全に
覆う樹脂保護膜層を形成する工程と、前記一対の薄膜上
面電極層を覆いかつ前記樹脂保護膜層の両端の一部に重
なる一対の導体樹脂上面電極層を形成する工程と、前記
絶縁基板の裏面上に一対の導体樹脂裏面電極層を形成す
る工程と、前記絶縁基板の両端部に前記導体樹脂上面電
極層および前記導体樹脂裏面電極層と接続するよう一対
の薄膜端面電極層を形成する工程と、露出した前記導体
樹脂上面電極層および前記導体樹脂裏面電極層および前
記薄膜端面電極層を覆うように電極めっき層を形成する
工程とを備え、前記導体樹脂裏面電極層は、前記薄膜抵
抗体層を形成した後に形成することを特徴とするもので
ある。
In order to achieve the above object, a method for manufacturing a rectangular thin film chip resistor according to the present invention comprises a step of forming a pair of thin film upper surface electrode layers on a main surface of a rectangular insulating substrate, A step of forming a thin film resistor layer on each of the pair of thin film upper surface electrode layers and between the thin film upper surface electrode layers on the main surface of the insulating substrate; and a resin protective film layer that completely covers the thin film resistor layer. A step of forming, a step of forming a pair of conductor resin upper surface electrode layers that cover the pair of thin film upper surface electrode layers and overlap a part of both ends of the resin protective film layer, and a pair of conductors on the back surface of the insulating substrate. A step of forming a resin back surface electrode layer, a step of forming a pair of thin film end surface electrode layers so as to be connected to the conductor resin top surface electrode layer and the conductor resin back surface electrode layer at both ends of the insulating substrate, and the exposed conductor Resin upper electrode layer And a step of forming an electrode plating layer so as to cover the conductor resin back surface electrode layer and the thin film end surface electrode layer, wherein the conductor resin back surface electrode layer is formed after forming the thin film resistor layer. It is what

【0014】[0014]

【作用】本発明によれば、抵抗体形成後に裏面電極を形
成するため、抵抗体パターン形成のフォトリソプロセス
工程で行うエッチング処理で、裏面電極がエッチング液
(強酸性)に浸漬されて浸されることがないことから、
裏面電極材料は限定されない。したがって、裏面電極を
従来からの、スクリーン印刷法により、通常使用されて
いる導体樹脂銀ペーストを使用して形成できるため、材
料コストおよび工数および設備コストを低減することが
できることとなり、安価な角形薄膜チップ抵抗器を実現
できる。
According to the present invention, since the back electrode is formed after the resistor is formed, the back electrode is dipped in the etching solution (strongly acidic) by the etching treatment performed in the photolithography process step of the resistor pattern formation. Because there is nothing
The back electrode material is not limited. Therefore, since the back electrode can be formed by the conventional screen printing method using the commonly used conductive resin silver paste, it is possible to reduce the material cost, the man-hour and the equipment cost, and the inexpensive rectangular thin film. A chip resistor can be realized.

【0015】[0015]

【実施例】以下、本発明の一実施例の角形薄膜チップ抵
抗器およびその製造方法について、図面を用いて説明す
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A prismatic thin film chip resistor and a method of manufacturing the same according to an embodiment of the present invention will be described below with reference to the drawings.

【0016】図1は本発明の一実施例の角形薄膜チップ
抵抗器の断面図で、図2はその製造方法を示す工程図で
ある。
FIG. 1 is a sectional view of a prismatic thin film chip resistor according to an embodiment of the present invention, and FIG. 2 is a process diagram showing a manufacturing method thereof.

【0017】まず、図1により製品の構造を説明する。
図1において、方形の96%アルミナ基板1の表面上に
形成したAuによる一対の薄膜上面電極層2と、裏面上
に形成した銀を導電成分とする厚膜導体樹脂による一対
の導体樹脂裏面電極層3と、この一対の薄膜上面電極層
2を覆い、かつ薄膜上面電極層2間に形成したNi−C
r合金による薄膜抵抗体層4と、この薄膜抵抗体層4を
完全に覆うエポキシ系樹脂保護膜層5と、一対の薄膜上
面電極層2上に露出した薄膜抵抗体層4を覆いかつ樹脂
保護膜層5の両端の一部に重なるように形成した一対の
導体樹脂上面電極層6と、導体樹脂上面電極層6と導体
樹脂裏面電極層3を接続するように96%アルミナ基板
1の両端部にそれぞれ形成した一対の薄膜端面電極層7
と、上記各電極層のうち、露出した電極層上に形成した
ニッケルおよびはんだによる電極めっき層8とから構成
される。
First, the structure of the product will be described with reference to FIG.
1, a pair of thin film upper surface electrode layers 2 made of Au formed on the surface of a square 96% alumina substrate 1 and a pair of conductor resin back surface electrodes made of a thick film conductive resin containing silver as a conductive component formed on the back surface. Ni-C formed between the layer 3 and the pair of thin film upper surface electrode layers 2 and between the thin film upper surface electrode layers 2.
The thin film resistor layer 4 made of an r alloy, the epoxy resin protective film layer 5 that completely covers the thin film resistor layer 4, and the thin film resistor layer 4 that is exposed on the pair of thin film upper surface electrode layers 2 and protects the resin. A pair of conductor resin upper surface electrode layers 6 formed so as to overlap a part of both ends of the film layer 5, and both end portions of the 96% alumina substrate 1 so as to connect the conductor resin upper surface electrode layer 6 and the conductor resin rear surface electrode layer 3 to each other. A pair of thin film end face electrode layers 7 respectively formed on the
And an electrode plating layer 8 of nickel and solder formed on the exposed electrode layer among the above electrode layers.

【0018】次に、図2により製造方法について説明す
る。まず、耐熱性及び絶縁性に優れた96%アルミナ基
板1を用意する工程Aを行う。次に、96%アルミナ基
板1の表面にAuを主成分とする金属有機物からなる電
極ペーストをスクリーン印刷・乾燥した後、有機成分を
飛ばして金属成分だけを96%アルミナ基板1上に焼き
付けるために、ベルト式連続焼成炉によって850℃の
温度で、ピーク時間6分、IN−OUT時間45分のプ
ロファイルによって焼成することにより、薄膜上面電極
層2を形成する工程Bを行う。
Next, the manufacturing method will be described with reference to FIG. First, step A of preparing a 96% alumina substrate 1 having excellent heat resistance and insulating properties is performed. Next, in order to screen-print and dry an electrode paste made of a metal organic material containing Au as a main component on the surface of the 96% alumina substrate 1, the organic component is removed and only the metal component is baked on the 96% alumina substrate 1. A step B of forming the thin film upper surface electrode layer 2 is performed by baking in a belt type continuous baking furnace at a temperature of 850 ° C. at a peak time of 6 minutes and an IN-OUT time of 45 minutes.

【0019】次に96%アルミナ基板1上にNi−Cr
の薄膜抵抗体層4を形成するスパッタ工程Cを経て、薄
膜抵抗体層4を所定の抵抗パターン4aに形成するフォ
トリソプロセス工程D(レジスト塗布・乾燥、露光、現
像、エッチング、レジスト剥離)を行い、抵抗パターン
4aを安定な膜にするために、350〜400℃の温度
雰囲気での熱処理工程Eを行う。
Next, Ni--Cr was formed on the 96% alumina substrate 1.
Photolithographic process step D (resist application / drying, exposure, development, etching, resist peeling) of forming the thin film resistor layer 4 into a predetermined resistance pattern 4a is performed through the sputtering step C of forming the thin film resistor layer 4 of FIG. In order to make the resistance pattern 4a a stable film, a heat treatment step E is performed in a temperature atmosphere of 350 to 400 ° C.

【0020】その後、抵抗パターン4aの抵抗値を所定
の値に修正するためにレーザートリミングによる抵抗値
修正工程Fを行う。
Thereafter, in order to correct the resistance value of the resistance pattern 4a to a predetermined value, a resistance value correction step F by laser trimming is performed.

【0021】次に、抵抗値修正済み抵抗パターン4bを
保護するために、樹脂ペーストをスクリーン印刷し、2
00℃・30分のプロファイルにて熱硬化して樹脂保護
膜層5を形成する工程Gを行う。
Next, in order to protect the resistance pattern 4b whose resistance value has been corrected, a resin paste is screen-printed and 2
A step G of forming the resin protective film layer 5 by thermosetting with a profile of 00 ° C. for 30 minutes is performed.

【0022】次に、樹脂保護膜層5に覆われていない、
薄膜上面電極層2上の抵抗値修正済みの抵抗パターン4
bを覆い、かつ樹脂保護膜層5の両端の一部に重なるよ
うに、銀を導電金属材料として含有する導電樹脂ペース
トをスクリーン印刷し、200℃・30分のプロファイ
ルにて熱硬化して導体樹脂上面電極層6を形成する工程
Hを行う。
Next, not covered with the resin protective film layer 5,
Resistor pattern 4 whose resistance value has been corrected on the thin film upper surface electrode layer 2
Conductive resin paste containing silver as a conductive metal material is screen-printed so as to cover b and overlap a part of both ends of the resin protective film layer 5, and is thermally cured at a profile of 200 ° C. for 30 minutes to form a conductor. Step H of forming the resin upper surface electrode layer 6 is performed.

【0023】次に、96%アルミナ基板の裏面の導体樹
脂上面電極層6と対向する位置に、銀を導電金属材料と
して含有する導電樹脂ペーストをスクリーン印刷し、2
00℃・30分のプロファイルにて熱硬化して導体樹脂
裏面電極層3を形成する工程Iを行う。このように、樹
脂保護膜層5を形成した後に、導体樹脂裏面電極層3を
形成することにより、薄膜抵抗体層4の導電樹脂ペース
ト等からの汚れや損傷を防ぐことができる。なお、本実
施例では、抵抗体形成後に、裏面電極として導体樹脂裏
面電極を形成するために、耐エッチング液性を問わない
ので、裏面電極材料が限定されず、したがって、従来か
らのスクリーン印刷法を用いて、従来から一般に使用さ
れている導体樹脂銀ペーストを使用できるため、材料コ
ストおよび設備コストおよび工数を低減することができ
る。
Next, a conductive resin paste containing silver as a conductive metal material is screen-printed on the back surface of the 96% alumina substrate at a position facing the conductive resin upper surface electrode layer 6, and 2
A step I of forming the conductor resin back surface electrode layer 3 by thermosetting with a profile of 00 ° C. for 30 minutes is performed. Thus, by forming the conductor resin back surface electrode layer 3 after forming the resin protective film layer 5, it is possible to prevent the thin film resistor layer 4 from being soiled or damaged by the conductive resin paste or the like. In the present embodiment, since the conductor resin back surface electrode is formed as the back surface electrode after the resistor is formed, the back surface electrode material is not limited because the resistance to etching liquid does not matter, and therefore the conventional screen printing method is used. Since the conductor resin silver paste that has been generally used can be used, the material cost, the equipment cost, and the man-hour can be reduced.

【0024】次に、96%アルミナ基板1の端面にスパ
ッタによりNi−Cr系の薄膜端面電極層7を形成する
端面電極形成工程Jを行う。
Next, an end face electrode forming step J for forming the Ni—Cr based thin film end face electrode layer 7 on the end face of the 96% alumina substrate 1 by sputtering is performed.

【0025】最後に、露出している導体樹脂裏面電極層
3と導体樹脂上面電極層6と薄膜端面電極層7のはんだ
付け時の電極食われの防止およびはんだ付け時の信頼性
の確保のため、電気めっきによってNiおよびSn−P
bからなる電極めっき層8を形成する電極めっき工程K
を行う。
Finally, in order to prevent electrode erosion during soldering of the exposed conductor resin rear surface electrode layer 3, conductor resin upper surface electrode layer 6 and thin film end surface electrode layer 7 and to secure reliability during soldering. , Ni and Sn-P by electroplating
Electrode plating step K for forming the electrode plating layer 8 of b
I do.

【0026】以上の工程により、本実施例による角形薄
膜チップ抵抗器を試作した。このような本実施例の角形
薄膜チップ抵抗器と、従来の角形薄膜チップ抵抗器とを
比較したところ、電極強度は同等であった。
Through the above steps, the rectangular thin film chip resistor according to the present embodiment was prototyped. When the rectangular thin film chip resistor of this example and the conventional rectangular thin film chip resistor were compared, the electrode strength was the same.

【0027】なお、本実施例では、導体樹脂電極層を銀
系の樹脂材料により形成したが、銀系の材料に規定され
るものではなく、銅、金等の電極材料として使用され得
るものはすべて同様の効果が得られることはいうまでも
ない。
In this embodiment, the conductor resin electrode layer is formed of a silver-based resin material. However, the conductive resin electrode layer is not limited to a silver-based material, and a material that can be used as an electrode material such as copper or gold is used. It goes without saying that the same effect can be obtained in all cases.

【0028】さらに本実施例では、導体樹脂裏面電極層
を導体樹脂上面電極層の後に形成したが、この工程順序
はどちらが先でもかまわない。
Further, in this embodiment, the conductor resin back surface electrode layer is formed after the conductor resin top surface electrode layer, but the order of this step may be either first.

【0029】[0029]

【発明の効果】以上のように本発明によれば、抵抗体形
成後に裏面電極を形成するために、裏面電極材料が限定
されない。したがって下記(1),(2)の効果が得ら
れ、安価に角形薄膜チップ抵抗器を実現できる。
As described above, according to the present invention, since the back electrode is formed after the resistor is formed, the back electrode material is not limited. Therefore, the following effects (1) and (2) can be obtained, and the prismatic thin film chip resistor can be realized at low cost.

【0030】(1)スクリーン印刷法により形成できる
ため、フォトリソ法(スパッタ、露光、現像、エッチン
グ)よりも設備コストおよび工数を低減できる。
(1) Since it can be formed by the screen printing method, the equipment cost and the number of steps can be reduced as compared with the photolithography method (sputtering, exposure, development, etching).

【0031】(2)通常大量に使用されている導体樹脂
銀ペーストを使用できるため、材料コストを低減でき
る。また、ペーストを印刷後200℃程度で硬化して裏
面電極層を形成するため、従来の高温焼成(850℃程
度)に比べ電力消費を低減できる。
(2) Since the conductor resin silver paste which is usually used in a large amount can be used, the material cost can be reduced. Moreover, since the back electrode layer is formed by curing the paste after printing at about 200 ° C., it is possible to reduce power consumption as compared with conventional high temperature firing (about 850 ° C.).

【0032】また、従来は薄膜で裏面電極を形成してい
たために、基板をたんざく状に一次分割する際に、分割
スリット付近の裏面電極にカケが発生していたが、裏面
電極を厚膜の導体樹脂電極層により形成することによ
り、一次分割時の分割治具との接触によるショック吸収
の機能を持たせることができ、裏面電極のカケを防止す
ることができ高信頼性を有する角形薄膜チップ抵抗器を
実現することができる。
In addition, since the back electrode is formed of a thin film in the past, when the substrate was first divided in a zigzag pattern, chipping occurred on the back electrode near the dividing slits. Since it is formed of the conductor resin electrode layer, it is possible to have a function of absorbing shock due to contact with the dividing jig at the time of the primary division, and it is possible to prevent chipping of the back surface electrode and to provide a highly reliable rectangular thin film. A chip resistor can be realized.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の角形薄膜チップ抵抗器の構
造を示す断面図
FIG. 1 is a sectional view showing the structure of a prismatic thin film chip resistor according to an embodiment of the present invention.

【図2】同角形薄膜チップ抵抗器の製造方法を示す工程
FIG. 2 is a process diagram showing a method for manufacturing a conformal thin film chip resistor.

【図3】従来の角形薄膜チップ抵抗器の構造を示す断面
FIG. 3 is a sectional view showing the structure of a conventional rectangular thin film chip resistor.

【図4】同角形薄膜チップ抵抗器の製造方法を示す工程
FIG. 4 is a process diagram showing a method for manufacturing a conformal thin film chip resistor.

【符号の説明】[Explanation of symbols]

1 96%アルミナ基板 2 薄膜上面電極層 3 導体樹脂裏面電極層 4 薄膜抵抗体層 5 樹脂保護膜層 6 導体樹脂上面電極層 7 薄膜端面電極層 8 電極めっき層 1 96% alumina substrate 2 thin film upper surface electrode layer 3 conductor resin rear surface electrode layer 4 thin film resistor layer 5 resin protective film layer 6 conductor resin upper surface electrode layer 7 thin film end surface electrode layer 8 electrode plating layer

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01C 17/242 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI Technical indication H01C 17/242

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 方形の絶縁基板の主面上に一対の薄膜上
面電極層を形成する工程と、前記一対の薄膜上面電極層
それぞれに重なり、かつ前記絶縁基板の主面上の前記薄
膜上面電極層間に薄膜抵抗体層を形成する工程と、前記
薄膜抵抗体層を完全に覆う樹脂保護膜層を形成する工程
と、前記一対の薄膜上面電極層を覆いかつ前記樹脂保護
膜層の両端の一部に重なる一対の導体樹脂上面電極層を
形成する工程と、絶縁基板の裏面上に一対の導体樹脂裏
面電極層を形成する工程と、前記絶縁基板の両端部に前
記導体樹脂上面電極層および前記導体樹脂裏面電極層と
接続するように一対の薄膜端面電極層を形成する工程
と、露出した前記導体樹脂上面電極層および前記導体樹
脂裏面電極層および前記薄膜端面電極層を覆うように電
極めっき層を形成する工程とを備え、前記導体樹脂裏面
電極層は、前記薄膜抵抗体層を形成した後に形成するこ
とを特徴とする角形薄膜チップ抵抗器の製造方法。
1. A step of forming a pair of thin film upper surface electrode layers on a main surface of a rectangular insulating substrate, and the thin film upper surface electrode overlapping each of the pair of thin film upper surface electrode layers and on the main surface of the insulating substrate. A step of forming a thin film resistor layer between the layers, a step of forming a resin protective film layer that completely covers the thin film resistor layer, and a step of covering the pair of thin film upper surface electrode layers and at both ends of the resin protective film layer. Forming a pair of conductor resin upper surface electrode layers overlapping the portion, a step of forming a pair of conductor resin back surface electrode layers on the back surface of the insulating substrate, the conductor resin upper surface electrode layer and the A step of forming a pair of thin film end face electrode layers so as to connect with the conductor resin back face electrode layer, and an electrode plating layer so as to cover the exposed conductor resin top face electrode layer, the conductor resin back face electrode layer and the thin film end face electrode layer To form And a step of forming the conductive resin back surface electrode layer after forming the thin film resistor layer.
【請求項2】 薄膜抵抗体層を覆う樹脂保護膜層を形成
した後に、導体樹脂裏面電極層を形成することを特徴と
する請求項1記載の角形薄膜チップ抵抗器の製造方法。
2. The method for manufacturing a rectangular thin film chip resistor according to claim 1, wherein the conductor resin back surface electrode layer is formed after the resin protective film layer covering the thin film resistor layer is formed.
JP00740895A 1995-01-20 1995-01-20 Method of manufacturing rectangular thin film chip resistor Expired - Lifetime JP3282424B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP00740895A JP3282424B2 (en) 1995-01-20 1995-01-20 Method of manufacturing rectangular thin film chip resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP00740895A JP3282424B2 (en) 1995-01-20 1995-01-20 Method of manufacturing rectangular thin film chip resistor

Publications (2)

Publication Number Publication Date
JPH08203713A true JPH08203713A (en) 1996-08-09
JP3282424B2 JP3282424B2 (en) 2002-05-13

Family

ID=11665051

Family Applications (1)

Application Number Title Priority Date Filing Date
JP00740895A Expired - Lifetime JP3282424B2 (en) 1995-01-20 1995-01-20 Method of manufacturing rectangular thin film chip resistor

Country Status (1)

Country Link
JP (1) JP3282424B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008109262A1 (en) * 2007-03-01 2008-09-12 Vishay Intertechnology, Inc. Sulfuration resistant chip resistor and method for making same
US9818512B2 (en) 2014-12-08 2017-11-14 Vishay Dale Electronics, Llc Thermally sprayed thin film resistor and method of making

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008109262A1 (en) * 2007-03-01 2008-09-12 Vishay Intertechnology, Inc. Sulfuration resistant chip resistor and method for making same
US7982582B2 (en) 2007-03-01 2011-07-19 Vishay Intertechnology Inc. Sulfuration resistant chip resistor and method for making same
US8514051B2 (en) 2007-03-01 2013-08-20 Vishay Intertechnology, Inc. Sulfuration resistant chip resistor and method for making same
US8957756B2 (en) 2007-03-01 2015-02-17 Vishay Intertechnology, Inc. Sulfuration resistant chip resistor and method for making same
US9818512B2 (en) 2014-12-08 2017-11-14 Vishay Dale Electronics, Llc Thermally sprayed thin film resistor and method of making

Also Published As

Publication number Publication date
JP3282424B2 (en) 2002-05-13

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