JP3092451B2 - Rectangular thin film chip resistor and method of manufacturing the same - Google Patents

Rectangular thin film chip resistor and method of manufacturing the same

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Publication number
JP3092451B2
JP3092451B2 JP06165209A JP16520994A JP3092451B2 JP 3092451 B2 JP3092451 B2 JP 3092451B2 JP 06165209 A JP06165209 A JP 06165209A JP 16520994 A JP16520994 A JP 16520994A JP 3092451 B2 JP3092451 B2 JP 3092451B2
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JP
Japan
Prior art keywords
layer
thin film
thin
film
pair
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP06165209A
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Japanese (ja)
Other versions
JPH0831603A (en
Inventor
博之 山田
章夫 福岡
清二 津田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は一般的に電子回路に用い
られる角形薄膜チップ抵抗器およびその製造方法に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a rectangular thin film chip resistor generally used in electronic circuits and a method of manufacturing the same.

【0002】[0002]

【従来の技術】近年、電子機器のダウンサイジング化に
伴い、その回路基板の実装密度を高めるため、搭載され
る電子部品に対する小形化への要求が高まっている。角
形チップ抵抗器に対しても小形化が進められるととも
に、高精度(抵抗値許容差、抵抗温度特性)かつ電流雑
音特性に優れた角形薄膜チップ抵抗器への要求が高まっ
ている。
2. Description of the Related Art In recent years, with the downsizing of electronic devices, there has been an increasing demand for smaller electronic components to be mounted in order to increase the mounting density of circuit boards. Along with the miniaturization of square chip resistors, the demand for square thin film chip resistors having high accuracy (resistance tolerance, resistance temperature characteristics) and excellent current noise characteristics is increasing.

【0003】従来例による角形薄膜チップ抵抗器の構造
を図3の断面図、およびその製造方法を図5の工程図に
示す。
FIG. 3 is a cross-sectional view showing the structure of a conventional rectangular thin-film chip resistor, and FIG.

【0004】図3により製品の構造を説明する。方形の
96%アルミナ基板11の表面上に形成したAuからな
る一対の薄膜上面電極層12と、裏面上に形成したAu
からなる一対の薄膜裏面電極層13と、この一対の薄膜
上面電極層12を覆い、かつ薄膜上面電極層12間に形
成したNi−Cr合金からなる薄膜抵抗体層14と、こ
の薄膜抵抗体層14を完全に覆うエポキシ系樹脂保護膜
層15と、露出した薄膜抵抗体層14と薄膜裏面電極層
13を接続するように96%アルミナ基板11の両側の
端面にそれぞれ形成したNi−Cr合金からなる一対の
薄膜端面電極層17と、露出した電極部に形成したニッ
ケルおよびはんだからなる電極めっき層18とから構成
される。
The structure of a product will be described with reference to FIG. A pair of thin film upper electrode layers 12 made of Au formed on the surface of a square 96% alumina substrate 11 and Au formed on the back surface
A thin-film resistor layer 14 made of Ni-Cr alloy, which covers the pair of thin-film upper electrode layers 12 and is formed between the thin-film upper-electrode layers 12; An epoxy-based resin protective film layer 15 completely covering 14 and a Ni-Cr alloy formed on both end surfaces of the 96% alumina substrate 11 so as to connect the exposed thin film resistor layer 14 and the thin film back electrode layer 13 to each other. And an electrode plating layer 18 made of nickel and solder formed on the exposed electrode portion.

【0005】次に図5により工程を説明する。まず、9
6%アルミナからなる絶縁基板11を用意する。次に、
96%アルミナ基板11の表面および裏面にAuを主成
分とする金属有機物からなる電極ペーストをスクリーン
印刷・乾燥した後、ベルト式連続焼成炉によって焼成し
金属有機物電極ペーストの有機成分だけを除去して金属
成分だけをアルミナ基板11上に焼き付けることにより
薄膜上面電極層12及び薄膜裏面電極層13を形成する
工程を行う。
Next, the steps will be described with reference to FIG. First, 9
An insulating substrate 11 made of 6% alumina is prepared. next,
An electrode paste composed of a metal organic material containing Au as a main component is screen-printed and dried on the front and back surfaces of the 96% alumina substrate 11, and then fired in a belt-type continuous firing furnace to remove only the organic components of the metal organic material electrode paste. A step of forming the thin film upper electrode layer 12 and the thin film rear electrode layer 13 by baking only the metal component on the alumina substrate 11 is performed.

【0006】次に、絶縁基板11の上面全体にNi−C
r等の薄膜抵抗体層14を形成するスパッタ工程を行
い、前記薄膜抵抗体層14を所定の抵抗パターン14a
に形成するフォトリソプロセス工程(レジスト塗布・乾
燥、露光、現像、エッチング、レジスト剥離)を行い、
抵抗パターン14aを安定な膜にするために、350〜
400℃雰囲気での熱処理工程を行う。その後、抵抗パ
ターンの抵抗値を所定の値に修正するためにレーザート
リミングにより、抵抗値修正工程を行う。
Next, Ni-C is applied to the entire upper surface of the insulating substrate 11.
The thin film resistor layer 14 is subjected to a sputtering process for forming a thin film resistor layer 14 such as a r.
Photolithography process (resist coating and drying, exposure, development, etching, resist stripping)
In order to make the resistance pattern 14a a stable film,
A heat treatment process is performed in a 400 ° C. atmosphere. Thereafter, a resistance value correcting step is performed by laser trimming to correct the resistance value of the resistance pattern to a predetermined value.

【0007】次に、抵抗値修正済み抵抗パターン14b
を保護するために、熱硬化性の樹脂による樹脂保護膜層
15の形成工程を行う。次に、絶縁基板11の端面にス
パッタを用い、薄膜端面電極層17を形成する端面電極
形成工程を行う。最後に、はんだ付け時の信頼性の確保
のため露出した電極部に電極めっき層18を形成する電
極めっき工程を行い、角形薄膜チップ抵抗器を形成して
いた。
[0007] Next, the resistance value corrected resistance pattern 14b
Is formed, a step of forming a resin protective film layer 15 of a thermosetting resin is performed. Next, an end face electrode forming step of forming the thin film end face electrode layer 17 is performed by using sputtering on the end face of the insulating substrate 11. Finally, an electrode plating step of forming an electrode plating layer 18 on the exposed electrode portion to ensure reliability at the time of soldering was performed to form a rectangular thin film chip resistor.

【0008】[0008]

【発明が解決しようとする課題】従来の薄膜チップ抵抗
器の構造では、樹脂保護膜層により薄膜抵抗体層を覆
い、露出した電極部に電極めっき層を形成しているが、
この樹脂保護膜層と電極めっき層の境界部分で、十分な
密着を形成していない場合、薄膜抵抗体層が外部からの
影響を受けやすくなる。十分な密着を有していても、電
子機器に実装された状態で実使用された場合の熱ストレ
スにより、境界部分に隙間が生じ、薄膜抵抗体層が外部
からの影響を受けやすくなる。外部からの影響、すなわ
ち水分とNaイオン、Clイオン、Kイオン、Caイオ
ン等が侵入し、電界が印加されると、薄膜抵抗体層の腐
食、いわゆる電解腐食が発生し、これにより抵抗値変化
を起こし、最悪では抵抗値オープン(断線)不良となる
という課題があった。
In the structure of the conventional thin film chip resistor, the thin film resistor layer is covered with a resin protective film layer, and an electrode plating layer is formed on the exposed electrode portion.
If sufficient adhesion is not formed at the boundary between the resin protective film layer and the electrode plating layer, the thin-film resistor layer is likely to be affected by the outside. Even if the thin film resistor layer has sufficient adhesion, a gap is formed at the boundary due to thermal stress when actually used in a state where the thin film resistor layer is mounted on an electronic device, and the thin film resistor layer is easily affected by the outside. When an influence from the outside, that is, moisture and Na ions, Cl ions, K ions, Ca ions, etc. penetrates and an electric field is applied, corrosion of the thin-film resistor layer, so-called electrolytic corrosion, occurs, thereby changing the resistance value. In the worst case, there is a problem that a resistance open (disconnection) failure occurs.

【0009】また、薄膜抵抗体層は樹脂保護膜層により
覆われているが、電極めっき層を形成する際に、露出し
た部分(樹脂保護膜層以外の部分)はめっき液に晒され
ることになり、当然ながら薄膜抵抗体層とつながる薄膜
上面電極層、特に樹脂保護膜層との境界部分からのめっ
き液の浸入の危険性を有していた。この場合も前述と同
様に抵抗値変化を発生する要因となっていた。
Although the thin-film resistor layer is covered with the resin protective film layer, the exposed portions (the portions other than the resin protective film layer) are exposed to the plating solution when forming the electrode plating layer. Naturally, there is a danger of the plating solution entering from the boundary between the thin film upper electrode layer connected to the thin film resistor layer, particularly the resin protective film layer. In this case as well, a change in resistance value occurs as described above.

【0010】本発明は上記課題を解決し、電気的特性・
耐湿性等の特性に優れた角形薄膜チップ抵抗器を提供す
ることを目的とする。
[0010] The present invention solves the above-mentioned problems, and provides electrical characteristics and
An object of the present invention is to provide a rectangular thin film chip resistor excellent in characteristics such as moisture resistance.

【0011】[0011]

【課題を解決するための手段】上記目的を達成するため
に本発明の角形薄膜チップ抵抗器は、方形の絶縁基板の
主面上に形成した一対の薄膜上面電極層と、この一対の
薄膜上面電極層それぞれに重なるように前記薄膜上面電
極層間に形成した薄膜抵抗体層と、この薄膜抵抗体層を
覆う樹脂保護膜層と、前記一対の薄膜上面電極層または
前記薄膜抵抗体層を覆いかつ前記樹脂保護膜層の両端の
一部に重なるように形成した一対の導体樹脂上面電極層
と、前記一対の導体樹脂上面電極層それぞれに重なるよ
うに絶縁基板の両端部にそれぞれ形成した一対の薄膜端
面電極層と、露出した前記導体樹脂上面電極層および薄
膜端面電極層に形成した電極めっき層とを有するもので
ある。
In order to achieve the above object, a rectangular thin-film chip resistor according to the present invention comprises a pair of thin-film upper electrode layers formed on a main surface of a rectangular insulating substrate, and a pair of thin-film upper electrode layers. A thin-film resistor layer formed between the thin-film upper electrode layers so as to overlap the respective electrode layers, a resin protective film layer covering the thin-film resistor layer, and covering the pair of thin-film upper electrode layers or the thin-film resistor layers; A pair of conductive resin upper surface electrode layers formed so as to partially overlap both ends of the resin protective film layer, and a pair of thin films respectively formed at both end portions of the insulating substrate so as to overlap the pair of conductive resin upper surface electrode layers, respectively; It has an end face electrode layer and an electrode plating layer formed on the exposed conductive resin top electrode layer and the thin film end face electrode layer.

【0012】[0012]

【作用】本発明によれば、薄膜抵抗体層を樹脂保護膜層
により覆い、さらに薄膜抵抗体層とつながる薄膜上面電
極層を前記樹脂保護膜層の両端の一部に重なるように導
体樹脂上面電極層を形成するため、薄膜抵抗体層がめっ
き工程でめっき液の影響を受けることがなくなる。さら
に樹脂保護膜層と導体樹脂上面電極層とは互いに樹脂材
料同士であることから、従来の保護膜層と電極めっき層
との密着性よりも優れ、よって外部からの影響を受けに
くくなり、電解腐食による抵抗値変化(断線を含む)の
起こりにくい角形薄膜チップ抵抗器を実現できる。
According to the present invention, the thin-film resistor layer is covered with the resin protective film layer, and the thin-film upper electrode layer connected to the thin-film resistor layer is overlapped with a part of both ends of the resin protective film layer. Since the electrode layer is formed, the thin film resistor layer is not affected by the plating solution in the plating step. In addition, since the resin protective film layer and the conductive resin upper electrode layer are made of a resin material, the adhesiveness between the conventional protective film layer and the electrode plating layer is superior to that of the conventional protective film layer. It is possible to realize a rectangular thin-film chip resistor in which a change in resistance value (including disconnection) due to corrosion hardly occurs.

【0013】[0013]

【実施例】以下、本発明の一実施例の角形薄膜チップ抵
抗器およびその製造方法について、図面を用いて説明す
る。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view showing a rectangular thin film chip resistor according to an embodiment of the present invention;

【0014】図1は本発明の一実施例の角形薄膜チップ
抵抗器の断面図で、図2はその製造方法を示す工程図で
ある。
FIG. 1 is a sectional view of a rectangular thin film chip resistor according to one embodiment of the present invention, and FIG. 2 is a process chart showing a method of manufacturing the same.

【0015】図1により製品の構造を説明する。方形の
96%アルミナ基板1の表面上に形成したAuによる一
対の薄膜上面電極層2と、裏面上に形成したAuからな
る一対の薄膜裏面電極層3と、この一対の薄膜上面電極
層2を覆い、かつ薄膜上面電極層2間に形成したNi−
Cr合金からなる薄膜抵抗体層4と、この薄膜抵抗体層
4を完全に覆うエポキシ系樹脂保護膜層5と、一対の薄
膜上面電極層2上に露出した薄膜抵抗体層4を覆いかつ
樹脂保護膜層5の両端の一部に重なるように形成した一
対の導体樹脂上面電極層6と、導体樹脂上面電極層6と
薄膜裏面電極層3を接続するように96%アルミナ基板
1の両側の端面にそれぞれ形成した一対の薄膜端面電極
層7と、露出した薄膜裏面電極層3、導体樹脂上面電極
層6、薄膜端面電極層7に形成したニッケルおよびはん
だからなる電極めっき層8とから構成される。
The structure of the product will be described with reference to FIG. A pair of thin-film upper electrode layers 2 of Au formed on the surface of a square 96% alumina substrate 1, a pair of thin-film rear electrode layers 3 of Au formed on the back surface, and a pair of thin-film upper electrode layers 2 Ni-covered and formed between the thin film top electrode layers 2
A thin film resistor layer 4 made of a Cr alloy, an epoxy resin protective film layer 5 completely covering the thin film resistor layer 4, and a resin covering the thin film resistor layer 4 exposed on the pair of thin film upper electrode layers 2; A pair of conductive resin upper electrode layers 6 formed so as to partially overlap both ends of the protective film layer 5, and a 96% alumina substrate 1 on both sides so as to connect the conductive resin upper electrode layer 6 and the thin film rear electrode layer 3. It comprises a pair of thin-film end face electrode layers 7 respectively formed on the end faces, an exposed thin-film back face electrode layer 3, a conductive resin top electrode layer 6, and an electrode plating layer 8 formed of nickel and solder formed on the thin-film end face electrode layer 7. You.

【0016】次に図2により製造方法について説明す
る。まず、耐熱性及び絶縁性に優れた96%アルミナ基
板1を準備する工程Aを行う。次に、96%アルミナ基
板1の表面および裏面にAuを主成分とする金属有機物
からなる電極ペーストをスクリーン印刷・乾燥した後、
金属有機物からなる電極ペーストの有機成分だけを飛ば
して金属成分だけを96%アルミナ基板1上に焼き付け
るために、850℃の温度のベルト式連続焼成炉で、ピ
ーク時間6分,IN−OUT時間45分のプロファイル
によって焼成し、薄膜上面電極層2及び薄膜裏面電極層
3を同時に形成する工程Bを行う。
Next, the manufacturing method will be described with reference to FIG. First, a step A of preparing a 96% alumina substrate 1 having excellent heat resistance and insulation properties is performed. Next, after an electrode paste composed of a metal organic material containing Au as a main component is screen-printed and dried on the front and back surfaces of the 96% alumina substrate 1,
In order to remove only the organic components of the electrode paste made of a metal organic material and bake only the metal components on the 96% alumina substrate 1, a belt-type continuous firing furnace at a temperature of 850 ° C. was used for a peak time of 6 minutes and an IN-OUT time of 45 minutes. A process B is performed in which the thin film top electrode layer 2 and the thin film back electrode layer 3 are simultaneously formed by baking according to a minute profile.

【0017】次に96%アルミナ基板1上にNi−Cr
の薄膜抵抗体層4を形成するスパッタ工程Cを経て、薄
膜抵抗体層4を所定の抵抗パターン4aに形成するフォ
トリソプロセス工程D(レジスト塗布・乾燥、露光、現
像、エッチング、レジスト剥離)を行い、その後、抵抗
パターン4aを安定な膜にするために、350〜400
℃の温度雰囲気での熱処理工程Eを行う。
Next, Ni-Cr is placed on a 96% alumina substrate 1.
And a photolithography process D (resist coating / drying, exposure, development, etching, resist peeling) for forming the thin film resistor layer 4 into a predetermined resistance pattern 4a through the sputtering process C for forming the thin film resistor layer 4 of FIG. Then, in order to make the resistance pattern 4a a stable film, 350 to 400
A heat treatment step E is performed in a temperature atmosphere of ° C.

【0018】その後、抵抗パターン4aの抵抗値を所定
の値に修正するためにレーザートリミングにより、抵抗
値修正工程Fを行う。
Thereafter, a resistance value correcting step F is performed by laser trimming to correct the resistance value of the resistance pattern 4a to a predetermined value.

【0019】次に、抵抗値修正済み抵抗パターン4bを
保護するために、樹脂ペーストをスクリーン印刷し、2
00℃・30分のプロフィールにて熱硬化して樹脂保護
膜層5を形成する工程Gを行う。
Next, a resin paste is screen-printed to protect the resistance-corrected resistance pattern 4b.
Step G of forming a resin protective film layer 5 by thermosetting with a profile of 00 ° C. for 30 minutes is performed.

【0020】次に、樹脂保護膜層5に覆われていない抵
抗値修正済み抵抗パターン4bを覆い、かつ樹脂保護膜
層5の両端の一部に重なるように、Agを導電金属材料
として含有する導電樹脂ペーストをスクリーン印刷し、
200℃・30分のプロフィールにて熱硬化して導体樹
脂上面電極層6を形成する工程Hを行う。
Next, Ag is contained as a conductive metal material so as to cover the resistance-corrected resistance pattern 4b which is not covered with the resin protective film layer 5 and to partially overlap both ends of the resin protective film layer 5. Screen printing of conductive resin paste,
Step H of forming the conductor resin upper surface electrode layer 6 by thermosetting with a profile of 200 ° C. for 30 minutes is performed.

【0021】ここで、樹脂保護膜層5と導体樹脂上面電
極層6とは個別に印刷・熱硬化して形成することが不可
欠である。すなわち、樹脂保護膜層5と導体樹脂上面電
極層6の各々の部位を印刷し仮乾燥状態で同時に熱硬化
させた場合(すなわち、熱硬化工程を1回のみとして製
造工数を低減させる場合)、いったん各々が熱により軟
化してから架橋反応による硬化を開始するために、絶縁
材料である樹脂保護膜層5と導電材料である導体樹脂上
面電極層6との間で相互拡散がおこり、樹脂保護膜層5
では絶縁抵抗の低下、導体樹脂上面電極層6では導体抵
抗の上昇により、所望の機能を果たせなくなる。
Here, it is indispensable that the resin protective film layer 5 and the conductive resin upper surface electrode layer 6 are formed by printing and thermosetting individually. That is, when the respective portions of the resin protective film layer 5 and the conductive resin upper surface electrode layer 6 are printed and thermally cured simultaneously in a temporarily dried state (that is, when the number of manufacturing steps is reduced by performing only one thermal curing step), Once each of them is softened by heat and then starts hardening by a crosslinking reaction, mutual diffusion occurs between the resin protective film layer 5 as an insulating material and the conductive resin upper surface electrode layer 6 as a conductive material, and the resin is protected. Membrane layer 5
In this case, the desired function cannot be achieved due to a decrease in insulation resistance and an increase in conductor resistance in the conductor resin upper electrode layer 6.

【0022】次に、96%アルミナ基板1の端面にスパ
ッタによりNi−Cr系の薄膜端面電極層7を形成する
端面電極形成工程Iを行う。
Next, an end face electrode forming step I of forming a Ni—Cr thin film end face electrode layer 7 on the end face of the 96% alumina substrate 1 by sputtering is performed.

【0023】最後にはんだ付け時の電極食われの防止お
よびはんだ付け時の信頼性の確保のため、露出している
薄膜裏面電極層3と導体樹脂上面電極層6と薄膜端面電
極層7に、電気めっきによってNiおよびSn−Pbの
めっき層8を形成する電極めっき工程Jを行う。
Finally, in order to prevent electrode erosion during soldering and to ensure reliability during soldering, the exposed thin film back electrode layer 3, conductive resin upper electrode layer 6, and thin film end electrode layer 7 are An electrode plating step J of forming a plating layer 8 of Ni and Sn-Pb by electroplating is performed.

【0024】以上の工程により、本発明の実施例による
角形薄膜チップ抵抗器を試作した。この本発明の角形薄
膜チップ抵抗器と、従来の角形薄膜チップ抵抗器とを耐
湿負荷寿命試験により比較したところ、図4に示す結果
が得られた。すなわち、従来の製品では1000時間で
抵抗値変化(0.5%以上)を起こすものが発生した
が、本発明による開発品では抵抗値変化はほぼ0%であ
った。
Through the above steps, a rectangular thin-film chip resistor according to an embodiment of the present invention was manufactured on a trial basis. When the rectangular thin film chip resistor of the present invention and a conventional rectangular thin film chip resistor were compared by a moisture resistance load life test, the results shown in FIG. 4 were obtained. That is, in the conventional product, a resistance value change (0.5% or more) occurred in 1000 hours, but in the developed product according to the present invention, the resistance value change was almost 0%.

【0025】なお、本実施例では薄膜抵抗体層はNi−
Cr,Cr−Si,Cr−Al等のCr系金属材料によ
り構成されているが、面積抵抗値を上昇させるために薄
膜抵抗体層の膜厚を薄くした場合には、極端に電解腐食
が発生しやすい材料であるために本実施例による構造お
よび製造方法により角形薄膜チップ抵抗器を形成するこ
とが、特に効果的である。
In this embodiment, the thin film resistor layer is made of Ni-
Although made of a Cr-based metal material such as Cr, Cr-Si, Cr-Al, etc., if the thickness of the thin-film resistor layer is reduced in order to increase the sheet resistance, extremely electrolytic corrosion occurs. It is particularly effective to form a rectangular thin-film chip resistor by the structure and manufacturing method according to the present embodiment because it is a material that is easy to perform.

【0026】また、導体樹脂上面電極層を銀系の樹脂材
料により形成したが、これは導電金属材料を規定するも
のではなく、銅、金等の電極材料として使用されるもの
はすべて同様の効果が得られることはいうまでもない。
Although the conductive resin upper electrode layer is formed of a silver-based resin material, this does not define a conductive metal material, and all materials used as electrode materials such as copper and gold have the same effect. Needless to say, this is obtained.

【0027】また本実施例では、薄膜上面電極層2は薄
膜抵抗体層4により覆われていたが、薄膜抵抗体層4が
薄膜上面電極層2の一部のみで重なる場合でも同様の効
果が得られる。
In this embodiment, the thin-film upper electrode layer 2 is covered with the thin-film resistor layer 4, but the same effect can be obtained even when the thin-film resistor layer 4 overlaps only a part of the thin-film upper electrode layer 2. can get.

【0028】また、薄膜裏面電極層3が無くても同様の
効果が得られる。
The same effect can be obtained without the thin film back electrode layer 3.

【0029】[0029]

【発明の効果】以上のように本発明によれば、薄膜抵抗
体層を樹脂保護膜層により覆い、さらに薄膜抵抗体層と
つながる薄膜上面電極層上に、前記樹脂保護膜層の両端
の一部に重なるように導体樹脂上面電極層を形成するた
め、薄膜抵抗体層がめっき工程でめっき液の影響を受け
なくなる。さらに保護膜層と導体樹脂上面電極層とが樹
脂材料同士であることから、保護膜層と電極めっき層と
の密着性よりも優れ、よって外部からの影響を受けにく
くなり、電解腐食による抵抗値変化(断線を含む)の起
こりにくい、高信頼性の角形薄膜チップ抵抗器を実現で
きる。
As described above, according to the present invention, the thin film resistor layer is covered with the resin protective film layer, and one end of the resin protective film layer is formed on the thin film upper electrode layer connected to the thin film resistor layer. Since the conductive resin upper electrode layer is formed so as to overlap the portion, the thin film resistor layer is not affected by the plating solution in the plating step. Furthermore, since the protective film layer and the conductive resin upper electrode layer are made of a resin material, the adhesiveness between the protective film layer and the electrode plating layer is superior, so that the protective film layer is less susceptible to external influences, and the resistance value due to electrolytic corrosion is reduced. It is possible to realize a highly reliable rectangular thin film chip resistor in which a change (including a disconnection) does not easily occur.

【0030】また、本発明によれば上記効果以外に下記
効果が得られる。 (1)小形の角形薄膜チップ抵抗器を形成する場合、導
体樹脂上面電極層を設けることにより、樹脂保護膜と上
面電極層との段差がなくなり、実装時の吸着面積が拡大
されるために実装性を向上することができる。 (2)薄膜抵抗体層には、Ni−Cr等のCr系金属が
存在するが、これらは酸化されやすいことから、窒素雰
囲気中での熱処理が必要なために、製造工程でのランニ
ングコストが高くなり、工程も煩雑となっていたが、薄
膜上面電極層よりも導体抵抗が低い導体樹脂上面電極層
を設けた場合、薄膜抵抗体層の熱処理を大気中で行って
表面に酸化膜が形成されても、めっきの付き回りが良好
であり、安価に角形薄膜チップ抵抗器を製造することが
できる。
According to the present invention, the following effects can be obtained in addition to the above effects. (1) In the case of forming a small rectangular thin film chip resistor, by providing the conductive resin upper electrode layer, there is no step between the resin protective film and the upper electrode layer, and the adsorption area at the time of mounting is increased, so mounting is performed. Performance can be improved. (2) Cr-based metals such as Ni-Cr are present in the thin-film resistor layer, but these are easily oxidized, so that a heat treatment in a nitrogen atmosphere is required. However, when a conductor resin upper electrode layer with a lower conductor resistance than the thin film upper electrode layer was provided, the thin film resistor layer was heat-treated in air to form an oxide film on the surface. Even so, it is possible to manufacture a rectangular thin-film chip resistor inexpensively because of good plating coverage.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例における角形薄膜チップ抵抗
器の構造を示す断面図
FIG. 1 is a sectional view showing a structure of a rectangular thin film chip resistor according to an embodiment of the present invention.

【図2】同実施例における角形薄膜チップ抵抗器の製造
方法を示す工程図
FIG. 2 is a process chart showing a method of manufacturing the rectangular thin film chip resistor in the embodiment.

【図3】従来の角形薄膜チップ抵抗器の製造を示す断面
FIG. 3 is a cross-sectional view showing the manufacture of a conventional rectangular thin film chip resistor.

【図4】同実施例および従来の角形薄膜チップ抵抗器の
抵抗値変化率を示す比較図
FIG. 4 is a comparative diagram showing a resistance value change rate of the same example and a conventional rectangular thin film chip resistor.

【図5】従来の角形薄膜チップ抵抗器の製造方法を示す
工程図
FIG. 5 is a process chart showing a method of manufacturing a conventional rectangular thin film chip resistor.

【符号の説明】[Explanation of symbols]

1 96%アルミナ基板 2 薄膜上面電極層 3 薄膜裏面電極層 4 薄膜抵抗体層 5 樹脂保護膜層 6 導体樹脂上面電極層 7 薄膜端面電極層 8 電極めっき層 1 96% alumina substrate 2 Thin film top electrode layer 3 Thin film back electrode layer 4 Thin film resistor layer 5 Resin protective film layer 6 Conductive resin top electrode layer 7 Thin film end face electrode layer 8 Electrode plating layer

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平6−45118(JP,A) 特開 平5−267025(JP,A) 特開 昭62−156801(JP,A) 特開 平7−169601(JP,A) 特開 平7−176402(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01C 7/00 H01C 17/00 - 17/30 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-6-45118 (JP, A) JP-A-5-267025 (JP, A) JP-A-62-156801 (JP, A) JP-A-7-57 169601 (JP, A) JP-A-7-176402 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01C 7/00 H01C 17/00-17/30

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 方形の絶縁基板の主面上に形成した一対
の薄膜上面電極層と、この一対の薄膜上面電極層それぞ
れに重なるように前記薄膜上面電極層間に形成した薄膜
抵抗体層と、この薄膜抵抗体層を覆う樹脂保護膜層と、
前記一対の薄膜上面電極層または前記薄膜抵抗体層を覆
いかつ前記樹脂保護膜層の両端の一部に重なるように形
成した一対の導体樹脂上面電極層と、前記一対の導体樹
脂上面電極層それぞれに重なるように絶縁基板の両端部
にそれぞれ形成した一対の薄膜端面電極層と、露出した
前記導体樹脂上面電極層および薄膜端面電極層に形成し
た電極めっき層とを有する角形薄膜チップ抵抗器。
A pair of thin film upper electrode layers formed on a main surface of a rectangular insulating substrate; a thin film resistor layer formed between the thin film upper electrode layers so as to overlap each of the pair of thin film upper electrode layers; A resin protective film layer covering the thin film resistor layer,
A pair of conductive resin upper surface electrode layers formed to cover the pair of thin film upper electrode layers or the thin film resistor layers and to partially overlap both ends of the resin protective film layer, and the pair of conductive resin upper electrode layers, respectively; A rectangular thin-film chip resistor comprising: a pair of thin-film end face electrode layers respectively formed on both ends of an insulating substrate so as to overlap with an insulating substrate; and an electrode plating layer formed on the exposed conductive resin top electrode layer and thin-film end face electrode layer.
【請求項2】 薄膜抵抗体層はCr系金属材料により構
成されることを特徴とする請求項1記載の角形薄膜チッ
プ抵抗器。
2. The rectangular thin-film chip resistor according to claim 1, wherein the thin-film resistor layer is made of a Cr-based metal material.
【請求項3】 方形の絶縁基板の主面上に一対の薄膜上
面電極層を形成する工程と、この一対の薄膜上面電極層
それぞれに重なるように前記薄膜上面電極層間に薄膜抵
抗体層を形成する工程と、この薄膜抵抗体層を覆うよう
に樹脂保護膜層を形成する工程と、前記一対の薄膜上面
電極層または前記薄膜抵抗体層を覆いかつ前記樹脂保護
膜層の両端の一部に重なるように一対の導体樹脂上面電
極層を形成する工程と、前記一対の導体樹脂上面電極層
それぞれに重なるように絶縁基板の両端部に一対の薄膜
端面電極層を形成する工程と、露出した前記導体樹脂上
面電極および薄膜端面電極層に電極めっき層を形成する
工程とを備えたことを特徴とする角形薄膜チップ抵抗器
の製造方法。
3. A step of forming a pair of thin film upper electrode layers on a main surface of a rectangular insulating substrate, and forming a thin film resistor layer between the thin film upper electrode layers so as to overlap each of the pair of thin film upper electrode layers. And a step of forming a resin protective film layer so as to cover the thin film resistor layer, and covering the pair of thin film upper electrode layers or the thin film resistor layer and forming a part of both ends of the resin protective film layer. Forming a pair of conductive resin upper surface electrode layers so as to overlap, forming a pair of thin film end surface electrode layers at both end portions of the insulating substrate so as to overlap the pair of conductive resin upper surface electrode layers, respectively, Forming an electrode plating layer on the conductive resin upper surface electrode and the thin film end surface electrode layer.
【請求項4】 樹脂保護膜層と導体樹脂上面電極層とを
個別に硬化して形成することを特徴とする請求項3記載
の角形薄膜チップ抵抗器の製造方法。
4. The method for manufacturing a rectangular thin film chip resistor according to claim 3, wherein the resin protective film layer and the conductive resin upper electrode layer are individually hardened and formed.
JP06165209A 1994-07-18 1994-07-18 Rectangular thin film chip resistor and method of manufacturing the same Expired - Lifetime JP3092451B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP06165209A JP3092451B2 (en) 1994-07-18 1994-07-18 Rectangular thin film chip resistor and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP06165209A JP3092451B2 (en) 1994-07-18 1994-07-18 Rectangular thin film chip resistor and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH0831603A JPH0831603A (en) 1996-02-02
JP3092451B2 true JP3092451B2 (en) 2000-09-25

Family

ID=15807922

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3092451B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3225191B2 (en) * 1996-03-13 2001-11-05 釜屋電機株式会社 Chip resistor
EP0810614B1 (en) * 1996-05-29 2002-09-04 Matsushita Electric Industrial Co., Ltd. A surface mountable resistor
US6727798B2 (en) 2002-09-03 2004-04-27 Vishay Intertechnology, Inc. Flip chip resistor and its manufacturing method
DE112020000734T5 (en) * 2019-02-07 2021-10-21 Rohm Co., Ltd. RESISTANCE

Also Published As

Publication number Publication date
JPH0831603A (en) 1996-02-02

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