JP4754710B2 - Chip resistor and manufacturing method thereof - Google Patents

Chip resistor and manufacturing method thereof Download PDF

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Publication number
JP4754710B2
JP4754710B2 JP2001111413A JP2001111413A JP4754710B2 JP 4754710 B2 JP4754710 B2 JP 4754710B2 JP 2001111413 A JP2001111413 A JP 2001111413A JP 2001111413 A JP2001111413 A JP 2001111413A JP 4754710 B2 JP4754710 B2 JP 4754710B2
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resistor
electrode
disposed
convex
chip resistor
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JP2002313602A (en
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順 木下
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Koa Corp
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Koa Corp
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Description

【0001】
【発明の属する技術分野】
本発明は、チップ抵抗器に係り、特に多数のチップ部品を収納したバルクカセットから該チップ部品の表裏を選択することなく回路基板に実装する、いわゆるバルク実装に好適なチップ抵抗器に関するものである。
【0002】
【従来の技術】
図4(a)は従来の厚膜チップ抵抗器の構造例を示す。従来のチップ抵抗器は、アルミナ等の絶縁性基板11の表面両端部に厚膜電極13,13を備え、この電極間に厚膜抵抗体15が配置されている。抵抗体15はガラス絶縁膜17’および樹脂絶縁膜からなる保護膜17により被覆され保護されている。絶縁性基板11の両端部である表面の電極13と裏面の電極19との間には端面電極16’,16’が形成されており、これらの電極表面にはめっき電極23,23が形成されている。
【0003】
この場合、基板中央部の保護膜17の部分の高さがめっき電極部23の高さよりも高くなる。絶縁性基板11の表面側のめっき電極23と保護膜17のそれぞれの表面の段差が30−50μm程度発生している場合が多い。
【0004】
ところで、従来のチップ抵抗器は、工場出荷の際にテープに1個ずつ、抵抗体が存在する面を表面として固定するいわゆるテーピングによる荷姿で出荷される場合が多い。そして、回路基板に実装する際には、そのままの状態で、即ち、抵抗体が存在する面(保護膜側)を表面として実装機(マウンタ)により回路基板に固定されていた。この場合には、図4(b)に示すように回路基板25のランド部27に絶縁性基板11の電極23,23の裏面側が密着し、はんだリフロー等による固定が行われる。
【0005】
しかしながら、実装方法にはバルクカセットに多数のチップ部品をランダムな状態で収容し、このチップ部品を一個ずつバルクカセットから取り出して回路基板に実装する、いわゆるバルク実装が存在する。係る実装方式によれば、チップ部品を回路基板に装着するに際して、チップ部品の表裏を選択することなく、チップ部品の面実装が行われる。
【0006】
従って、図4(a)に示す従来のチップ抵抗器をバルク実装機にてバルク実装した場合に、図4(c)に示すように、チップ抵抗器の表面側(保護膜側)が回路基板25に面するように裏向きに実装される場合が50%程度の確率で発生する。この時、チップ抵抗器が傾いて実装される可能性が強く、最悪の場合、片側のはんだ付けができない、または、図4(d)に示すように、チップ立等の現象が発生するという問題がある。従って、従来のチップ抵抗器は、いわゆるバルク実装には対応できないという問題がある。
【0007】
【発明が解決しようとする課題】
本発明は上述した事情に鑑みて為されたもので、実装に際してチップ部品の表裏を選択しない、いわゆるバルク実装に対応が可能なチップ抵抗器を提供することを目的とする。
【0008】
【課題を解決するための手段】
このような従来技術における問題点を解決するために、本発明の一態様は、絶縁性基板の表面両端部に配置された一対の凸状絶縁物層と、該凸状絶縁物層上に配置された一対の電極と、該電極に接続されて前記一対の凸状絶縁物層間に配置された抵抗体と、該抵抗体を被覆する前記一対の凸状絶縁物層間に配置された保護膜と、少なくとも前記一対の電極上に配置されためっき電極とを備え、前記凸状絶縁物層が印刷により形成され、前記めっき電極の表面の高さが前記保護膜の表面の高さよりも高いことを特徴とするチップ抵抗器である。
【0009】
前記絶縁性基板の裏面には裏面電極が配置され、側端面には端面電極が配置され、これらの電極上にめっき電極が配置されていることが好ましく、前記凸状絶縁物層は、高温で焼成されたガラス層であることが好ましい。
【0010】
また、本発明のチップ抵抗器の製造方法は、絶縁性基板の表面に一対の凸状絶縁物層を印刷により形成し、該凸状絶縁物層上に電極を配置し、該凸状絶縁物層間の凹部に抵抗体を前記電極と接続して配置し、前記抵抗体を被覆する保護膜を前記凸状絶縁物層間の凹部に形成し、めっきによりめっき電極を前記電極上に形成し、該めっき電極の表面高さが前記保護膜の表面高さよりも高くなるように形成することを特徴とするものである。
【0011】
上述した本発明のチップ抵抗器によれば、あらかじめ絶縁性基板表面に凸状絶縁物層を設けて電極部の嵩上げを行っておくことにより、めっき電極表面を保護膜表面の高さよりも高く形成し、保護膜表面においても実装時の隙間(スタンドオフ)を確保することができる。従って、バルク実装対応の実装機を用いて実装を行っても、100%の確率でチップ抵抗器の回路基板への実装が可能となる。
【0012】
【発明の実施の形態】
以下、本発明に係るチップ抵抗器の実施形態について図1乃至図3を参照して詳細に説明する。図1は、本発明の実施形態におけるチップ抵抗器の全体構成を示す図である。
【0013】
このチップ抵抗器は、アルミナ等の絶縁性基板11の表面に高温の焼成により形成されたガラス層からなる凸状絶縁物層31を備えている。ガラス層からなる凸状絶縁物層31の焼成温度は1000〜1300℃程度が好適である。ここで、凸状絶縁物層31は厚さ20−50μm程度に形成することが好ましい。
【0014】
凸状絶縁物層31,31上には電極13,13が配置され、電極13,13間に抵抗体15が配置されている。抵抗体15は酸化ルテニウム等の厚膜ペーストのスクリーン印刷によるパターン形成後に焼成することにより形成され、厚さ10−15μm程度に形成することが好ましい。従って、抵抗体15は一対の凸状絶縁物層31,31間の凹部に配置され、電極13,13に接続されている。
【0015】
抵抗体15はガラス絶縁膜17aおよび樹脂絶縁膜17bからなる2層の保護膜17により被覆され保護されている。ガラス絶縁膜17aおよび樹脂絶縁膜17bからなる保護膜17は一対の凸状絶縁物層31,31間の凹部に配置されている。ガラス絶縁膜17aは厚さ15−20μm程度に形成することが好ましく、樹脂絶縁膜17bは厚さ20μm程度に形成することが好ましい。
【0016】
絶縁性基板11の側端面にはニッケルクロム(Ni−Cr)のスパッタリングや銀(Ag)もしくは銀・パラジウム(Ag−Pd)の塗布等により形成された端面電極21が形成されている。基板表面側の電極13および裏面側の電極19、さらに基板側端面の端面電極21にはめっきにより形成されためっき電極23が被着されている。めっき電極23はニッケルめっき層23aおよびはんだまたはスズめっき層23bにより構成されている。ニッケルめっき層23aは厚さ3−10μm程度に形成することが好ましく、はんだまたはスズめっき層23bは厚さ5−15μm程度に形成することが好ましい。
【0017】
従って、めっき電極23,23の基板表面側は凸状絶縁物層31,31により嵩上げされ、その間の凹部に保護膜17が配置された構造が得られる。即ち、基板表面側において、めっき電極23の表面の高さが前記保護膜17の表面の高さよりも高くなっている。図2はこのチップ抵抗器を回路基板に実装した状態を示し、(a)はチップ抵抗器の表面(保護膜側)が上側に向いて実装され、(b)はチップ抵抗器の表面(保護膜側)が回路基板25のランド27に向いて(裏向きに)実装された状態をそれぞれ示している。
【0018】
上述した構造を持ったチップ抵抗器は、チップ抵抗器の保護膜17の表面より突出した電極23が形成されているため、図2(b)に示すようにチップ抵抗器が裏向きに実装されてもチップ抵抗器の傾きを抑えることができ、これにより確実に回路基板に実装される。このため、バルク実装機によるバルクカセットからの表裏面の選択性のない面実装を行い、チップ抵抗器の表面側(保護膜側)が回路基板25に面するように(裏向きに)実装されても、問題無くはんだ付けによる固定が可能である。
【0019】
次に、本発明のチップ抵抗器の製造方法について、図3を参照しながら説明する。
まず、(a)に示すように、アルミナ等の絶縁性基板11を準備する。図示の例では1個のチップ領域を示すが、実際には多数のチップ抵抗器を一括して製造する多数個取りの基板が用いられる。
【0020】
次に、(b)に示すように、絶縁性基板11の両端部に一対の凸状絶縁物層パターンをガラスペーストのスクリーン印刷にて形成し、焼成を行うことで、厚さ20−50μm程度の凸状絶縁物層31を形成する。この凸状絶縁物層31は、1000℃〜1300℃の高温で焼成して形成したガラス層であることが好ましい。この凸状絶縁物層31は、その上に形成される電極13,23を嵩上げするという点で重要な役割を果たしている。
【0021】
次に、(c)に示すように、凸状絶縁物層31上に電極13を形成する。この電極13はAg又はAg−Pdペーストパターンをスクリーン印刷により形成し、例えば850℃程度の温度で焼成することで形成する。この電極13は一対の凸状絶縁物層間に形成された凹部に回り込ませる様に形成する。裏面電極19も同様にAg又はAg−Pdペーストパターンをスクリーン印刷により配置し、焼成することで形成する。表面側の電極13と裏面側の電極19とは、どちらを先に形成してもよい。
【0022】
次に、(d)に示すように、電極13,13間に抵抗体15を抵抗体ペーストのスクリーン印刷および焼成にて形成する。抵抗体としては酸化ルテニウム等を用いることが好ましく、例えば850℃程度の温度で焼成する。抵抗体15は一対の凸状絶縁物層31,31間の凹部に形成し、その端部で電極13,13と接続する。抵抗体15には必要に応じてレーザートミリングを行い、抵抗値を調整する。
【0023】
次に、(e)に示すように、スクリーン印刷にて抵抗体パターン15上へ第1保護層パターンを形成して焼成する。第1保護層17aはガラス絶縁層であり、600℃程度の温度で焼成することが好ましい。次に、スクリーン印刷にてガラス絶縁層17a上へ樹脂ペーストの第2保護層パターンを形成して加温硬化し、第2保護層17bを形成する。第2保護層17bはエポキシ系樹脂であり、200℃程度の温度で加温硬化することが好ましい。第1保護層17aおよび第2保護層17bは一対の凸状絶縁物層31,31間に形成された凹部に配置する。
【0024】
以上の処理は多数個取りの基板の一括処理であるが、次に短冊状に分割する加工を行う。加工はダイシング、またはブレークのどちらでも良い。多数個取り基板を短冊状に分割後に、図3(f)に示すように、露出した基板側端面に端面電極21,21を形成する。端面電極21,21は例えばスパッタリングにより被着したNi・Crの薄膜層であったり、銀(Ag)もしくは銀・パラジウム(Ag−Pd)などの塗布であってもよい。そして、チップ単体に分割する加工を行う。加工はダイシング、ブレークどちらでも良い。次に、(g)に示すように、電解メッキを行い、電極13,19,21上にめっき電極23,23を形成する。電極くわれ防止およびはんだ付けの信頼性向上のために、電解めっきによってNiめっき層23aとSn−Pbめっき層(Snめっき層でもよい)23bとからなるめっき電極23を形成している。
【0025】
上述した製造工程によれば、絶縁性基板11の両端部の電極23の表面が凸状絶縁物層31により嵩上げされ、中央の保護膜17の表面部分に実装時の回路基板面に対して隙間(スタンドオフ)が生じる。係るチップ抵抗器の製造方法によれば、凸状絶縁物層31の工程を付加する以外は通常のチップ抵抗器の製造方法をそのまま採用することができる。従って、製造コストの上昇を抑制しつつ、実装面の表裏の選択性のないバルク実装に対応したチップ抵抗器を製造できる。
【0026】
なお、上記実施形態においては、絶縁性基板の表面および裏面に電極を設け、チップ抵抗器が表向きにも裏向きにも実装可能な例について説明したが、基板表面のみに電極を設け、裏向きにのみ実装するいわゆるフィレットレス実装にも適用が可能である。
【0027】
これまで本発明の一実施形態について説明したが、本発明は上述の実施形態に限定されず、その技術的思想の範囲内において種々異なる形態にて実施されてよいことは言うまでもない。
【0028】
【発明の効果】
上述したように、本発明によれば、チップ抵抗器の保護膜の表面よりも嵩上げされた電極が形成されていることにより、チップ抵抗器が裏向きに実装された場合でも確実に回路基板への面実装が可能となる。これにより、実装面の表裏の選択性のないバルク実装に好適なチップ抵抗器を提供することができる。
【図面の簡単な説明】
【図1】本発明の実施形態におけるチップ抵抗器の全体構成を示す断面図である。
【図2】上記チップ抵抗器の実装状態を示す図であり、(a)はチップ抵抗器の保護膜側が上側に向いて実装され、(b)は保護膜側が回路基板に向いて(裏向き)に実装された状態をそれぞれ示している。
【図3】上記チップ抵抗器の製造工程を示す図である。
【図4】従来のチップ抵抗器について、(a)は全体構成を示す断面図であり、(b)は保護膜側が表面側に向いて実装され、(c)は保護膜側が回路基板に向いて裏向きに実装され、(d)はいわゆるチップ立ちを起こした状態をそれぞれ示した図である。
【符号の説明】
11 絶縁性基板
13,19,21 電極
15 抵抗体
17a,17b,17 保護膜
23a,23b,23 めっき電極
31 凸状絶縁物層(ガラス層)
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a chip resistor, and more particularly to a chip resistor suitable for so-called bulk mounting that is mounted on a circuit board without selecting the front and back of the chip component from a bulk cassette containing a large number of chip components. .
[0002]
[Prior art]
FIG. 4A shows a structural example of a conventional thick film chip resistor. The conventional chip resistor includes thick film electrodes 13 and 13 at both ends of the surface of an insulating substrate 11 such as alumina, and a thick film resistor 15 is disposed between the electrodes. The resistor 15 is covered and protected by a glass insulating film 17 ′ and a protective film 17 made of a resin insulating film. End face electrodes 16 ′ and 16 ′ are formed between the front surface electrode 13 and the back surface electrode 19, which are both ends of the insulating substrate 11, and plated electrodes 23 and 23 are formed on these electrode surfaces. ing.
[0003]
In this case, the height of the protective film 17 at the center of the substrate is higher than the height of the plating electrode portion 23. In many cases, a step difference between the surface of the plating electrode 23 and the protective film 17 on the surface side of the insulating substrate 11 occurs about 30-50 μm.
[0004]
By the way, the conventional chip resistors are often shipped in the form of packing by so-called taping in which one surface of the resistor is fixed to the surface of the chip resistor as a surface at the time of factory shipment. When mounting on the circuit board, it is fixed to the circuit board as it is, that is, with the surface where the resistor exists (protective film side) as the surface, by a mounting machine (mounter). In this case, as shown in FIG. 4B, the back surfaces of the electrodes 23 and 23 of the insulating substrate 11 are brought into close contact with the land portion 27 of the circuit board 25, and fixing by solder reflow or the like is performed.
[0005]
However, as a mounting method, there is so-called bulk mounting in which a large number of chip components are randomly stored in a bulk cassette, and the chip components are taken out from the bulk cassette one by one and mounted on a circuit board. According to such a mounting method, when the chip component is mounted on the circuit board, the surface mounting of the chip component is performed without selecting the front and back of the chip component.
[0006]
Therefore, when the conventional chip resistor shown in FIG. 4A is bulk-mounted by a bulk mounting machine, the surface side (protective film side) of the chip resistor is a circuit board as shown in FIG. 4C. The case where it is mounted face down so as to face 25 occurs with a probability of about 50%. At this time, there is a strong possibility that the chip resistor is mounted in an inclined state, and in the worst case, soldering on one side cannot be performed, or a phenomenon such as chip standing occurs as shown in FIG. There is. Therefore, the conventional chip resistor has a problem that it cannot cope with so-called bulk mounting.
[0007]
[Problems to be solved by the invention]
The present invention has been made in view of the above-described circumstances, and an object of the present invention is to provide a chip resistor that can cope with so-called bulk mounting, in which the front and back of the chip components are not selected for mounting.
[0008]
[Means for Solving the Problems]
In order to solve such a problem in the prior art, one embodiment of the present invention includes a pair of convex insulator layers disposed on both ends of the surface of an insulating substrate, and a pair of convex insulator layers disposed on the convex insulator layer. A pair of electrodes, a resistor connected to the electrodes and disposed between the pair of convex insulator layers, and a protective film disposed between the pair of convex insulator layers covering the resistor, A plating electrode disposed on at least the pair of electrodes, the convex insulating layer is formed by printing, and the height of the surface of the plating electrode is higher than the height of the surface of the protective film. This is a featured chip resistor.
[0009]
It is preferable that a back electrode is disposed on the back surface of the insulating substrate, an end surface electrode is disposed on a side end surface, and a plating electrode is disposed on these electrodes, and the convex insulating layer is formed at a high temperature. A fired glass layer is preferred.
[0010]
Also, in the method for manufacturing a chip resistor of the present invention, a pair of convex insulator layers are formed on a surface of an insulating substrate by printing , electrodes are disposed on the convex insulator layers, and the convex insulators are formed. A resistor is connected to the electrode in the recess between the layers, a protective film covering the resistor is formed in the recess between the convex insulating layers, and a plating electrode is formed on the electrode by plating, The plating electrode is formed such that the surface height thereof is higher than the surface height of the protective film.
[0011]
According to the chip resistor of the present invention described above, the surface of the plating electrode is formed higher than the height of the protective film surface by providing a convex insulator layer on the surface of the insulating substrate in advance to raise the electrode portion. In addition, a gap (standoff) at the time of mounting can be secured also on the surface of the protective film. Therefore, even if mounting is performed using a mounting machine that supports bulk mounting, the chip resistor can be mounted on the circuit board with a probability of 100%.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of a chip resistor according to the present invention will be described in detail with reference to FIGS. 1 to 3. FIG. 1 is a diagram showing an overall configuration of a chip resistor according to an embodiment of the present invention.
[0013]
This chip resistor includes a convex insulator layer 31 made of a glass layer formed by baking at a high temperature on the surface of an insulating substrate 11 such as alumina. The firing temperature of the convex insulator layer 31 made of a glass layer is preferably about 1000 to 1300 ° C. Here, the convex insulator layer 31 is preferably formed to a thickness of about 20-50 μm.
[0014]
Electrodes 13 and 13 are disposed on the convex insulator layers 31 and 31, and a resistor 15 is disposed between the electrodes 13 and 13. The resistor 15 is formed by firing after pattern formation by screen printing of a thick film paste such as ruthenium oxide, and is preferably formed to a thickness of about 10-15 μm. Therefore, the resistor 15 is disposed in the recess between the pair of convex insulator layers 31 and 31 and is connected to the electrodes 13 and 13.
[0015]
The resistor 15 is covered and protected by a two-layer protective film 17 composed of a glass insulating film 17a and a resin insulating film 17b. The protective film 17 composed of the glass insulating film 17a and the resin insulating film 17b is disposed in a concave portion between the pair of convex insulating layers 31 and 31. The glass insulating film 17a is preferably formed to a thickness of about 15-20 μm, and the resin insulating film 17b is preferably formed to a thickness of about 20 μm.
[0016]
An end face electrode 21 formed by sputtering of nickel chromium (Ni—Cr), coating of silver (Ag) or silver / palladium (Ag—Pd) or the like is formed on the side end face of the insulating substrate 11. A plating electrode 23 formed by plating is attached to the electrode 13 on the substrate surface side, the electrode 19 on the back surface side, and the end surface electrode 21 on the substrate side end surface. The plating electrode 23 includes a nickel plating layer 23a and a solder or tin plating layer 23b. The nickel plating layer 23a is preferably formed to a thickness of about 3-10 μm, and the solder or tin plating layer 23b is preferably formed to a thickness of about 5-15 μm.
[0017]
Accordingly, the substrate surface side of the plating electrodes 23, 23 is raised by the convex insulator layers 31, 31, and a structure is obtained in which the protective film 17 is disposed in the concave portion therebetween. That is, the height of the surface of the plating electrode 23 is higher than the height of the surface of the protective film 17 on the substrate surface side. FIG. 2 shows a state in which this chip resistor is mounted on a circuit board, (a) is mounted with the surface of the chip resistor (protective film side) facing upward, and (b) is the surface of the chip resistor (protection) The state where the film side) is mounted toward the land 27 of the circuit board 25 (backward) is shown.
[0018]
In the chip resistor having the above-described structure, since the electrode 23 protruding from the surface of the protective film 17 of the chip resistor is formed, the chip resistor is mounted face down as shown in FIG. However, the inclination of the chip resistor can be suppressed, and this ensures mounting on the circuit board. For this reason, surface mounting without selecting the front and back surfaces from the bulk cassette by a bulk mounting machine is performed, and mounting is performed so that the front surface side (protective film side) of the chip resistor faces the circuit board 25 (backward). However, it can be fixed by soldering without any problem.
[0019]
Next, a manufacturing method of the chip resistor of the present invention will be described with reference to FIG.
First, as shown in (a), an insulating substrate 11 such as alumina is prepared. In the example shown in the figure, one chip region is shown, but in reality, a multi-chip substrate for manufacturing a large number of chip resistors at once is used.
[0020]
Next, as shown in (b), a pair of convex insulator layer patterns are formed on both ends of the insulating substrate 11 by screen printing of glass paste, and are fired, resulting in a thickness of about 20-50 μm. The convex insulator layer 31 is formed. The convex insulator layer 31 is preferably a glass layer formed by firing at a high temperature of 1000 ° C. to 1300 ° C. The convex insulator layer 31 plays an important role in raising the electrodes 13 and 23 formed thereon.
[0021]
Next, as shown in (c), the electrode 13 is formed on the convex insulator layer 31. The electrode 13 is formed by forming an Ag or Ag—Pd paste pattern by screen printing and firing at a temperature of about 850 ° C., for example. The electrode 13 is formed so as to go around a recess formed between a pair of convex insulator layers. Similarly, the back electrode 19 is formed by arranging and baking an Ag or Ag—Pd paste pattern by screen printing. Either the electrode 13 on the front surface side or the electrode 19 on the back surface side may be formed first.
[0022]
Next, as shown in (d), a resistor 15 is formed between the electrodes 13 and 13 by screen printing and baking of a resistor paste. As the resistor, ruthenium oxide or the like is preferably used. For example, the resistor is fired at a temperature of about 850 ° C. The resistor 15 is formed in a recess between the pair of convex insulator layers 31 and 31, and is connected to the electrodes 13 and 13 at the end. The resistor 15 is laser-milled as necessary to adjust the resistance value.
[0023]
Next, as shown in (e), a first protective layer pattern is formed on the resistor pattern 15 by screen printing and baked. The first protective layer 17a is a glass insulating layer and is preferably baked at a temperature of about 600 ° C. Next, a second protective layer pattern of a resin paste is formed on the glass insulating layer 17a by screen printing and heated and cured to form the second protective layer 17b. The second protective layer 17b is an epoxy resin, and is preferably heat-cured at a temperature of about 200 ° C. The first protective layer 17a and the second protective layer 17b are disposed in a recess formed between the pair of convex insulator layers 31 and 31.
[0024]
The above processing is a batch processing of a large number of substrates, and then a process of dividing into strips is performed. Processing may be either dicing or break. After the multi-piece substrate is divided into strips, end face electrodes 21 and 21 are formed on the exposed substrate side end faces as shown in FIG. The end face electrodes 21 and 21 may be Ni / Cr thin film layers deposited by sputtering, for example, or may be coated with silver (Ag) or silver / palladium (Ag—Pd). Then, a process of dividing into single chips is performed. Processing may be either dicing or break. Next, as shown in (g), electrolytic plating is performed to form plated electrodes 23 and 23 on the electrodes 13, 19 and 21. In order to prevent electrode cracking and improve the reliability of soldering, a plating electrode 23 composed of a Ni plating layer 23a and a Sn—Pb plating layer (or Sn plating layer) 23b is formed by electrolytic plating.
[0025]
According to the manufacturing process described above, the surfaces of the electrodes 23 at both ends of the insulating substrate 11 are raised by the convex insulator layer 31, and a gap is formed between the surface portion of the central protective film 17 and the circuit board surface at the time of mounting. (Standoff) occurs. According to such a method for manufacturing a chip resistor, a normal method for manufacturing a chip resistor can be employed as it is, except that the step of the convex insulator layer 31 is added. Therefore, it is possible to manufacture a chip resistor corresponding to bulk mounting without selectivity on the front and back of the mounting surface while suppressing an increase in manufacturing cost.
[0026]
In the above embodiment, an example has been described in which electrodes are provided on the front and back surfaces of an insulating substrate, and a chip resistor can be mounted both face up and face down. It can also be applied to the so-called filletless mounting that is mounted only on the.
[0027]
Although one embodiment of the present invention has been described so far, it is needless to say that the present invention is not limited to the above-described embodiment, and may be implemented in various forms within the scope of the technical idea.
[0028]
【The invention's effect】
As described above, according to the present invention, the electrode raised above the surface of the protective film of the chip resistor is formed, so that even when the chip resistor is mounted face down, it can be reliably transferred to the circuit board. Can be surface-mounted. Thereby, it is possible to provide a chip resistor suitable for bulk mounting with no selectivity on the front and back of the mounting surface.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an overall configuration of a chip resistor in an embodiment of the present invention.
FIGS. 2A and 2B are diagrams showing a mounting state of the chip resistor, where FIG. 2A is mounted with the protective film side of the chip resistor facing upward, and FIG. 2B is the protective film side facing the circuit board (facing back); ) Shows the mounted state.
FIG. 3 is a diagram showing a manufacturing process of the chip resistor.
4A is a cross-sectional view showing the overall configuration of a conventional chip resistor, FIG. 4B is mounted with the protective film side facing the surface side, and FIG. 4C is the protective film side facing the circuit board. (D) is a view showing a so-called chip standing state.
[Explanation of symbols]
11 Insulating substrate 13, 19, 21 Electrode 15 Resistors 17a, 17b, 17 Protective films 23a, 23b, 23 Plating electrode 31 Convex insulator layer (glass layer)

Claims (4)

絶縁性基板の表面両端部に配置された一対の凸状絶縁物層と、該凸状絶縁物層上に配置された一対の電極と、該電極に接続されて前記一対の凸状絶縁物層間に配置された抵抗体と、該抵抗体を被覆する前記一対の凸状絶縁物層間に配置された保護膜と、少なくとも前記一対の電極上に配置されためっき電極とを備え、
前記凸状絶縁物層が印刷により形成され、前記めっき電極の表面の高さが前記保護膜の表面の高さよりも高いことを特徴とするチップ抵抗器。
A pair of convex insulator layers disposed at both ends of the surface of the insulating substrate, a pair of electrodes disposed on the convex insulator layer, and the pair of convex insulator layers connected to the electrodes A resistor disposed on the resistor, a protective film disposed between the pair of convex insulator layers covering the resistor, and a plating electrode disposed on at least the pair of electrodes,
The chip resistor, wherein the convex insulating layer is formed by printing, and the height of the surface of the plating electrode is higher than the height of the surface of the protective film.
前記絶縁性基板の裏面には裏面電極が配置され、側端面には端面電極が配置され、これらの電極上にめっき電極が配置されていることを特徴とする請求項1記載のチップ抵抗器。  2. The chip resistor according to claim 1, wherein a back electrode is disposed on the back surface of the insulating substrate, an end surface electrode is disposed on a side end surface, and a plating electrode is disposed on these electrodes. 前記凸状絶縁物層は、高温で焼成されたガラス層であることを特徴とする請求項1記載のチップ抵抗器。  2. The chip resistor according to claim 1, wherein the convex insulator layer is a glass layer fired at a high temperature. 絶縁性基板の表面に一対の凸状絶縁物層を印刷により形成し、該凸状絶縁物層上に電極を配置し、該凸状絶縁物層間の凹部に抵抗体を前記電極と接続して配置し、前記抵抗体を被覆する保護膜を前記凸状絶縁物層間の凹部に形成し、めっきによりめっき電極を前記電極上に形成し、該めっき電極の表面高さが前記保護膜の表面高さよりも高くなるように形成することを特徴とするチップ抵抗器の製造方法。A pair of convex insulating layers are formed on the surface of the insulating substrate by printing , electrodes are disposed on the convex insulating layers, and a resistor is connected to the electrodes in the concave portions between the convex insulating layers. And a protective film covering the resistor is formed in a concave portion between the convex insulator layers, a plating electrode is formed on the electrode by plating, and a surface height of the plating electrode is set to a surface height of the protective film. A method of manufacturing a chip resistor, wherein the chip resistor is formed to be higher than the height.
JP2001111413A 2001-04-10 2001-04-10 Chip resistor and manufacturing method thereof Expired - Fee Related JP4754710B2 (en)

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