JP2002305126A - Chip resistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a chip resistor which can be surface mounted, on either the surface or the rear surface of a substrate. SOLUTION: A chip resistor is constituted in a structure with the resistor being provided with a substrate 11; a pair of upper surface electrode layers 13 and lower surface electrode layers 21; which are provided on both ends of the upper and lower surfaces of the substrate 11; a resistance layer 15, provided so as to electrically connect with the layers 13; a protective layer 17 provided so as to cover at least the layer 15; insulator layers 31 provided on the upper parts of the layers 13; upper surface conductor layers 33 provided on the tops of the layers 31; an end surface electrode layer 35 which is provided on the end part of the substrate 11 and is connected with the layers 13, the layers 33 and the layers 21; and a conductor plated layer 23 plated on the whole surface of the layers 33, the layer 35 and the layers 21. The total thickness of the layers 13, the layers 31, the layers 33 and the layer 23 is formed thicker than the total thickness of the layer 15 and the layer 17.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip resistor, and more particularly to a chip resistor suitable for so-called bulk mounting, in which a chip cassette is mounted on a circuit board from a bulk cassette containing a large number of chip components. is there.

[0002]

2. Description of the Related Art FIG. 5A shows an example of the structure of a conventional thick film chip resistor. The conventional chip resistor has a thick film upper electrode layer 13 on both ends of an insulating substrate 11 made of alumina or the like.
And the thick film resistance layer 15 is arranged between the electrodes. The resistance layer 15 is composed of the glass insulating film 17 and the resin protection layer 1.
9 covered and protected. The upper electrode layer 13 on the front surface and the lower electrode layer 2 on the rear surface which are both ends of the insulating substrate 11.
Conductor plating layers 23 are formed on the end surface electrode layers on the upper surface and side end surfaces of the substrate 1.

In this case, the height of the protective layer 19 at the center of the substrate is higher than the height of the electrode portion 23. In many cases, a level difference of about 10 to 50 μm occurs between the surfaces of the conductive plating layer 23 and the protective layer 19 on the front side of the insulating substrate 11.

[0004] By the way, conventional chip resistors are often shipped one by one on a tape at the time of shipment from a factory in a so-called taping form in which the surface on which the resistance layer is present is fixed as the surface. And when mounting on a circuit board,
It was fixed to the circuit board by a mounting machine (mounter) as it was, that is, with the surface on which the protective layer was present as the surface. In this case, as shown in FIG.
5 is formed on the land 27 of the conductor plate 2 of the insulating substrate 11.
The back surfaces of the substrates 3 and 23 are in close contact with each other, and are fixed by solder reflow or the like.

[0005] However, the mounting method involves a bulk mounting machine in which a large number of chip components are stored in a bulk cassette as they are, and the chip components are taken out of the bulk cassette one by one regardless of the front and back surfaces and mounted on a circuit board. There are bulk implementations. When the conventional chip resistor shown in FIG.
As shown in (c), the case where the chip resistor is mounted in the opposite direction so that the surface side (protective layer side) of the chip resistor faces the circuit board 25 occurs with a probability of about 50%. At this time, there is a strong possibility that the chip resistor is inclined and fixed by the solder 29, and in the worst case, a phenomenon such as chip standing occurs as shown in FIG. There is. Therefore, there is a problem that the conventional chip resistor cannot cope with so-called bulk mounting.

[0006]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a chip resistor which can be surface-mounted on any of the front and back surfaces. .

[0007]

In order to solve the problems in the prior art, one aspect of the present invention is to provide a substrate and a pair of upper surfaces provided at both ends of an upper surface and a lower surface of the substrate. An electrode layer, a lower electrode layer, a resistive layer provided to be electrically connected to the upper electrode layer, a protective layer provided so as to cover at least the resistive layer, and a protective layer provided on the upper electrode layer. The insulating layer provided, an upper conductor layer provided on the top of the insulator layer, and an end provided on the substrate, and connected to the upper electrode layer, the upper conductor layer, and the lower electrode layer. An end face electrode layer, the upper surface conductor layer, comprising a conductor plating layer applied to the entire surface of the end face electrode layer and the lower surface electrode layer, the total thickness of the upper surface electrode layer, the insulator layer, the upper surface conductor layer and the conductor plating layer is Larger than the total thickness of the resistance layer and the protective layer It is a chip resistor according to claim.

It is preferable that the protective layer provided so as to cover at least the resistance layer comprises a first protective layer made of an inorganic material and a second protective layer made of a resin. Further, the insulator layer covering an end of the first protective layer is disposed on the upper electrode layer, and the second protective layer is embedded between the insulator layers disposed at both ends of the substrate. It is preferable to arrange them.

In a method of manufacturing a chip resistor according to the present invention, a substrate is prepared, and a pair of upper electrode layers and a lower electrode layer are formed on both ends of an upper surface and a lower surface of the substrate, respectively. A resistive layer is formed so as to be electrically connected to the electrode layer, a protective layer covering at least the resistive layer, an insulator layer above the upper electrode layer, and an upper conductor layer on top of the insulator layer. And an end surface electrode layer connecting the upper surface electrode layer, the upper surface conductor layer, and the lower surface electrode layer is formed at an end portion of the substrate. The total thickness of the upper electrode layer, the insulator layer, the upper conductor layer and the conductor plating layer at both ends of the substrate is calculated from the total thickness of the resistance layer and the protection layer at the center of the substrate. Is also made larger.

According to the above-described chip resistor of the present invention,
Since both ends in the longitudinal direction of the substrate are formed higher than the height of the protective layer in the central portion, even when the chip resistor is mounted face down, the chip resistor is vertically or horizontally inclined, or the chip stands up (so-called). Machtan phenomenon) can be suppressed, and thereby the semiconductor device can be reliably mounted on a printed circuit board. That is, it is possible to provide a chip resistor that can be mounted on both front and rear surfaces of the chip resistor and that can support so-called bulk mounting.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a chip resistor according to the present invention will be described below in detail with reference to FIGS.

FIG. 1 is a diagram showing a configuration example near both ends of a chip resistor according to an embodiment of the present invention. Although the figure shows only one side, both ends of the substrate are formed symmetrically. For example, a substrate 11 made of 96% alumina
A pair of upper electrode layers 13 are provided on the left and right sides of
A pair of lower electrode layers 21 are also provided on the lower surface of the substrate on the left and right. Between the pair of upper electrode layers 13, 13, a resistance layer 15 is provided on the substrate so as to partially extend over the electrode layers. A protective layer 17 made of a glass layer is formed on the resistance layer 15 so as to cover at least the resistance layer.
And a protective layer 19 made of resin is further provided thereon. Here, the resistance layer 15 is formed by screen printing and baking of a thick film paste such as ruthenium oxide, and is preferably formed to a thickness of about 10 to 15 μm. The glass insulating film 17 is preferably formed with a thickness of about 15-20 μm, and the resin protective layer 19 is preferably formed with a thickness of about 20 μm.

An insulator layer 31 is disposed on the upper electrode layer 13, and an upper conductor layer 33 is disposed on top of the insulator layer 31. Here, the insulator layer 31 provided on the upper electrode layer 13 is, for example, an epoxy resin layer.
It is formed to a thickness of about −60 μm. The resin layer 31 can be formed by screen printing, offset printing, intaglio printing, or the like. Insulator layer 31
Is formed by heating and curing a silver paste, for example. The silver paste is a paste in which silver powder is kneaded in a resin. For example, the silver paste is hardened by holding it at a temperature of a hundred and several tens of degrees for a predetermined time, and exhibits high conductivity.

On the left and right end surfaces of the substrate 11, an end surface electrode layer 35 for connecting the upper surface conductor layer 33, the upper surface electrode layer 13, and the lower surface electrode layer 21 is provided. Furthermore, a conductor plating layer 23 is formed on the entire upper surface conductor layer 33, end surface electrode layer 35, and lower electrode layer 21. This plating layer 23
Is composed of two layers, an inner nickel plating layer 23a and an outer tin or solder plating layer 23b.
The nickel plating layer is preferably formed to a thickness of about 3-10 μm, and the solder or tin plating layer is preferably formed to a thickness of 5-1.
Preferably, it is formed to a thickness of about 5 μm.

As shown in the figure, the total thickness of the electrode layers at both ends of the chip is larger than the total thickness of the resistive layer and the protective layer at the center of the substrate. That is,
At both ends of the substrate, the total thickness is the total thickness of the upper electrode layer, the insulator layer, the upper conductor layer, and the conductor plating layer,
In particular, since the thickness of the insulator layer is large, the thickness is larger than the total thickness of the resistance layer and the protective layer substantially at the center of the substrate.

FIG. 2 shows a chip resistor according to another embodiment. The structure of this chip resistor is almost the same as that of the above embodiment, but the order of forming the insulating layer and the resin protective layer is different. That is, in the embodiment shown in FIG. 1, the insulating layer 31 is formed after forming the protective layer including the glass layer 17 and the resin layer 19. On the other hand, in the embodiment shown in FIG. 2, the insulating layer 31 is formed after the glass layer 17 is formed, and then the protective layer made of the resin layer 19 is formed. Therefore, the total thickness of the upper electrode layer 13, the insulator layer 31, the upper conductor layer 33, and the conductor plating layer 23 at both ends of the substrate is approximately equal to the resistance layer 1 substantially at the center of the substrate.
5 and the total thickness of the protective layer composed of the glass layer 17 and the resin layer 19. The structure of this electrode portion raised by the insulator layer 31 is the same as that of the embodiment shown in FIG.

FIGS. 3A and 3B show a state where the chip resistor is mounted on a circuit board. FIG. 3A shows a state where the substrate surface side of the chip resistor faces upward, and FIG. Each of the drawings shows a state in which the semiconductor device is mounted facing the substrate (in the opposite direction).

In the chip resistor having the above-described structure, since the electrode 23 protruding from the surface of the protection layer 19 of the chip resistor is formed, the chip resistor is turned upside down as shown in FIG. Even if the chip resistor is mounted, the inclination of the chip resistor can be suppressed, whereby the chip resistor can be reliably mounted on the circuit board. For this reason, the surface mounting is performed regardless of the front and back sides from the bulk cassette by the bulk mounting machine, and the chip resistor is mounted so that the substrate surface side (protective layer side) faces the circuit board (in the opposite direction). Fixing by soldering is possible without any problem. As shown in FIG. 3A, when the chip resistor is surface-mounted on the circuit board with the substrate surface side facing upward, no problem occurs as in the prior art.

Next, a method of manufacturing a chip resistor according to the present invention will be described with reference to FIG. First, as shown in (a), an insulating substrate 11 of alumina or the like is prepared.
Although one chip area is shown in the illustrated example, a multi-chip substrate for manufacturing a large number of chip resistors at once is used.

Next, as shown in FIG.
A pair of upper electrodes 13 and a pair of lower electrodes 21 are formed on both ends of the upper electrode 1. The upper electrode 13 is made of Ag or Ag-P
The d paste pattern is formed by screen printing, and is formed by firing at a temperature of about 850 ° C., for example. Similarly, the lower electrode layer 21 on the back surface side is formed by forming an Ag or Ag-Pd paste pattern by screen printing and baking the same. Either the upper surface electrode layer 13 on the front side or the lower surface electrode layer 21 on the back side may be formed first.

Next, as shown in FIG.
The resistive layer 15 is formed between 3 and 13 by screen printing and firing. As the resistance layer, it is preferable to use ruthenium oxide or the like. Laser resistance is applied to the resistance layer 15 as necessary to adjust the resistance value.

Next, as shown in FIG. 2D, a first protective layer pattern is formed on the resistive layer pattern 15 by screen printing of a glass paste, followed by firing. The first protective layer 17 is a glass layer and is preferably fired at a temperature of about 600 ° C. Next, the second protective layer 19 is formed by screen printing and heat curing of the resin paste. Second protective layer 1
Reference numeral 9 denotes an epoxy resin or the like, which is preferably cured by heating at a temperature of about 200 ° C.

Next, as shown in FIG.
An insulator layer 31 is formed on top of 3 so as to be adjacent to the protective layers 17 and 19. The insulating layer 31 is, for example, an epoxy resin. The resin paste pattern is formed by screen printing and then heated and cured to have a thickness of 30 to 60 μm.
Formed to the extent. Next, as shown in (f), the upper surface conductor layer 33 is formed on the top of the insulator layer 31. The upper surface conductor layer 33 is formed, for example, by applying a resin silver paste by screen printing or the like and then heating and curing the paste.

The above process is a batch process of a multi-piece substrate, and then a process of dividing into strips is performed. The processing may be either dicing or break. next,
As shown in (g), end face electrode layers 35 are formed on the side end faces of both ends of the substrate 11. The end face electrode layer is, for example, a Ni / Cr thin film layer formed by sputtering. And
Processing to divide into single chips is performed. Processing is dicing,
Either break is acceptable. Next, as shown in (h),
Conductive plating layers 23 are formed by electrolytic plating.
To prevent electrode cracking and improve the reliability of soldering, Ni plating layer 23a and Sn-P
A two-layer conductor plating layer 23 composed of a b plating layer (or a Sn plating layer) 23b is formed.

Thus, the structure of the chip resistor shown in FIG. 1 is obtained, and the electrodes at both ends of the insulating substrate are connected to the insulating layer 31.
As a result, a stand-off occurs in the central protective layer 19. That is, the electrode portions at both ends of the substrate are higher than the protective film layer at the central portion of the substrate, and a chip resistor suitable for bulk mounting that can be mounted on both the front and back surfaces by soldering is completed.

In the above embodiment, the protective layer 17,
Although the example in which the insulating layer 31 is formed after the formation of the insulating layer 19 has been described, the insulating layer 31 may be formed after the formation of the glass protective layer 17 and then the resin protective layer 19 may be formed. Thus, the structure of the chip resistor shown in FIG. 2 is obtained. According to such a structure, the edge of the insulator layer 31 is sandwiched between the protective layers 17 and 19, so that the conformity between the insulator layer and the protective layer becomes better.

In the above embodiment, an example has been described in which electrodes are provided on the front and back surfaces of the insulating substrate, and the chip resistor can be mounted face up or reverse. It is also applicable to so-called filletless mounting in which mounting is performed in the opposite direction. That is, by providing the insulator layers 31 at both ends of the substrate in advance and raising the height, the conductive plating layer can be formed higher than the height of the protective layer, and the stand-off can be secured on the protective layer surface.

Although one embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiment, and it goes without saying that the present invention may be embodied in various forms within the scope of the technical idea.

[0029]

As described above, according to the present invention, the electrodes which are raised from the surface of the protective layer substantially at the center of the substrate of the chip resistor are formed at both ends of the substrate. Even when mounted face down, soldering to the printed circuit board can be reliably performed. This makes it possible to provide a chip resistor suitable for bulk mounting in which the mounting surface is applied to both the front and back surfaces.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a configuration example near both ends of a substrate of a chip resistor according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a configuration example near both ends of a substrate of a chip resistor according to another embodiment of the present invention.

FIG. 3 is a view showing a mounting state of the chip resistor;
3A shows a state where the chip resistor is mounted with the protective layer side facing upward, and FIG. 3B shows a state where the chip resistor is mounted face down with the protective layer side facing the circuit board.

FIG. 4 is a diagram showing a manufacturing process of the chip resistor.

5A is a cross-sectional view showing the overall configuration of a conventional chip resistor, FIG. 5B is mounted with the protective layer side facing the front side, and FIG. 5C is mounted with the protective layer side facing the circuit board. (D) is a diagram showing a state in which a so-called chip standing is caused.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Insulating substrate 13, 21 Electrode layer 15 Resistance layer 17, 19 Protective layer 23 Conductor plating layer 31 Insulator layer 33 Upper surface conductor layer 35 End electrode layer

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E001 AB03 AC09 AE00 AE02 AE03 AH08 AH09 AJ01 AJ02 5E082 AB03 BC38 FG26 FG54 MM24 PP06 PP08

Claims (5)

[Claims] A substrate, and a pair of upper and lower electrode layers provided at both ends of an upper surface and a lower surface of the substrate;
A resistance layer provided to be electrically connected to the upper electrode layer, a protective layer provided to cover at least the resistance layer, an insulator layer provided on the upper electrode layer, An upper surface conductor layer provided on a top portion of an insulator layer; an end surface electrode layer provided on an end of the substrate and connected to the upper surface electrode layer, the upper surface conductor layer, and the lower surface electrode layer; And a conductor plating layer applied to the entire surface of the end face electrode layer and the lower electrode layer, and the total thickness of the upper electrode layer, the insulator layer, the upper conductor layer and the conductor plating layer is equal to the resistance layer and the protective layer. A chip resistor characterized by being larger than the total thickness. 2. The method according to claim 1, wherein the protection layer provided so as to cover at least the resistance layer comprises a first protection layer made of an inorganic material and a second protection layer made of a resin. Chip resistor. 3. The insulating layer covering an end of the first protective layer is disposed on the upper electrode layer, and the second protective layer is disposed between the insulating layers disposed at both ends of the substrate. 3. The chip resistor according to claim 2, wherein the chip resistor is arranged to be embedded. 4. The chip resistor according to claim 1, wherein the upper conductor layer provided on the top of said insulator layer is formed by applying a conductive material paste, drying and fixing. 5. A substrate is prepared, and a pair of upper electrode layers and a lower electrode layer are formed at both ends of the upper and lower surfaces of the substrate, respectively, and a resistor is provided so as to be electrically connected to the pair of upper electrode layers. A protective layer that forms a layer and covers at least the resistance layer;
An insulator layer is formed on the upper electrode layer, and an upper conductor layer is formed on the top of the insulator layer, and the upper electrode layer, the upper conductor layer, and the lower electrode layer are formed at an end of the substrate. Forming an end face electrode layer to be connected, further comprising the upper surface conductor layer,
A conductor plating layer is formed on the entire surface of the end face electrode layer and the lower electrode layer, and the total thickness of the upper electrode layer, the insulator layer, the upper conductor layer and the conductor plating layer at both ends of the substrate is reduced to the central portion of the substrate. A method for manufacturing a chip resistor, wherein the total thickness is greater than the total thickness of a resistance layer and a protective layer.