JPH08162424A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH08162424A
JPH08162424A JP30382194A JP30382194A JPH08162424A JP H08162424 A JPH08162424 A JP H08162424A JP 30382194 A JP30382194 A JP 30382194A JP 30382194 A JP30382194 A JP 30382194A JP H08162424 A JPH08162424 A JP H08162424A
Authority
JP
Japan
Prior art keywords
photoresist
impurity
impurity concentration
ion
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP30382194A
Other languages
Japanese (ja)
Inventor
Yosuke Ooka
洋介 大岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JFE Steel Corp
Original Assignee
Kawasaki Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kawasaki Steel Corp filed Critical Kawasaki Steel Corp
Priority to JP30382194A priority Critical patent/JPH08162424A/en
Publication of JPH08162424A publication Critical patent/JPH08162424A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE: To provide a manufacturing method capable of manufacturing a semiconductor device in which a plurality of impurity diffusion regions different in impurity concentration are formed, by using a small number of processes as compared with the conventional method. CONSTITUTION: Photoresist is not left on a high impurity concentration ion implanted region 34 turning to a region whose impurity concentration is the highest out of N-wells. On the middle impurity concentration ion implantated region 36 whose impurity concentration is the second highest, the photoresist is patterned in the manner in which the pattern width W is 1μm, the height H is 1μm, and the pattern interval L1 is 2μm. On the lowest impurity concentration ion implanted region 38, the photoresist is patterned in the manner in which the pattern width W is 0.5μm, the height H is 1μm, and the pattern interval L2 is 1μm. While an Si substrate 30 is rotated, oblique ion implantation of P<+> is so performed that an angle 45 deg. is kept to the surface of the Si substrate 30.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、互いに異なる不純物濃
度になるように同種類の不純物が拡散された複数の不純
物拡散領域が形成されてなる半導体装置の製造方法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device in which a plurality of impurity diffusion regions are formed in which impurities of the same kind are diffused so as to have different impurity concentrations.

【0002】[0002]

【従来の技術】半導体装置を製造するに当たっては、通
常、例えばSi基板にBやP等の不純物をイオン注入し
て熱処理し、Si基板にpウエル(p形不純物拡散領
域)やnウエル(n形不純物拡散領域)を形成し、これ
らpウエルやnウエルにトランジスタ等を形成する。こ
れらpウエルやnウエルは抵抗として使われることもあ
り、この場合、例えば、抵抗にするpウエルとトランジ
スタが形成されるpウエルとでは不純物濃度を互いに異
なるようにした方が都合がよいことがある。また、複数
のトランジスタの特性を互いに変えるために、例えば複
数のpウエルの不純物濃度を互いに変えることもある。
2. Description of the Related Art In manufacturing a semiconductor device, for example, an impurity such as B or P is ion-implanted into a Si substrate and heat-treated to form a p-well (p-type impurity diffusion region) or an n-well (n-well) in the Si substrate. Form impurity diffusion regions), and transistors and the like are formed in these p wells and n wells. These p-wells and n-wells are sometimes used as resistors. In this case, it is convenient to make the impurity concentration different between the p-well to be a resistor and the p-well in which a transistor is formed. is there. Further, in order to change the characteristics of the plurality of transistors, the impurity concentrations of the plurality of p-wells may be changed.

【0003】このように不純物濃度が互いに異なる複数
のpウエルやnウエルを形成する従来の方法を図2を参
照して説明する。ここでは、互いに異なる燐(P)濃度
になるように燐が拡散された複数のnウエルの形成方法
を説明する。先ず、Si基板10にSiO2 膜12を形
成し、Si基板10のうち、不純物濃度の高いnウエル
が形成される高濃度不純物領域14を除く領域(例え
ば、不純物濃度の低いnウエルが形成される低濃度不純
物領域16)の上にSiO2 膜12を介してフォトレジ
スト18を形成する(図2(a))。このフォトレジス
ト18をマスクにして、矢印20で示すように、Si基
板10の上方から高濃度不純物領域14に高ドーズ量の
燐イオンをイオン注入する(図2(b))。次に、フォ
トレジスト18を除去して、高濃度不純物領域14の上
にSiO2 膜12を介してフォトレジスト22を形成す
る(図2(c))。このフォトレジスト22をマスクに
して、矢印24で示すように、Si基板10の上方から
低濃度不純物領域16に低ドーズ量の燐イオンをイオン
注入する(図2(d))。低ドーズ量の燐イオンをイオ
ン注入した後、フォトレジスト22を除去し、1000
℃程度の高温でSi基板10をアニールし、高濃度不純
物領域14及び低濃度不純物領域16に注入されたイオ
ンを活性化し、不純物濃度の高いnウエル26及び不純
物濃度の低いnウエル28を形成する(図2(e))。
A conventional method of forming a plurality of p wells or n wells having different impurity concentrations as described above will be described with reference to FIG. Here, a method of forming a plurality of n-wells in which phosphorus is diffused so as to have different phosphorus (P) concentrations will be described. First, the SiO 2 film 12 is formed on the Si substrate 10, and a region of the Si substrate 10 excluding the high-concentration impurity region 14 in which the n-well having a high impurity concentration is formed (for example, an n-well having a low impurity concentration is formed). A photoresist 18 is formed on the low-concentration impurity region 16) via the SiO 2 film 12 (FIG. 2A). Using this photoresist 18 as a mask, a high dose of phosphorus ions is ion-implanted into the high-concentration impurity region 14 from above the Si substrate 10 as shown by an arrow 20 (FIG. 2B). Next, the photoresist 18 is removed, and a photoresist 22 is formed on the high concentration impurity region 14 with the SiO 2 film 12 interposed therebetween (FIG. 2C). Using this photoresist 22 as a mask, a low dose of phosphorus ions is ion-implanted into the low-concentration impurity region 16 from above the Si substrate 10 as shown by an arrow 24 (FIG. 2D). After the low dose phosphorus ion is ion-implanted, the photoresist 22 is removed.
The Si substrate 10 is annealed at a high temperature of about .degree. C. to activate the ions implanted in the high-concentration impurity region 14 and the low-concentration impurity region 16 to form the n-well 26 having a high impurity concentration and the n-well 28 having a low impurity concentration. (FIG. 2 (e)).

【0004】[0004]

【発明が解決しようとする課題】フォトレジストの形成
除去及びイオン注入という観点から上記従来の方法をみ
ると、高濃度不純物領域14を形成するに当たって、S
i基板10にフォトレジストを塗布し、この塗布された
フォトレジストを露光現像して所定パターンのフォトレ
ジスト18を形成し、その後イオン注入を行い、更にこ
の所定パターンのフォトレジスト18を除去する。この
ように、高濃度不純物領域14を形成するためには、所
定パターンのフォトレジストを形成する工程、イオン注
入工程、及びフォトレジスト除去工程の3つの工程が必
要になる。従って、高濃度不純物領域14と低濃度不純
物領域16を形成するためには、上記の3つの工程が2
回ずつ繰り返えされ、合計6つの工程が必要になる。
According to the conventional method described above from the viewpoint of removing and removing the photoresist and ion implantation, when forming the high-concentration impurity region 14, S
A photoresist is applied to the i substrate 10, the applied photoresist is exposed and developed to form a photoresist 18 having a predetermined pattern, and then ion implantation is performed, and then the photoresist 18 having the predetermined pattern is removed. As described above, in order to form the high-concentration impurity region 14, three steps of forming a photoresist having a predetermined pattern, an ion implantation step, and a photoresist removing step are required. Therefore, in order to form the high-concentration impurity region 14 and the low-concentration impurity region 16, the above three steps are performed in two steps.
It is repeated each time, and a total of 6 steps are required.

【0005】上記の例では、不純物濃度が高低の2種類
であるため、フォトレジストの形成除去及びイオン注入
に関する工程は6つになるが、3種類の不純物濃度の不
純物領域を形成しようとするとこれらの工程が9つにな
り、n種類の不純物濃度の不純物領域を形成しようとす
るとこれらの工程数が3×nとなる。すなわち、不純物
濃度の種類が増えるほど、上記工程が増え、その分半導
体装置の製造が煩雑なものとなる。
In the above example, since there are two kinds of high and low impurity concentrations, there are six steps related to the formation and removal of the photoresist and the ion implantation. There are 9 steps, and when an impurity region having n kinds of impurity concentrations is formed, the number of these steps becomes 3 × n. That is, as the number of types of impurity concentration increases, the number of steps increases, and the manufacturing of the semiconductor device becomes complicated accordingly.

【0006】本発明は、上記事情に鑑み、互いに異なる
不純物濃度をもつ複数の不純物拡散領域が形成された半
導体装置を従来に比べ少ない工程数で製造できる半導体
装置の製造方法を提供することを目的とする。
In view of the above circumstances, it is an object of the present invention to provide a semiconductor device manufacturing method capable of manufacturing a semiconductor device in which a plurality of impurity diffusion regions having different impurity concentrations are formed with a smaller number of steps than the conventional method. And

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
の本発明の半導体装置の製造方法は、互いに異なる不純
物濃度になるように同種類の不純物が拡散された複数の
不純物拡散領域が形成されてなる半導体装置の製造方法
において、 (1)上記不純物拡散領域を形成するために上記不純物
のイオンが注入されるイオン注入領域の上に、上記不純
物濃度に応じて異なるパターンのフォトレジストを形成
するフォトレジスト形成工程 (2)上記フォトレジストが形成された上記イオン注入
領域に、上記不純物濃度に応じたドーズ量の不純物を斜
めからイオン注入する斜めイオン注入工程 (3)イオン注入された上記イオン注入領域を熱処理す
ることにより、注入された不純物イオンを活性化させて
上記不純物拡散領域を形成する熱処理工程 を含むことを特徴とするものである。
According to a method of manufacturing a semiconductor device of the present invention for achieving the above object, a plurality of impurity diffusion regions are formed in which impurities of the same kind are diffused so as to have different impurity concentrations. In the method of manufacturing a semiconductor device comprising: (1) A photoresist having a different pattern depending on the impurity concentration is formed on the ion-implanted region into which the impurity ions are implanted to form the impurity-diffused region. Photoresist forming step (2) Oblique ion implantation step of obliquely ion-implanting an impurity of a dose amount corresponding to the impurity concentration into the ion-implanted region in which the photoresist is formed (3) Ion-implanted ion implantation A heat treatment step of activating the implanted impurity ions to form the impurity diffusion region by heat treating the region. It is characterized by including.

【0008】ここで、上記フォトレジスト形成工程が、
上記不純物濃度の高低に応じて、上記フォトレジストの
パターン間隔及び/又はパターン幅を変えるものである
ことが好ましい。また、上記斜めイオン注入工程が、上
記不純物濃度の高低に応じて角度を変えてイオン注入す
ることにより上記ドーズ量を変えるものであることが好
ましい。
Here, the photoresist forming step is
It is preferable that the pattern interval and / or the pattern width of the photoresist is changed according to the level of the impurity concentration. Further, it is preferable that the oblique ion implantation step is one in which the dose amount is changed by changing the angle and performing ion implantation according to the level of the impurity concentration.

【0009】また、斜めイオン注入工程においては、基
板を回転させながら、斜めイオン注入させることが好ま
しい。また、フォトレジストのパターン間隔とは、露光
や現像によりパターンニングされて残存するフォトレジ
ストのうち隣接する部分の距離をいい、また、フォトレ
ジストのパターン幅とは、露光や現像によりパターンニ
ングされて残存するフォトレジストの幅をいう。
In the oblique ion implantation step, it is preferable to perform oblique ion implantation while rotating the substrate. Further, the photoresist pattern interval refers to the distance between adjacent portions of the photoresist that remains after being patterned by exposure or development, and the photoresist pattern width is defined by exposure or development. The width of the remaining photoresist.

【0010】[0010]

【作用】本発明の半導体装置の製造方法によれば、不純
物濃度に応じて異なるパターンのフォトレジストがイオ
ン注入領域の上に形成され、このフォトレジストをマス
クにして、不純物濃度に応じたドーズ量の不純物をイオ
ン注入領域に斜めイオン注入するので、フォトレジスト
形成工程とイオン注入工程を一回ずつ行い、その後熱処
理することにより、互いに異なる不純物濃度の複数の不
純物拡散領域を形成できる。このため、従来のように、
互いに異なる不純物濃度の複数の不純物拡散領域を形成
するために、フォトレジスト形成工程とイオン注入工程
を複数回繰り返す必要がなく、従来の製造方法に比べ大
幅に工程数を削減できる。
According to the method of manufacturing a semiconductor device of the present invention, a photoresist having a different pattern depending on the impurity concentration is formed on the ion-implanted region, and using this photoresist as a mask, the dose amount depending on the impurity concentration is formed. Since the impurity of (1) is obliquely ion-implanted into the ion-implanted region, a plurality of impurity-diffused regions having different impurity concentrations can be formed by performing the photoresist forming step and the ion-implanting step once and then performing heat treatment. Therefore, as in the past,
Since it is not necessary to repeat the photoresist forming step and the ion implantation step a plurality of times in order to form a plurality of impurity diffusion regions having different impurity concentrations, the number of steps can be significantly reduced as compared with the conventional manufacturing method.

【0011】ここで、上記フォトレジスト形成工程が、
上記不純物濃度の高低に応じて、上記フォトレジストの
パターン間隔及び/又はパターン幅を変えるものである
場合は、比較的容易にドーズ量を調整できる。また、上
記斜めイオン注入工程が、上記不純物濃度の高低に応じ
て角度を変えてイオン注入することにより上記ドーズ量
を変えるものである場合も、比較的容易にドーズ量を調
整できる。
Here, the photoresist forming step is
When the pattern interval and / or pattern width of the photoresist is changed according to the level of the impurity concentration, the dose amount can be adjusted relatively easily. Further, even in the case where the oblique ion implantation step is one in which the dose amount is changed by changing the angle according to the level of the impurity concentration and performing ion implantation, the dose amount can be adjusted relatively easily.

【0012】[0012]

【実施例】以下、図面を参照して本発明の半導体装置の
製造方法の一実施例を説明する。図1は、半導体装置の
製造方法の概略を工程順に示す断面図であり、ここでは
3種類の不純物濃度のnウエルが形成された半導体装置
の製造方法を説明する。先ず、周知の方法で、p型のS
i基板30の上に膜厚約500ÅのSiO2 膜32を形
成し、このSiO2 膜32の上にフォトレジスト33を
一様に塗布し(図1(a),(b)では既にパターニン
グされたフォトレジストを示す)、このフォトレジスト
33をパターンニングする。フォトレジスト33のパタ
ーニングに当たっては、最終的に得たい不純物濃度に合
わせてフォレジストのパターン間隔L1,L2やパター
ン幅Wが決定される。3種類の不純物濃度のnウエルの
うち最も不純物濃度の高い領域になる高不純物濃度イオ
ン注入領域34の上にはフォトレジストを残存させな
い。不純物濃度が2番目に高い中不純物濃度イオン注入
領域36の上では、パターン幅Wが0.5μm、高さH
が1μm、パターン間隔L1が2μmになるようにフォ
トレジストをパターニングする。不純物濃度が最も低い
低不純物濃度イオン注入領域38の上では、パターン幅
Wが0.5μm、高さHが1μm、パターン間隔L2が
1μmになるようにフォトレジストをパターニングする
(図1(a))。尚、フォトレジストのパターニング
は、周知の露光現像方法により行う。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the method for manufacturing a semiconductor device of the present invention will be described below with reference to the drawings. 1A to 1C are cross-sectional views showing an outline of a method of manufacturing a semiconductor device in the order of steps. Here, a method of manufacturing a semiconductor device in which n wells having three types of impurity concentrations are formed will be described. First, p-type S is formed by a known method.
A SiO 2 film 32 having a film thickness of about 500 Å is formed on the i substrate 30, and a photoresist 33 is uniformly applied on the SiO 2 film 32 (in FIGS. 1A and 1B, it is already patterned. The photoresist 33 is shown), and the photoresist 33 is patterned. In patterning the photoresist 33, the pattern intervals L1 and L2 and the pattern width W of the photoresist are determined according to the impurity concentration to be finally obtained. The photoresist is not left on the high impurity concentration ion-implanted region 34, which is the region having the highest impurity concentration among the n wells of the three impurity concentrations. On the medium impurity concentration ion implantation region 36 where the impurity concentration is second highest, the pattern width W is 0.5 μm and the height H is H.
Of 1 μm and the pattern interval L1 is 2 μm. On the low impurity concentration ion implantation region 38 having the lowest impurity concentration, the photoresist is patterned so that the pattern width W is 0.5 μm, the height H is 1 μm, and the pattern interval L2 is 1 μm (FIG. 1A). ). The photoresist patterning is performed by a known exposure and development method.

【0013】このようにして、形成されるnウエルの不
純物濃度に応じて異なるパターンにフォトレジストをパ
ターニングした後、Si基板30を回転させながら、S
i基板30の表面に対して45°の角度を保って、矢印
40で示すように、例えばP + の斜めイオン注入を行う
(図1(b))。この斜めイオン注入に当たっては、ド
ーズ量を1.4×1013/cm2 、加速電圧100ke
Vにした。この斜めイオン注入によれば、パターニング
されたフォトレジスト33がマスクになり、不純物濃度
に応じたドーズ量の不純物が各イオン注入領域34,3
6,38にイオン注入される。
The n-well thus formed is
Photoresist is patterned in different patterns depending on the concentration of pure substances.
After turning, while rotating the Si substrate 30, S
Keep the angle of 45 ° with respect to the surface of the i substrate 30,
As indicated by 40, for example, P + Oblique ion implantation
(FIG. 1 (b)). When performing this oblique ion implantation,
The dose is 1.4 × 1013/ Cm2 , Acceleration voltage 100ke
Set to V. According to this oblique ion implantation, patterning
The photoresist 33 thus masked serves as a mask, and the impurity concentration
The impurity of a dose amount corresponding to the ion implantation regions 34, 3
6 and 38 are ion-implanted.

【0014】イオン注入した後、フォトレジスト33を
除去し、図示しない熱拡散炉を使ってSi基板30に、
1100℃、16時間のアニールを施した。これによ
り、高不純物濃度イオン注入領域34は表面の不純物濃
度が6.0×1016/cm3 のnウエル44となり、中
不純物濃度イオン注入領域36は表面の不純物濃度が
3.9×1016/cm3 のnウエル46となり、低不純
物濃度イオン注入領域38は表面の不純物濃度が2.5
×1016/cm3 のnウエル48となった。このよう
に、フォトレジストのパターン間隔やパターン幅を適宜
選択することにより、nウエルの不純物濃度を幾通りに
も変えることができる。また、フォトレジストのパター
ン間隔やパターン幅を一定にしていても、イオン注入角
度を適宜選択することによりnウエルの不純物濃度を幾
通りにも変えることができる。
After the ion implantation, the photoresist 33 is removed and the Si substrate 30 is formed by using a thermal diffusion furnace (not shown).
Annealing was performed at 1100 ° C. for 16 hours. As a result, the high impurity concentration ion-implanted region 34 becomes an n well 44 having a surface impurity concentration of 6.0 × 10 16 / cm 3 , and the medium impurity concentration ion-implanted region 36 has a surface impurity concentration of 3.9 × 10 16. / Cm 3 of the n well 46, and the low impurity concentration ion implantation region 38 has a surface impurity concentration of 2.5.
The n-well 48 has a density of × 10 16 / cm 3 . As described above, the impurity concentration of the n-well can be changed in many ways by appropriately selecting the pattern interval and pattern width of the photoresist. Further, even if the pattern interval and pattern width of the photoresist are constant, the impurity concentration of the n-well can be changed in various ways by appropriately selecting the ion implantation angle.

【0015】レジストパターンは図1と同じで、回転斜
めイオン注入の注入角度を基板表面に対して60°にし
た場合の不純物濃度はそれぞれ6.0×1016/cm
3 、4.5×1016/cm3 、3.5×1016/cm3
となった。ただし、熱処理条件は上記の例と同じであ
る。上記実施例ではnウエルについて説明したが、pウ
エルも同様に形成でき、さらに、その他の拡散層も上記
と同様の方法で形成できる。以上のようにしてnウエル
を形成した後は、周知の方法で電極や配線を形成して半
導体装置を製造する。これにより互いに異なる不純物濃
度をもつ複数の不純物拡散領域が形成された半導体装置
を従来に比べ少ない工程数で製造できる。
The resist pattern is the same as that shown in FIG. 1, and the impurity concentration is 6.0 × 10 16 / cm 3 when the implantation angle of the rotating oblique ion implantation is 60 ° with respect to the substrate surface.
3 , 4.5 × 10 16 / cm 3 , 3.5 × 10 16 / cm 3
Became. However, the heat treatment conditions are the same as in the above example. Although the n-well is described in the above embodiment, the p-well can be formed in the same manner, and other diffusion layers can be formed in the same manner as described above. After forming the n-well as described above, electrodes and wirings are formed by a known method to manufacture a semiconductor device. As a result, a semiconductor device in which a plurality of impurity diffusion regions having different impurity concentrations are formed can be manufactured with a smaller number of steps than the conventional method.

【0016】[0016]

【発明の効果】以上説明したように本発明の半導体装置
の製造方法によれば、不純物濃度に応じて異なるパター
ンのフォトレジストをマスクにして不純物濃度に応じた
ドーズ量の不純物をイオン注入領域に斜めイオン注入
し、その後、熱処理して互いに異なる不純物濃度の複数
の不純物拡散領域を形成するので、従来の製造方法に比
べ大幅に工程数を削減できる。
As described above, according to the method for manufacturing a semiconductor device of the present invention, a photoresist having a different pattern depending on the impurity concentration is used as a mask to implant an impurity of a dose amount corresponding to the impurity concentration into the ion implantation region. Since a plurality of impurity diffusion regions having different impurity concentrations are formed by performing oblique ion implantation and then performing heat treatment, the number of steps can be significantly reduced as compared with the conventional manufacturing method.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体装置の製造方法の一実施例を工
程順に示す断面図である。
FIG. 1 is a cross-sectional view showing an embodiment of a method of manufacturing a semiconductor device of the present invention in the order of steps.

【図2】互いに不純物濃度が異なる複数のpウエルやn
ウエルを形成する従来の方法を工程順に示す断面図であ
る。
FIG. 2 shows a plurality of p-wells and n-types having different impurity concentrations.
It is sectional drawing which shows the conventional method of forming a well in process order.

【符号の説明】[Explanation of symbols]

30 Si基板 33 フォトレジスト 34 高不純物濃度イオン注入領域 36 中不純物濃度イオン注入領域 38 低不純物濃度イオン注入領域 44,46,48 nウエル W パターン幅 L1,L2 パターン間隔 30 Si substrate 33 Photoresist 34 High impurity concentration ion implantation region 36 Medium impurity concentration ion implantation region 38 Low impurity concentration ion implantation region 44, 46, 48 n-well W Pattern width L1, L2 Pattern spacing

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 互いに異なる不純物濃度になるように同
種類の不純物が拡散された複数の不純物拡散領域が形成
されてなる半導体装置の製造方法において、 前記不純物拡散領域を形成するために前記不純物のイオ
ンが注入されるイオン注入領域の上に、前記不純物濃度
に応じて異なるパターンのフォトレジストを形成するフ
ォトレジスト形成工程と、 前記フォトレジストが形成された前記イオン注入領域
に、前記不純物濃度に応じたドーズ量の不純物を斜めか
らイオン注入する斜めイオン注入工程と、 イオン注入された前記イオン注入領域を熱処理すること
により、注入された不純物イオンを活性化させて前記不
純物拡散領域を形成する熱処理工程とを含むことを特徴
とする半導体装置の製造方法。
1. A method of manufacturing a semiconductor device, comprising a plurality of impurity diffusion regions in which impurities of the same type are diffused so as to have different impurity concentrations from each other. A photoresist forming step of forming a photoresist having a different pattern depending on the impurity concentration on the ion-implanted region into which ions are implanted; and a step of forming a photoresist on the ion-implanted region where the photoresist is formed, depending on the impurity concentration. A diagonal ion implantation step of diagonally implanting a dose of impurities, and a heat treatment step of activating the implanted impurity ions to form the impurity diffusion area by heat treating the ion-implanted ion implanted area. A method of manufacturing a semiconductor device, comprising:
【請求項2】 前記フォトレジスト形成工程が、前記不
純物濃度の高低に応じて、前記フォトレジストのパター
ン間隔及び/又はパターン幅を変えるものであることを
特徴とする請求項1記載の半導体装置の製造方法。
2. The semiconductor device according to claim 1, wherein the photoresist forming step changes a pattern interval and / or a pattern width of the photoresist according to the level of the impurity concentration. Production method.
【請求項3】 前記斜めイオン注入工程が、前記不純物
濃度の高低に応じて角度を変えてイオン注入することに
より、前記ドーズ量を変えるものであることを特徴とす
る請求項1又は2記載の半導体装置の製造方法。
3. The oblique dose ion implantation step according to claim 1, wherein the dose amount is varied by implanting ions at different angles according to the level of the impurity concentration. Manufacturing method of semiconductor device.
JP30382194A 1994-12-07 1994-12-07 Manufacture of semiconductor device Withdrawn JPH08162424A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30382194A JPH08162424A (en) 1994-12-07 1994-12-07 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30382194A JPH08162424A (en) 1994-12-07 1994-12-07 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH08162424A true JPH08162424A (en) 1996-06-21

Family

ID=17925715

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30382194A Withdrawn JPH08162424A (en) 1994-12-07 1994-12-07 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH08162424A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0828294A1 (en) * 1996-09-06 1998-03-11 Matsushita Electronics Corporation Semiconductor integrated circuit device and method for manufacturing the same
KR19990057085A (en) * 1997-12-29 1999-07-15 구본준 Well Forming Method of Semiconductor Device
JP2003178995A (en) * 2001-09-28 2003-06-27 Agere Systems Guardian Corp Ion implantation method to realize desired dopant concentration

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0828294A1 (en) * 1996-09-06 1998-03-11 Matsushita Electronics Corporation Semiconductor integrated circuit device and method for manufacturing the same
KR19990057085A (en) * 1997-12-29 1999-07-15 구본준 Well Forming Method of Semiconductor Device
JP2003178995A (en) * 2001-09-28 2003-06-27 Agere Systems Guardian Corp Ion implantation method to realize desired dopant concentration
US7049199B2 (en) * 2001-09-28 2006-05-23 Agere Systems Inc. Method of ion implantation for achieving desired dopant concentration
KR100918182B1 (en) * 2001-09-28 2009-09-22 에이저 시스템즈 가디언 코포레이션 Method of ion implantation for achieving desired dopant concentration
JP4631097B2 (en) * 2001-09-28 2011-02-16 アギア システムズ インコーポレーテッド Ion implantation method to achieve desired dopant concentration

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