JPH088401A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form oxide films different in thickness on the same semiconductor substrate, without increasing the number of oxidizing processes, when the kind of oxide film thickness is increased, by adjusting the concentration of impurities of an impurity layer, according to the oxide film thickness of an element region. CONSTITUTION:A deep N<+> diffusion layer 2 and a field oxide film 3 which are used for the collector of a BiP transistor are formed on an N-type Si substrate subjected to P-N junction isolation. After the base 4 of the BiP transistor is diffused, N-type impurities for forming the emitter are ion-implanted in the element region 15 of a high withstand voltage capacitor. The impurity concentration of an impurity layer is adjusted according to the thickness of the oxide film. The impurity concentration of the Si surface of the high withstand voltage capacitor part is set to about 1X10<18>-1X10<19>cm<-3>. The element region 16 of a low withstand voltage capacitor is covered with resist 5, so that impurities are not implanted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having a plurality of elements having different characteristics on one surface side of the same semiconductor substrate.

[0002]

2. Description of the Related Art With the miniaturization and high performance of electronic components, in semiconductor devices, a fine element for the purpose of high integration and high speed and a relatively large element for the purpose of high energy output are the same. Forming on a semiconductor substrate has become important.

Therefore, in the invention disclosed in Japanese Unexamined Patent Publication No. 2-51266, when a plurality of elements (for example, capacitors) having different withstand voltages are formed on the same semiconductor substrate, the performance of each element is sufficiently extracted. The semiconductor device is formed by setting the oxide film thickness according to the breakdown voltage. Less than,
The technique according to the above invention will be described with reference to FIG.

First, after the field oxide film 3 is formed on the P-type Si substrate 10 other than the element region 15 by the normal selective oxidation method, the oxide film left in the element region 15 is removed (FIG. 5). (A)). Next, heat treatment is performed in dry oxygen at 1100 degrees Celsius to form the oxide film 9 in the element region 15 (FIG. 5B). Next, after the portion other than the one element region 15 is covered with the photoresist 5 by the patterning method, the oxide film 9 in the element region 15 is removed by wet etching with hydrofluoric acid (FIG. 5C). ). After that, the photoresist 5 becomes O ₂
After the resist is ashed by plasma, it is heat-treated in dry oxygen at 1000 ° C. to oxidize the entire surface of the substrate including the element region 15 (FIG. 5D).

[0005]

However, in order to obtain a plurality of oxide films having different thicknesses as described above, a plurality of oxidation steps and unnecessary oxide films are partially removed as described below. Photolinography and etching processes are required, which lengthens the manufacturing process. That is, generally, if the impurity concentration in the semiconductor substrate is constant and the oxidizing atmosphere and temperature are the same, the oxide film thickness obtained by oxidizing the semiconductor substrate is as shown in FIG.
It is known that the oxide film thickness is large at the initial stage of oxidation and tends to decrease with time.

Therefore, in order to obtain oxide films having different thicknesses on the same semiconductor substrate, it is necessary to change the total oxidation time for each oxide film having a different thickness. Therefore, as shown in (a) to (d) of FIG. 5, the portion requiring a thick oxide film for high breakdown voltage is oxidized twice to increase the total oxidation time and thin oxidation for low breakdown voltage. In the portion requiring only the film, the oxide film is removed by etching after the first oxidation, and the oxidation is performed in a short time substantially only for the second oxidation.

Therefore, in the above-mentioned conventional technique, in order to obtain a plurality of different oxide films, the oxidation process is required by the number of oxide films.

In addition, in the first oxidation step, the semiconductor device must be washed and then dried, and an oxidation step, a photolinography step, an etching step, and a peeling step must be performed. In order to obtain the oxide film thickness, the above-described oxidation process is repeated, which causes a problem that the lead time required for manufacturing the semiconductor device is significantly increased.

The present invention focuses on the fact that when the impurity concentration in the semiconductor substrate changes, the oxide film thickness obtained by the oxidizing action under the same conditions changes. That is, the present invention does not increase the number of oxidation steps even if the number of types of oxide film thickness increases by adjusting the concentration of impurities in the impurity layer according to the oxide film thickness of the element region from which an oxide film is to be obtained. Another purpose is to form oxide films having different thicknesses on the same semiconductor substrate.

[0010]

As means for solving the above-mentioned problems, the first aspect of the present invention is to provide an impurity layer formed in a semiconductor substrate and an oxide film formed on the impurity layer. A method of manufacturing a semiconductor device comprising: an electrode formed on a side facing the impurity layer with the oxide film sandwiched therebetween, wherein the semiconductor substrate is oxidized to form a plurality of regions with different film thicknesses. A method of manufacturing a semiconductor device, comprising: an oxide film forming step of forming a film; and a semiconductor device including an impurity layer forming step of adjusting an impurity concentration of the impurity layer according to a film thickness of the oxide film. A manufacturing method according to claim 2, wherein in the impurity layer forming step,
2. The method of manufacturing a semiconductor device according to claim 1, wherein the impurity concentration of the impurity layer is adjusted for each predetermined region when the impurity is implanted once.

[0011]

As an operation of the present invention, in claim 1, the concentration of the impurities is adjusted according to the oxide film thickness when the impurities are implanted into the semiconductor substrate to form the impurity layer. According to the second aspect, in the impurity layer forming step, the impurity concentration of each region is adjusted in one impurity implanting step.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment according to the present invention will be described below with reference to FIGS. First, FIG. 2 shows the relationship between the impurity concentration in Si and the oxidation time. As can be seen from this figure, when the impurity concentration in Si changes, oxide films having different thickness can be obtained by oxidizing in the same oxidizing atmosphere for the same time. This is generally called the enhanced oxidation effect, which is a well-known technique.

Focusing on this effect, the impurity concentration in Si is adjusted in advance before the formation of the capacitor oxide film.
A technique for obtaining a capacitor having a different film thickness (breakdown voltage) in a single oxidation step will be described below as a first embodiment.

Adjustment of impurity concentration before oxide film formation
Is the diffusion layer in other parts of the semiconductor device manufacturing process.
It can be done by being diverted.
Thus, capacitors with different withstand voltages can be obtained. 35V withstand voltage
Bip transistor and 120mm for 35V withstand voltage
Capacitor with oxide film thickness of 50mm for 5V withstand voltage
Take the case where a capacitor with an oxide film is formed as an example.
FIG. 1 shows a first embodiment according to the present invention. First, PN
Impurity concentration of junction separated 1 × 10¹⁵cm^-3N type S of degree
The diode used for the collector of the Bip transistor on the i substrate 1.
Loop N⁺Diffusion layer 2 and field oxide film 3 are formed
(FIG. 1 (a)). Next, the base 4 of the Bip transistor
N-type impurities for forming an emitter after being diffused
Is ion-implanted into the element region 15 of the high voltage capacitor.
(FIG. 1 (b)). At this time, the element area of the low breakdown voltage capacitor
16 is covered with the resist 5 and contains impurities.
Is not injected. After removing the resist by ashing,
The spreader 6 is diffused (FIG. 1C). High breakdown voltage at this point
The impurity concentration on the Si surface of the capacitor is 1 × 10¹⁸~ 1
× 10¹⁹cm^-3It will be about. Then oxygen at 950 degrees Celsius
(O₂) And hydrochloric acid (HCl) ratio is 10: 1 and about 5
2 minutes of 120nm and 50nm by being oxidized for about 0 minutes
Different kinds of oxide films are obtained at the same time (FIG. 1 (d)). impurities
Has only to be introduced before the oxidation, and its impurity concentration
Degree 1 × 10 on Si surface¹⁸cm^-3If the above is obtained
Thus, a practical accelerated oxidation effect can be obtained. Therefore, this time
In the example, the data used for the collector part of the Bip transistor is
The sweep N + diffusion layer 2 is introduced in the high voltage capacitor
Even if there is 1 × 10 on the Si surface¹⁸cm ^-3The above impurity concentration
Since it is obtained, the same effect can be obtained. Also low withstand voltage
N as the lower electrode of the capacitor⁺Impurity 7 is ion-implanted
And the poly-Si8 of the upper electrode is reduced pressure CVD
Deposited by and processed by dry etching
A capacitor is formed (FIG. 1 (e)).

Since the manufacturing process reduces the oxide film forming process, it has an effect of reducing the lead time in manufacturing the semiconductor device.

Next, a second embodiment will be described with reference to FIG. It is possible to adjust the impurity concentration of the Si substrate before forming the oxide film by using a mask having a group of minute openings. This uses the technique described in Japanese Patent Application No. 5-104392 of the present applicant, but since a plurality of different impurity concentrations can be obtained in one impurity layer forming step, it is described in the first embodiment. It is possible to reduce the impurity introduction step for forming the impurity layer of the low withstand voltage capacitor and to simultaneously form a withstand voltage type capacitor having three or more levels.

Similar to the first embodiment, deep N is formed in N-type Si having an impurity concentration of about 1 × 10 ¹⁵ cm ^-3 separated by PN junction.
^{+ A} diffusion layer 2 and a field oxide film 3 are formed (FIG. 3A). Next, N-type impurities that will become the lower electrode of the capacitor are implanted. Here, the mask 5 having a group of minute apertures having different aperture ratios for each withstand voltage system is used to perform ion implantation (FIG. 3B). This implantation of impurities is not shown in the figure, but naturally as shown in the first embodiment, B
It can be shared with the emitter of the ip transistor, and a microaperture mask is applied to the deep N ⁺ diffusion layer, which can be used as an electrode under the Bip transistor.

Since the amount of impurities implanted into the Si substrate can be adjusted by the aperture ratio of the mask, the finished oxide film thickness, that is, the breakdown voltage system can be adjusted by this aperture ratio.

Next, after the resist is removed by ashing,
At a minimum, the N-type impurity 6 is diffused until the surface concentration of the impurity-implanted portion where the fine aperture mask is used becomes substantially uniform (FIG. 3C).

After that, oxidation is performed to obtain three different oxide film thicknesses such as 120 nm, 80 nm and 50 nm (FIG. 3 (d)). After that, if poly-Si8 of the electrode is deposited and etched, a capacitor is formed (FIG. 3 (e)).

Next, a third embodiment in which the present invention is applied to a MOS type transistor will be described with reference to FIG. MOS
Like the capacitor, the gate electrode of the type transistor is on the Si substrate via the gate oxide film. Therefore, the breakdown voltage of the MOS transistor is determined by the breakdown voltage of the gate oxide film. Therefore, when MOS type transistors having different breakdown voltages are formed on the same substrate, different gate oxide films need to be formed. The present invention is applied to the formation of this gate oxide film.

N-type S with an impurity concentration of about 1 × 10 ¹⁵ cm ^-3
The field oxide film 3 is formed on i. An N ⁻ diffusion layer 30 is introduced under this field oxide film, which is introduced to prevent inversion of the parasitic field MOS, so that inversion does not occur at a low withstand voltage power supply voltage. The surface density is adjusted (FIG. 4 (a)). Next, an N-type impurity is introduced into a portion where a high breakdown voltage element is formed, so that a high-concentration impurity layer 20 is obtained. Here, FIG. 5 shows a resist mask (FIG. 4B). The gate oxide film is formed after the resist of the impurity introduction mask is removed. Here, two types of gate oxide films of high breakdown voltage type and low breakdown voltage type are obtained by the accelerated oxidation effect (see FIG. 4 ( c)).

Next, impurities are introduced into the channel portion of the MOS transistor. In the high breakdown voltage transistor, the N-type impurity concentration on the substrate surface is high in order to obtain the accelerated oxidation effect, but the conductivity is adjusted by introducing the P-type impurity of the opposite conductivity type. Is possible. (FIG.4 (d)).

Further, when poly-Si8 as a gate electrode is deposited and etched, and then a high concentration P-type impurity 21 is introduced into the source / drain portions, a MOS-type transistor is obtained (FIG. 4 (e)). )).

The high-concentration N-type impurity layer introduced to obtain the enhanced oxidation effect has a shape surrounding the high breakdown voltage transistor at the time of final finishing as shown in FIG. 4C. It also works effectively as a diffusion layer for preventing field inversion of the high breakdown voltage element. Although the PMOS type is described here, the NMOS type can be formed by exchanging the P type and N type impurity types.

In the above-mentioned three embodiments, the oxidation process is reduced, but the impurity ion implantation process is increased. Therefore, it seems that the number of processes and the lead time for manufacturing the semiconductor device are not reduced. obtain. However, in terms of lead time for manufacturing a semiconductor device, the oxidation process requires cleaning and drying of the semiconductor substrate, and photolithography process, etching process, and peeling process. The process is performed only through a photolinography process, an impurity ion implantation process, and a peeling process. Therefore, the number of steps that must be performed to oxidize the semiconductor substrate is smaller than that of the impurity ion implantation step. Therefore, even if the impurity ion implantation step is increased, the oxidation step may not be reduced as in the embodiment of the present invention. The lead time can be reduced when the entire semiconductor device manufacturing process is viewed.

[0027]

As an effect of claim 1 of the present invention, when obtaining a plurality of oxide films having different thicknesses on the same semiconductor substrate, the number of oxidation steps is smaller than the number of kinds of oxide film thicknesses. Therefore, the lead time for manufacturing the semiconductor device can be reduced as compared with the conventional one in which the oxidation process is required by the same amount as the desired oxide film thickness. Further, as an effect of claim 2 according to the present invention, in addition to the effect of claim 1, an oxide film having a different thickness can be obtained by directly using the semiconductor device manufacturing equipment which is currently generally used. Therefore, a new oxidation step is unnecessary, and an efficient semiconductor device can be manufactured.

[Brief description of drawings]

FIG. 1 is a continuous cross-sectional view in the manufacturing process of a semiconductor device of a first embodiment according to the present invention.

FIG. 2 is a diagram showing a relationship between an oxidation time and an oxide film thickness according to an impurity concentration.

FIG. 3 is a continuous cross-sectional view in the manufacturing process of the semiconductor device of the second embodiment according to the present invention.

FIG. 4 is a continuous sectional view in the manufacturing process of the semiconductor device according to the third embodiment of the present invention.

FIG. 5 is a continuous sectional view in the manufacturing process of the conventional semiconductor device.

FIG. 6 is a diagram showing the relationship between the oxidation time and the oxide film thickness when the impurity concentration is constant.

[Explanation of symbols]

1 ... N-type Si 2 ... Deep N ⁺ diffusion layer 3 ... Field oxide film 4 ... Base 5 ... Resist 6 ... Emitter 7 ... N + impurities 8 ... Poly Si 9 ... Oxide film 10 ... P-type Si 11 ... Micro mask 15 ... Element region

Claims (2)

[Claims] 1. An impurity layer formed in a semiconductor substrate, an oxide film formed on the impurity layer, and an electrode formed on a side facing the impurity layer with the oxide film interposed therebetween. A method of manufacturing a semiconductor device, comprising: an oxide film forming step of forming oxide films having different thicknesses in a plurality of regions by oxidizing the semiconductor substrate; A method of manufacturing a semiconductor device, comprising: an impurity layer forming step of adjusting the concentration according to the film thickness of the oxide film. 2. The manufacturing of a semiconductor device according to claim 1, wherein, in the impurity layer forming step, the impurity concentration of the impurity layer is adjusted for each predetermined region when the impurity is implanted once. Method.