JPH08102562A - Hall element - Google Patents

Hall element

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Publication number
JPH08102562A
JPH08102562A JP6237674A JP23767494A JPH08102562A JP H08102562 A JPH08102562 A JP H08102562A JP 6237674 A JP6237674 A JP 6237674A JP 23767494 A JP23767494 A JP 23767494A JP H08102562 A JPH08102562 A JP H08102562A
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JP
Japan
Prior art keywords
heterojunction
hall element
band gap
hall
layer
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JP6237674A
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Japanese (ja)
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JP3567500B2 (en
Inventor
Takashi Udagawa
隆 宇田川
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Resonac Holdings Corp
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Showa Denko KK
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Abstract

PURPOSE: To provide a highly sensitive heterojunction Hall element having a low temperature coefficient. CONSTITUTION: A Hall element is formed of heterojunction, which provides a band gap difference of 0.6eV or more, such as of GaInAs and Al InP. Thus, it has high sensitivity and a temperature coefficient 0.1%/ deg.C or less, which is equivalent to that of the conventional GaAs Hall element.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はホール素子に係わり、特
に、高感度特性を与える半導体ヘテロ接合からなるヘテ
ロ接合ホール素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Hall element, and more particularly to a heterojunction Hall element composed of a semiconductor heterojunction which provides high sensitivity characteristics.

【0002】[0002]

【従来の技術】ホール素子は一種の磁気センサーであ
り、回転センサーや電流センサー等として利用されてい
る。最近では、ホール素子の高感度化の要望に対応して
半導体ヘテロ接合によって発現される高電子移動度特性
を利用したヘテロ接合ホール素子が開発されている。G
0.47In0.53AsとInPとのヘテロ接合からなるホ
ール素子もその一例である(奥山 忍他,1992年秋
季第53回応用物理学会学術講演会予稿集No.3,10
78頁,講演番号16a−SZC−16)。
2. Description of the Related Art A Hall element is a kind of magnetic sensor and is used as a rotation sensor, a current sensor or the like. Recently, a heterojunction Hall element utilizing the high electron mobility characteristics developed by a semiconductor heterojunction has been developed to meet the demand for higher sensitivity of the Hall element. G
a Hall element consisting of a heterojunction of 0.47 In 0.53 As and InP is also an example (Obuyama Shinobu et al., Proceedings No. 3, 10 of the 53rd Annual Meeting of the Japan Society of Applied Physics, Autumn 1992).
78, Lecture No. 16a-SZC-16).

【0003】Ga0.47In0.53AsとInPとのヘテロ
接合は高い電子移動度を発現し(小沼 賢二郎他,19
92年秋季第53回応用物理学会学術講演会予稿集No.
1,282頁,講演番号18a−ZE−3)、ホール素
子の高感度化が達成されている。感度と同様、ホール出
力電圧の温度係数αが小さいこともホール素子の重要な
特性である。温度係数αは通常は次の式(1)で求めら
れるホール出力電圧の温度による変化率である。 α(%)={(VT2−VT1)/VT1}/(T2 −T1 ) ……式(1) ここでVT1,VT2は温度T1 ,T2 でのホール出力電圧
である。Ga0.47In0.53As/InPヘテロ接合ホー
ル素子では、αは0.1〜0.2%/℃となっている
(奥山 忍他,1992年秋季第53回応用物理学会学
術講演会予稿集No.3,1078頁,講演番号16a−
SZC−16)。これは、一般的なGaAsホール素子
の0.05%/℃よりは大きい。高性能ホール素子とな
すには高い感度、即ちホール電圧の出力が大きく、且つ
その温度係数が小さい必要がある。
Heterojunctions between Ga 0.47 In 0.53 As and InP exhibit high electron mobility (Kenjiro Konuma et al., 19
1992 Autumn 53rd Annual Meeting of the Japan Society of Applied Physics Proceedings No.
1, pp. 182, Lecture No. 18a-ZE-3), high sensitivity of Hall elements has been achieved. Like the sensitivity, the small temperature coefficient α of the Hall output voltage is also an important characteristic of the Hall element. The temperature coefficient α is usually the rate of change of the Hall output voltage with temperature, which is obtained by the following equation (1). α (%) = {(V T2 −V T1 ) / V T1 } / (T 2 −T 1 ) ... Formula (1) where V T1 and V T2 are Hall output voltages at temperatures T 1 and T 2. Is. In the Ga 0.47 In 0.53 As / InP heterojunction Hall element, α is 0.1 to 0.2% / ° C. (Okuyama Shinobu et al., Proceedings of the 53rd Autumn Meeting of the Applied Physics Society of Japan, 1992). 3, p. 1078, lecture number 16a-
SZC-16). This is larger than 0.05% / ° C of a general GaAs Hall element. In order to form a high performance Hall element, it is necessary to have high sensitivity, that is, a large Hall voltage output and a small temperature coefficient.

【0004】αは感磁層を構成する半導体材料の禁止帯
幅(バンドギャップ)に依存する。感磁層とは磁界を検知
しホール電圧を発生する機能を担う半導体層のことを言
う。感磁層が単一の半導体層から構成されている場合、
αは感磁層を構成する半導体のバンドギャップが小さい
程、大きくなる傾向がある。例えばInSbの室温での
バンドギャップは0.17eVであり、バンドギャップの
低さに対応してαは約2%/℃と大きい。一方、バンド
ギャップが1.43eVのGaAsではαは約0.05%
/℃と小さくなる。
Α depends on the band gap (band gap) of the semiconductor material forming the magnetosensitive layer. The magnetic sensing layer refers to a semiconductor layer that has a function of detecting a magnetic field and generating a Hall voltage. When the magnetic sensitive layer is composed of a single semiconductor layer,
α tends to increase as the band gap of the semiconductor forming the magnetosensitive layer decreases. For example, the band gap of InSb at room temperature is 0.17 eV, and α is as large as about 2% / ° C. corresponding to the low band gap. On the other hand, α is about 0.05% for GaAs with a bandgap of 1.43 eV.
/ ° C decreases.

【0005】ヘテロ接合を含む感磁層の場合、αはヘテ
ロ接合を構成する半導体層のバンドギャップの差に依存
する傾向がある。従来のGa0.47In0.53As/InP
ヘテロ接合系を例にとれば、Ga0.47In0.53Asの室
温でのバンドギャップは0.86eVである(H. C. Case
y, Jr., and M. B. Panish,「HETEROSTRUCTUR LASERS-P
art B」(Academic Press(1978) ,16頁参照)。InPの
それは1.34eVであるからバンドギャップの差は0.
48eVとなる。また、Ga0.47In0.53As/InPヘ
テロ系からなるヘテロ接合ホール素子のαは、従来のI
nSbホール素子約2%/℃に比較すれば約1桁小さく
なっている。
In the case of a magneto-sensitive layer including a heterojunction, α tends to depend on a difference in band gap between semiconductor layers forming the heterojunction. Conventional Ga 0.47 In 0.53 As / InP
Taking a heterojunction system as an example, the band gap of Ga 0.47 In 0.53 As at room temperature is 0.86 eV (HC Case
y, Jr., and MB Panish, `` HETEROSTRUCTUR LASERS-P
art B ”(Academic Press (1978), p. 16). The band gap of InP is 1.34 eV, so the difference in bandgap is 0.
It will be 48 eV. Further, α of the heterojunction Hall element composed of Ga 0.47 In 0.53 As / InP hetero system is
Compared to the nSb Hall element of about 2% / ° C, it is about one digit smaller.

【0006】Ga0.47In0.53As/InPヘテロ接合
系以外では、Al0.3 Ga0.7 As/GaAs系を用い
たヘテロ接合ホール素子がある(田口 隆志他,電子情
報通信学会論文誌C,J70−C巻,5号(198
7),758頁)。Al組成比がwのAlw Ga1-w
sのバンドギャップ((Eg)w )は次の式(2)で与
えられる。 (Eg)w =1.424+1.247・w ……………式(2) w=0.3では、(Eg)w は1.80eVである。Ga
Asのバンドギャップは1.43eVである。従って、両
者のバンドギャップの差は0.37eVとなる。Al0.3
Ga0.7 As/GaAsヘテロ接合ホール素子のαの絶
対値は0.68%/℃となっている(田口 隆志他,電
子情報通信学会論文誌C,J70−C巻,5号(198
7),758頁)。
In addition to Ga 0.47 In 0.53 As / InP heterojunction system, there is a heterojunction Hall element using Al 0.3 Ga 0.7 As / GaAs system (Taguchi Takashi et al., IEICE Transactions C, J70-C volume). , 5 (198
7), p. 758). Al w Ga 1-w A with Al composition ratio w
The band gap ((Eg) w ) of s is given by the following equation (2). (Eg) w = 1.424 + 1.247 · w (2) When w = 0.3, (Eg) w is 1.80 eV. Ga
The band gap of As is 1.43 eV. Therefore, the difference in band gap between the two is 0.37 eV. Al 0.3
The absolute value of α of the Ga 0.7 As / GaAs heterojunction Hall element is 0.68% / ° C (Taguchi Takashi et al., IEICE Transactions C, J70-C, Vol. 5 (198).
7), p. 758).

【0007】また、Ga0.2 In0.8 As/Al0.48
0.52Asヘテロ接合ホール素子も知られている(Y. S
ugiyama, Technical Digest of the 11th Sensor Sympo
sium(1992), 79頁)。Ga0.2 In0.8 Asの室温での
バンドギャップは1.21eVで、Al0.48In0.52As
では1.49eVである(H. C. Casey, Jr., and M. B.Pa
nish,「HETEROSTRUCTUR LASERS-Part B」(Academic Pre
ss(1978), 16頁参照)。従って、バンドギャップの差は
0.28eVとなる。また、電圧駆動の場合のGa0.2
0.8 As/Al0.48In0.52Asヘテロ接合ホール素
子のαは0.54%/℃と報告されている(Y. Sugiyam
a, Technical Digest of the 11th Sensor Symposium(1
992), 79頁)。上記の従来のヘテロ接合系からなるホー
ル素子でも、いずれもGaAsホール素子に比較し高感
度ではあるものの、αはより大きくなっている。
Ga 0.2 In 0.8 As / Al 0.48 I
n 0.52 As heterojunction Hall element is also known (Y.S.
ugiyama, Technical Digest of the 11th Sensor Sympo
sium (1992), p. 79). The band gap of Ga 0.2 In 0.8 As at room temperature is 1.21 eV, and Al 0.48 In 0.52 As
Is 1.49 eV (HC Casey, Jr., and MBPa
nish, "HETERO STRUCTUR LASERS-Part B" (Academic Pre
ss (1978), p. 16). Therefore, the band gap difference is 0.28 eV. Ga 0.2 I in the case of voltage drive
The α of the n 0.8 As / Al 0.48 In 0.52 As heterojunction Hall element is reported to be 0.54% / ° C. (Y. Sugiyam
a, Technical Digest of the 11th Sensor Symposium (1
992), p. 79). The above-mentioned conventional Hall element composed of a heterojunction system has higher sensitivity than that of the GaAs Hall element, but α is larger.

【0008】αが大きいと必然的に使用環境温度による
ホール出力電圧の変化が大きくなる。従って、温度によ
る出力電圧の変動を補償する付帯回路が必要となる。こ
れは工程的にも煩雑さを招き、また付帯回路を設けると
ホール素子を含むシステムの肥大化をもたらす。αを低
下させるには、従来よりも大きなバンドギャップの差、
ひいては大きな伝導帯の不連続性をもたらすヘテロ接合
系を利用する必要がある。
A large α inevitably causes a large change in the Hall output voltage due to the operating environment temperature. Therefore, an auxiliary circuit that compensates for variations in output voltage due to temperature is required. This causes complication in the process, and if an auxiliary circuit is provided, the system including the Hall element is enlarged. To reduce α, a larger band gap difference than before,
Consequently, it is necessary to utilize a heterojunction system that results in a large conduction band discontinuity.

【0009】[0009]

【発明が解決しようとする課題】従来のヘテロ接合ホー
ル素子のαを低減するには、バンドギャップの差が大き
い半導体からヘテロ接合を構成する必要がある。また、
高感度特性を得るには高い電子移動度を発現できるヘテ
ロ接合系を用いる必要がある。しかしながら、ホール素
子に適する大きなバンドギャップの差を有するヘテロ接
合系は未だ提案されていない。これが高感度で且つホー
ル出力電圧の温度変化が、従来のGaAsホール素子と
同等に小さいヘテロ接合ホール素子の実現を妨げる一因
であった。高い感度特性とホール出力電圧の小さい温度
変動を与えるヘテロ接合系を新たに見出せれば高性能の
ヘテロ接合ホール素子が供給できる。
In order to reduce α of the conventional heterojunction Hall element, it is necessary to form the heterojunction from semiconductors having a large band gap difference. Also,
In order to obtain high sensitivity characteristics, it is necessary to use a heterojunction system capable of expressing high electron mobility. However, a heterojunction system having a large bandgap difference suitable for a Hall element has not yet been proposed. This is one of the reasons why the temperature change of the Hall output voltage with high sensitivity prevents the realization of the heterojunction Hall element which is as small as the conventional GaAs Hall element. A high-performance heterojunction Hall element can be provided by newly discovering a heterojunction system that has high sensitivity characteristics and small temperature fluctuations in Hall output voltage.

【0010】[0010]

【課題を解決するための手段】本発明では禁止帯幅が
0.64eV以上である半導体でヘテロ接合を構成するこ
とにより、従来のホール出力電圧の温度変化係数が大き
い欠点を克服し、高感度で且つホール出力電圧の温度変
化が少ないヘテロホール素子を得る。本発明者がヘテロ
接合を構成する半導体材料のバンドギャップ差とホール
素子の温度係数の関係を検討した結果を図3に示す。温
度係数はヘテロ接合を形成する二種の半導体のバンドギ
ャップ差の増大と共に単調に減少していく。バンドギャ
ップの差が0.64eV未満では、素子の実用上適すると
される0.1%程度以下のαを得るのは困難であること
が判明した。0.64eV以上となると0.1%より小さ
いαを得ることが可能となるのが示唆された。このよう
なヘテロ接合はGax In1-x PまたはAlz In1-z
PとGay In1-y Asとの接合によって達成される。
In the present invention, by forming a heterojunction with a semiconductor having a forbidden band width of 0.64 eV or more, it is possible to overcome the drawback of the conventional Hall output voltage having a large temperature change coefficient and to achieve high sensitivity. A hetero Hall element having a small Hall output voltage variation with temperature is obtained. FIG. 3 shows the results of the study by the inventor of the relationship between the band gap difference of the semiconductor material forming the heterojunction and the temperature coefficient of the Hall element. The temperature coefficient monotonically decreases with an increase in the band gap difference between the two semiconductors forming the heterojunction. It was found that when the band gap difference is less than 0.64 eV, it is difficult to obtain α of about 0.1% or less, which is considered to be practically suitable for the device. It was suggested that it is possible to obtain α smaller than 0.1% at 0.64 eV or more. Such a heterojunction is Ga x In 1-x P or Al z In 1-z.
It is achieved by joining P with Ga y In 1-y As.

【0011】Gax In1-x PとAlz In1-z Pのバ
ンドギャップ((Eg)x ,(Eg)z )は各々、式
(3)及び式(4)から求められる。 (Eg)x =1.351+0.643・x+0.786・X2 ……式(3) (Eg)z =1.351+2.23・z ……式(4) 上式よりx=0.51±0.02の範囲では(Eg)x
は1.85〜1.91eVとなる。z=0.52±0.0
2の範囲では、(Eg)z は2.47〜2.56eVとな
る。Gay In1-y Asのバンドギャップ((Eg)
y )はGa組成比(y)の関数として次式(5)で与え
られる。 (Eg)y =0.36+1.064・y …………式(5) 式(5)より例えばy=0.8では(Eg)y は1.2
1eVとなる。従って、Ga0.8 In0.2 Asとのバンド
ギャップの差は、x=0.51±0.02のGax In
1-x Pに対しては0.64〜0.70eVとなる。一方、
z=0.52±0.02のAlz In1-z Pに対しては
1.26〜1.35eVとなる。
The band gaps ((Eg) x , (Eg) z ) of Ga x In 1-x P and Al z In 1-z P are obtained from equations (3) and (4), respectively. (Eg) x = 1.351 + 0.643 · x + 0.786 · X 2 ...... formula (3) (Eg) z = 1.351 + 2.23 · z ...... formula (4) From the above equation x = 0.51 ± In the range of 0.02, (Eg) x
Is 1.85 to 1.91 eV. z = 0.52 ± 0.0
In the range of 2, (Eg) z is 2.47 to 2.56 eV. Band gap of Ga y In 1-y As ((Eg)
y ) is given by the following equation (5) as a function of the Ga composition ratio (y). (Eg) y = 0.36 + 1.064 · y Equation (5) From Equation (5), for example, when y = 0.8, (Eg) y is 1.2.
It will be 1 eV. Therefore, the band gap difference from Ga 0.8 In 0.2 As is x = 0.51 ± 0.02 Ga x In
It is 0.64 to 0.70 eV for 1- xP. on the other hand,
It is 1.26 to 1.35 eV for Al z In 1-z P of z = 0.52 ± 0.02.

【0012】本発明では高性能のヘテロ接合を得るに、
Ga組成比(x)が0.49以上0.53以下のGax
1-x PとGa組成比(y)が0.10以上0.40以下
であるGay In1-y Asとからヘテロ接合を構成す
る。または、Al組成比(z)が0.50以上0.54
以下のAlz In1-z PとGa組成比(y)が0.10
以上0.40以下であるGay In1-y Asとでヘテロ
接合を構成する。いずれも、0.64eV以上の禁止帯幅
の差を与えるヘテロ接合系からホール素子を構成する。
In the present invention, in order to obtain a high-performance heterojunction,
Ga x I having a Ga composition ratio (x) of 0.49 or more and 0.53 or less
A heterojunction is formed from n 1-x P and Ga y In 1-y As having a Ga composition ratio (y) of 0.10 or more and 0.40 or less. Alternatively, the Al composition ratio (z) is 0.50 or more and 0.54.
The following Al z In 1 -z P and Ga composition ratio (y) are 0.10
A heterojunction is formed with Ga y In 1-y As that is 0.40 or less. In either case, the Hall element is composed of a heterojunction system that gives a difference in forbidden band of 0.64 eV or more.

【0013】Gax In1-x P/Gay In1-y Asや
Alz In1-z P/Gay In1-yAsヘテロ接合は結
晶基板上に堆積する。Ga組成比(x)が0.51のG
0.51In0.49PとAl組成比zが0.52のAl0.52
In0.48PはGaAsと格子整合するため、半絶縁性の
GaAs単結晶を基板とすると都合が良い。ホール素子
の特性上、xは0.51±0.02の範囲に収納するの
が好ましい。zは0.52±0.02の範囲に収納させ
ると良い。x,zがこの範囲を越えると、これらの層に
ヘテロ接合させるGay In1-y Asに結晶欠陥を誘引
する原因となる。結晶欠陥を多量に内在するヘテロ接合
系では高い電子移動度は顕現されない。よって、高感度
のヘテロ接合ホール素子は実現されない。ホール素子の
感度は母体材料の電子移動度に比例して向上するからで
ある。
[0013] Ga x In 1-x P / Ga y In 1-y As and Al z In 1-z P / Ga y In 1-y As heterojunction deposited on the crystal substrate. G with a Ga composition ratio (x) of 0.51
a 0.51 In 0.49 P and Al 0.52 with Al composition ratio z 0.52
Since In 0.48 P lattice-matches with GaAs, it is convenient to use a semi-insulating GaAs single crystal as the substrate. Due to the characteristics of the Hall element, it is preferable to store x in the range of 0.51 ± 0.02. It is advisable to store z in the range of 0.52 ± 0.02. If x and z exceed this range, they may induce crystal defects in the Ga y In 1-y As that makes these layers heterojunction. High electron mobility is not revealed in a heterojunction system containing a large amount of crystal defects. Therefore, a high-sensitivity heterojunction Hall element cannot be realized. This is because the sensitivity of the Hall element improves in proportion to the electron mobility of the base material.

【0014】Gax In1-x P若しくはAlz In1-z
Pとヘテロ接合させるGay In1-y AsのGa組成比
(y)は0.30から0.40以下とすると良い。yが
大きくなるとGaAsとの格子の不整合性が大きくなる
からである。格子不整合性が増すとGay In1-y As
の結晶性が悪化し、ホール素子の高感度化の妨げとな
る。yは結晶性の劣化が顕著でなく、高い電子移動度が
得られる0.10〜0.40とする。
Ga x In 1-x P or Al z In 1-z
The Ga composition ratio (y) of Ga y In 1-y As to be heterojunction with P is preferably 0.30 to 0.40 or less. This is because the lattice mismatch with GaAs increases as y increases. As the lattice mismatch increases, Ga y In 1-y As
Deteriorates the crystallinity of H.sub.2 and hinders high sensitivity of the Hall element. y is set to 0.10 to 0.40 at which crystallinity is not significantly deteriorated and high electron mobility is obtained.

【0015】上記のヘテロ接合系は、第IV族若しくは第
VI族の元素をドープしたn型GaxIn1-x Pとアンド
ープか第IV族若しくは第VI族の元素をドープしたGay
In1-y Asから構成する。または、珪素を添加したn
型Alz In1-z Pとアンドープか硫黄若しくは珪素を
ドープしたn型Gay In1-y Asとでヘテロ接合を構
成する。
The above heterojunction system is a group IV or group IV
N-type Ga x In 1-x P doped with Group VI element and Ga y undoped or doped with Group IV or Group VI element
It is composed of In 1-y As. Alternatively, n with silicon added
In the type Al z In 1-z P and n-type doped with undoped or sulfur or silicon Ga y In 1-y As constituting the heterojunction.

【0016】本発明に係わるヘテロ接合を構成するに際
し、元素周期律表の第IV族若しくは第VI族の元素をドー
プしたn型Gax In1-x Pとアンドープか第IV族若し
くは第VI族の元素をドープしたGay In1-y Asとで
ヘテロ接合を構成する。n型Gax In1-x PやGay
In1-y Asを得るに適した第IV族若しくは第VI族のド
ーパントとしては、Si,SやSe等がある。これらの
ドーパントを添加してn型のGax In1-x Pを得る場
合、キャリア濃度としては1017〜1018cm-3とすると
高移動度化に適する。このn型Gax In1-x Pとヘテ
ロ接合させるGay In1-y Asはアンドープか上記の
ドーパントを添加したn型とする。高移動度を得るため
には、Gay In1-y Asのキャリア濃度としては10
16cm-3前後が適する。
In constructing the heterojunction according to the present invention, n-type Ga x In 1-x P doped with an element of group IV or group VI of the periodic table of elements and undoped or group IV or group VI A heterojunction is formed with Ga y In 1-y As doped with the element. n-type Ga x In 1-x P or Ga y
Suitable Group IV or Group VI dopants for obtaining In 1-y As include Si, S, and Se. When n-type Ga x In 1-x P is obtained by adding these dopants, a carrier concentration of 10 17 to 10 18 cm -3 is suitable for high mobility. The Ga y In 1-y As for heterojunction with the n-type Ga x In 1-x P is undoped or n-type doped with the above dopant. In order to obtain high mobility, the carrier concentration of Ga y In 1-y As is 10
Around 16 cm -3 is suitable.

【0017】n型Gay In1-y Asとのヘテロ接合さ
せるn型Alz In1-z Pを得るには、ドーパントとし
てSiを利用する。周期律表の第VI族のSとSe等を含
む硫化水素(H2 S)やセレン化水素(H2 Se)等の
ドーピングガスを使用してn型のGay In1-y Asが
得られるが、例えばトリメチルAl((CH33
l)等のAl源となる有機化合物と気相反応を起こし、
結晶表面のモホロジーを悪化させる。Siドープのn型
Alz In1-z Pとヘテロ接合させるn型GayIn
1-y Asは、アンドープかS若しくはSiをドープした
n型層とする。ヘテロ接合を構成するAlz In1-z
とGay In1-y Asのキャリア濃度は1017〜1018
cm-3と1016cm-3前後に各々、設定すると高移動度が得
られる。
In order to obtain an n-type Al z In 1-z P heterojunction with n-type Ga y In 1-y As, Si is used as a dopant. N-type Ga y In 1-y As was obtained by using a doping gas such as hydrogen sulfide (H 2 S) containing S and Se of Group VI of the periodic table and hydrogen selenide (H 2 Se). For example, trimethyl Al ((CH 3 ) 3 A
l) causes a gas phase reaction with an organic compound serving as an Al source,
It deteriorates the morphology of the crystal surface. N-type Si-doped Al z In 1-z P and n-type is heterozygous Ga y an In
1-y As is an n-type layer undoped or doped with S or Si. Al z In 1-z P forming a heterojunction
And Ga y In 1-y As have carrier concentrations of 10 17 to 10 18
High mobilities can be obtained by setting cm -3 and 10 16 cm -3 respectively.

【0018】Gax In1-x P若しくはAlz In1-z
PとGay In1-y Asの積層の順序には制限はない。
しかし、単一ヘテロ構造とする場合には一般的にはGa
x In1-x PかAlz In1-z Pを基板上やGaAs緩
衝層上に先ず、堆積する。これらの混晶層上によりバン
ドギャップが小さいGay In1-y Asを堆積する。バ
ンドギャップがGay In1-y Asより大きなGax
1-x PやAlz In1-z Pを最表層とすると、入・出
力電極にオーミック性を付与するに困難が伴うからであ
る。
Ga x In 1-x P or Al z In 1-z
There is no limitation on the stacking order of P and Ga y In 1-y As.
However, when a single heterostructure is used, Ga is generally
x In 1-x P or Al z In 1-z P firstly on or GaAs buffer layer on the substrate, it is deposited. Ga y In 1-y As having a small band gap is deposited on these mixed crystal layers. Ga x I having a larger band gap than Ga y In 1-y As
This is because if n 1-x P or Al z In 1-z P is used as the outermost layer, it is difficult to impart ohmic properties to the input / output electrodes.

【0019】上記のGay In1-y As等のヘテロ接合
構成層は、液相エピタキシャル成長法(LPE法)、分
子線エピタキシャル成長法(MBE法)や有機金属熱分
解法(MOVPE法)等で成長できる。或はまたMOV
PEとMBEの双方を複合させたMO・MBE法でも得
られる。
The heterojunction constituent layer such as Ga y In 1 -y As is grown by a liquid phase epitaxial growth method (LPE method), a molecular beam epitaxial growth method (MBE method), a metal organic thermal decomposition method (MOVPE method), or the like. it can. Or MOV again
It can also be obtained by the MO / MBE method in which both PE and MBE are combined.

【0020】[0020]

【作用】ヘテロ接合材料を利用してホール素子を作るに
際し、ヘテロ接合を構成する材料のバンドギャップを規
定することにより、小さな温度係数と高い電子移動度を
得る。
When a Hall element is manufactured using a heterojunction material, a small temperature coefficient and high electron mobility are obtained by defining the bandgap of the material forming the heterojunction.

【0021】[0021]

【実施例】本発明を実施例を基に詳細に説明する。図1
は本発明に係わるGax In1-xAs(xはGaの組成
比を表す。)ホール素子の平面模式図である。また、図
2は図1に示す破線A−A′の方向の断面模式図であ
る。本実施例では、比抵抗が約107 Ω・cmの面方位
{100}の半絶縁性GaAs単結晶を基板(101)
として使用した。
EXAMPLES The present invention will be described in detail based on examples. FIG.
FIG. 3 is a schematic plan view of a Ga x In 1-x As (x represents a Ga composition ratio) Hall element according to the present invention. 2 is a schematic cross-sectional view taken along the broken line AA ′ shown in FIG. In this example, a semi-insulating GaAs single crystal having a surface resistance of {100} and a specific resistance of about 10 7 Ω · cm was used as a substrate (101).
Used as.

【0022】基板(101)上には、高抵抗のアンドー
プGaAs層を緩衝層(102)として堆積させた。緩
衝層(102)の厚さは約100nmとした。
On the substrate (101), a high resistance undoped GaAs layer was deposited as a buffer layer (102). The thickness of the buffer layer (102) was about 100 nm.

【0023】緩衝層(102)上には、感磁層としてS
iをドープしたn型のAl0.52In0.48P層(103)
を設けた。同層のバンドギャップエネルギーは2.51
eVであり、キャリア濃度をHall効果法により測定し
た結果、約1×1018cm-3であった。Siのドーピング
にはモノシランガス(SiH4 )を使用した。膜厚は2
5nmとした。
On the buffer layer (102), S is used as a magnetic sensing layer.
i-doped n-type Al 0.52 In 0.48 P layer (103)
Was provided. Bandgap energy of the same layer is 2.51
It was eV, and as a result of measuring the carrier concentration by the Hall effect method, it was about 1 × 10 18 cm −3 . Monosilane gas (SiH 4 ) was used for Si doping. The film thickness is 2
It was set to 5 nm.

【0024】Al0.52In0.48P層(103)上には、
アンドープでn型のGa0.82In0.18As感磁層(10
4)を堆積した。同層のバンドギャップエネルギーは
1.23eVであり、キャリア濃度は5×1016cm-3
し、膜厚は700nmとした。この結果ヘテロ接合をなす
n型Al0.52In0.48P層(103)とn型Ga0.82
0.18As感磁層(104)とのバンドギャップエネル
ギー差は1.28eVとなった。
On the Al 0.52 In 0.48 P layer (103),
Undoped n-type Ga 0.82 In 0.18 As magneto-sensitive layer (10
4) was deposited. The band gap energy of the same layer was 1.23 eV, the carrier concentration was 5 × 10 16 cm −3 , and the film thickness was 700 nm. As a result, n-type Al 0.52 In 0.48 P layer (103) and n-type Ga 0.82 I forming a heterojunction are formed.
The band gap energy difference from the n 0.18 As magnetosensitive layer (104) was 1.28 eV.

【0025】上記の半導体層は全て常圧のMOVPE法
で成長させた。In源としてはシクロペンタジエニルI
n(C5 5 In)を使用した。Ga,Alの原料には
各々トリメチルGaとトリメチルAlを使用した。As
源、P源はアルシン(AsH3 )、ホスフィン(PH
3 )とした。成長温度は660℃に固定した。
All the above semiconductor layers were grown by the MOVPE method under normal pressure. Cyclopentadienyl I as In source
n (C 5 H 5 In) was used. Trimethyl Ga and trimethyl Al were used as the raw materials of Ga and Al, respectively. As
Source, P source is arsine (AsH 3 ), phosphine (PH
3 ) and. The growth temperature was fixed at 660 ° C.

【0026】次に、Ga0.82In0.18As感磁層(10
4)の表面を通常の有機フォトレジスト材で被覆し、そ
の後公知のフォトリソグラフィー技術とエッチング技術
を駆使し、入・出力電極を形成すべき領域並びに感磁部
となす領域をメサ形状に加工した。
Next, the Ga 0.82 In 0.18 As magnetosensitive layer (10
The surface of 4) was covered with a normal organic photoresist material, and then the well-known photolithography technology and etching technology were used to process the regions where the input / output electrodes were to be formed and the regions to be the magnetic sensitive parts into mesa shapes. .

【0027】その後、Ga0.82In0.18As感磁層(1
04)の表面を再び有機レジスト材で全面を被覆した。
次に各々、一対をなす入力電極(105)と出力電極
(106)の形成領域に存在する上記レジスト材のみを
公知のフォトリソグラフィー技術を利用して除去し、G
0.82In0.18As感磁層(104)の表面を露出させ
た。その上にGeを重量で約13%程度含むAu・Ge
合金を真空蒸着した。蒸着後、当該ウエハを有機溶剤混
合液に浸し、レジスト材によるリフトオフ法で素子の製
作上、不要となるAu・Ge合金膜を除去した。次に、
オーミック性電極を得るために電極となる合金膜を被着
させたウエハを温度420℃で数分間、熱処理(アロイ
ング)した。
After that, the Ga 0.82 In 0.18 As magnetosensitive layer (1
The surface of 04) was coated again with the organic resist material.
Next, only the resist material existing in the formation regions of the pair of input electrodes (105) and output electrodes (106) is removed by using a known photolithography technique, respectively.
The surface of the a 0.82 In 0.18 As magnetosensitive layer (104) was exposed. Au / Ge containing about 13% by weight of Ge on it
The alloy was vacuum deposited. After the vapor deposition, the wafer was dipped in an organic solvent mixed solution, and the Au.Ge alloy film which was unnecessary for manufacturing the element was removed by a lift-off method using a resist material. next,
The wafer to which an alloy film to be an electrode was applied in order to obtain an ohmic electrode was heat-treated (alloyed) at a temperature of 420 ° C. for several minutes.

【0028】更に、当該入・出力用の電極(105及び
106)と電気的に連結させてパッド電極(107)を
各電極に設けた。該パッド電極(107)は、上記の如
くメサエッチングにより露出させたGaAs単結晶基板
(101)の表層部に載置させた。これは電極のアロイ
ング時に感磁層に直接歪が掛かるのを防止するためであ
る。
Further, a pad electrode (107) is provided on each electrode by being electrically connected to the input / output electrodes (105 and 106). The pad electrode (107) was placed on the surface layer of the GaAs single crystal substrate (101) exposed by mesa etching as described above. This is to prevent the magnetosensitive layer from being directly strained when the electrodes are alloyed.

【0029】製作したホール素子の積感度は540V/
A・Tであり、従来のGaAsホール素子の約2から3
倍の積感度が得られた。また、αは従来のヘテロ接合ホ
ール素子より小さく0.07%/℃であった。図3に点
Aとして示す。このαは従来のGaAsのそれとほぼ同
等であった。
The product sensitivity of the manufactured Hall element is 540 V /
AT, which is about 2 to 3 of the conventional GaAs Hall element.
Double product sensitivity was obtained. Further, α was 0.07% / ° C, which was smaller than that of the conventional heterojunction Hall element. This is shown as point A in FIG. This α was almost the same as that of conventional GaAs.

【0030】[0030]

【発明の効果】ヘテロ接合ホール素子の感度を向上さ
せ、特性の温度変化を低く抑制する効果がある。
The effect of the present invention is to improve the sensitivity of the heterojunction Hall element and suppress the temperature change of the characteristics to a low level.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係わるホール素子の平面模式図であ
る。
FIG. 1 is a schematic plan view of a Hall element according to the present invention.

【図2】図1の破線A−A′に沿った直線断面の模式図
である。
FIG. 2 is a schematic diagram of a linear cross section taken along a broken line AA ′ in FIG.

【図3】ヘテロ接合のバンドギャップ差と温度係数の関
係を示す図である。
FIG. 3 is a diagram showing a relationship between a band gap difference of a heterojunction and a temperature coefficient.

【符号の説明】[Explanation of symbols]

(101) 基板 (102) 緩衝層 (103) Al0.52In0.48P層 (104) Ga0.82In0.18As感磁層 (105) 入力電極 (106) 出力電極 (107) パッド電極 (108) 酸化膜 (109) ダイシングライン(101) Substrate (102) Buffer layer (103) Al 0.52 In 0.48 P layer (104) Ga 0.82 In 0.18 As Magnetosensitive layer (105) Input electrode (106) Output electrode (107) Pad electrode (108) Oxide film ( 109) Dicing line

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 半導体結晶基板上に禁止帯幅の差が0.
64eV以上である半導体からなるヘテロ接合を具備して
なることを特徴とするホール素子。
1. A semiconductor crystal substrate having a bandgap difference of 0.
A Hall element comprising a heterojunction made of a semiconductor having a voltage of 64 eV or more.
【請求項2】 ヘテロ接合がGa組成比(x)が0.4
9以上0.53以下のGax In1-x PとGa組成比
(y)が0.10以上0.40以下であるGay In
1-y Asとからなることを特徴とする請求項1に記載の
ホール素子。
2. The Ga composition ratio (x) of the heterojunction is 0.4.
9 above 0.53 following Ga x In 1-x P and Ga composition ratio (y) is 0.10 to 0.40 Ga y an In
The Hall element according to claim 1, which is composed of 1-yAs .
【請求項3】 ヘテロ接合がAl組成比(z)が0.5
0以上0.54以下のAlz In1-z PとGa組成比
(y)が0.10以上0.40以下であるGay In
1-y Asとからなることを特徴とする請求項1に記載の
ホール素子。
3. The Al composition ratio (z) of the heterojunction is 0.5.
Al z In 1-z P of 0 or more and 0.54 or less and Ga y In having a Ga composition ratio (y) of 0.10 or more and 0.40 or less
The Hall element according to claim 1, which is composed of 1-yAs .
【請求項4】 ヘテロ接合が周期律表の第IV族若しくは
第VI族の元素をドープしたn型Gax In1-x Pとアン
ドープ若しくは第IV族若しくは第VI族の元素をドープし
たGay In1-y Asを含むことを特徴とする請求項2
に記載のホール素子。
4. An n-type Ga x In 1-x P whose heterojunction is doped with an element of group IV or group VI of the periodic table and Ga y which is undoped or doped with an element of group IV or group VI. 3. In 1-y As is included.
Hall element described in.
【請求項5】 ヘテロ接合が珪素を添加したn型Alz
In1-z Pとアンドープ若しくは硫黄若しくは珪素をド
ープしたn型Gay In1-y Asを含むことを特徴とす
る請求項3に記載のホール素子。
5. An n-type Al z heterojunction doped with silicon
In 1-z P and the Hall element according to claim 3, characterized in that it comprises an undoped or sulfur or silicon-doped n-type Ga y In 1-y As.
【請求項6】 ホール出力電圧の温度係数の絶対値が
0.1%/℃以下であるヘテロ接合を具備してなること
を特徴とするホール素子。
6. A Hall element comprising a heterojunction having an absolute value of the temperature coefficient of the Hall output voltage of 0.1% / ° C. or less.
JP23767494A 1994-09-30 1994-09-30 Hall element Expired - Lifetime JP3567500B2 (en)

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JP3567500B2 JP3567500B2 (en) 2004-09-22

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107195772A (en) * 2014-06-17 2017-09-22 旭化成微电子株式会社 Hall sensor

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6110886B2 (en) * 2014-06-17 2017-04-05 旭化成エレクトロニクス株式会社 Hall sensor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107195772A (en) * 2014-06-17 2017-09-22 旭化成微电子株式会社 Hall sensor
CN107195772B (en) * 2014-06-17 2019-06-25 旭化成微电子株式会社 Hall sensor

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