JP2621854B2 - High mobility transistor - Google Patents

High mobility transistor

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Publication number
JP2621854B2
JP2621854B2 JP60116385A JP11638585A JP2621854B2 JP 2621854 B2 JP2621854 B2 JP 2621854B2 JP 60116385 A JP60116385 A JP 60116385A JP 11638585 A JP11638585 A JP 11638585A JP 2621854 B2 JP2621854 B2 JP 2621854B2
Authority
JP
Japan
Prior art keywords
concentration
gaas
mobility
layer
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60116385A
Other languages
Japanese (ja)
Other versions
JPS61276267A (en
Inventor
美代子 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60116385A priority Critical patent/JP2621854B2/en
Publication of JPS61276267A publication Critical patent/JPS61276267A/en
Application granted granted Critical
Publication of JP2621854B2 publication Critical patent/JP2621854B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、ヘテロ接合を有する半導体デバイスに係
り、特に、ヘテロ接合構造を有する高移動度トランジス
タに関する。
Description: TECHNICAL FIELD The present invention relates to a semiconductor device having a heterojunction, and more particularly, to a high mobility transistor having a heterojunction structure.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

高速で動作するトランジスタ及びマイクロ波領域で動
作するトランジスタとして、高移動度トランジスタが有
望視され、開発されつつある。
As a transistor that operates at a high speed and a transistor that operates in a microwave region, a high-mobility transistor is regarded as promising and is being developed.

この素子は、半絶縁性の基板例えば比抵抗106Ωcm以
上のGaAs基板上に、低不純物濃度のGaAs層を能動層とし
て成長し、その後n型AlGaAs層を成長して、ヘテロ界面
(GaAs/AlGaAs)のGaAs側に2次元電子ガスを形成し
て、高移動度トランジスタ用ウェハとして用いる。又、
移動度を上げるために、低不純物GaAs層と、n型AlGaAs
層の間に、ごく薄く低不純物AlGaAs層を成長することが
ある。この場合、GaAs側に蓄積する2次元電子の移動度
は上昇するが、その濃度は低下する。
In this device, a low impurity concentration GaAs layer is grown as an active layer on a semi-insulating substrate, for example, a GaAs substrate having a specific resistance of 10 6 Ωcm or more, and then an n-type AlGaAs layer is grown to form a heterointerface (GaAs / GaAs). A two-dimensional electron gas is formed on the GaAs side of (AlGaAs) and used as a wafer for a high mobility transistor. or,
To increase mobility, a low impurity GaAs layer and n-type AlGaAs
Very thin, low impurity AlGaAs layers may be grown between the layers. In this case, the mobility of the two-dimensional electrons accumulated on the GaAs side increases, but the concentration decreases.

トランジスタは室温で動作させる場合と、低温で動作
させる場合がある。低温で動作させる場合、低不純物Al
GaAs層を成長させることになる移動度の上昇率は、濃度
の低下率より大きい。しかし室温では移動度の上昇率
は、濃度の低下率に比べ小さい。従って、室温で動作さ
せるトランジスタを作成する際は、低不純物AlGaAs層を
成長させないことが多い。しかし2次元電子ガスの移動
度を下げずに、更に2次元電子ガスを増大させることが
望まれている。
The transistor may be operated at room temperature or may be operated at low temperature. When operating at low temperature, low impurity Al
The rate of increase in mobility that will grow the GaAs layer is greater than the rate of decrease in concentration. However, at room temperature, the rate of increase in mobility is smaller than the rate of decrease in concentration. Therefore, when fabricating a transistor operating at room temperature, a low impurity AlGaAs layer is often not grown. However, it is desired to further increase the two-dimensional electron gas without lowering the mobility of the two-dimensional electron gas.

〔発明の目的〕[Object of the invention]

この発明は、上述した2次元電子ガスの移動度を大巾
に低下させず、且つ2次元電子ガスの濃度を増大させる
ことのできる構造の高移動度トランジスタを提供するこ
とを目的とする。
An object of the present invention is to provide a high-mobility transistor having a structure capable of increasing the concentration of the two-dimensional electron gas without significantly reducing the mobility of the two-dimensional electron gas described above.

〔発明の概要〕[Summary of the Invention]

本発明の構造は、例えば高抵抗低不純物GaAs層、1017
cm-3以上の高濃度のn型不純物を含み2次元電子ガスが
形成される極く薄いGaAs層、1017cm-3以上の高濃度のn
型不純物を含む電流供給層としてのAlGaAs層から構成さ
れる。すなわち本発明は、電流供給層に隣接する部分に
極く薄い層が形成されて電流供給層とヘテロ接合を形成
し、しかもこの層に電流供給層と同じ導電型の不純物が
高濃度にドーピングされている。そしてこの層に2次元
電子ガスが形成される。この構造図を第1図に示す。
The structure of the present invention is, for example, a high resistance low impurity GaAs layer, 10 17
an extremely thin GaAs layer containing a high-concentration n-type impurity of not less than cm -3 and forming a two-dimensional electron gas; n having a high concentration of not less than 10 17 cm -3
It is composed of an AlGaAs layer as a current supply layer containing a type impurity. That is, according to the present invention, an extremely thin layer is formed in a portion adjacent to the current supply layer to form a heterojunction with the current supply layer, and furthermore, this layer is doped with impurities of the same conductivity type as the current supply layer at a high concentration. ing. Then, a two-dimensional electron gas is formed in this layer. This structural diagram is shown in FIG.

いま、極く薄い高濃度のn型不純物を含むGaAs層がな
い場合と、ある場合(100A,200A)の室温における2次
元電子濃度nsと移動度μを第2図に示す。高濃度n型不
純物を含むGaAs層のn型不純物濃度は1.5×1017cm-3,高
濃度n型不純物を含むAlGaAs層のn型不純物濃度は1×
7017cm-3その厚さは2000Åである。高抵抗低不純物GaAs
層の不純物濃度はP型で1×1013cm-3である。
FIG. 2 shows the two-dimensional electron concentration ns and the mobility μ at room temperature when there is no extremely thin GaAs layer containing a high concentration of n-type impurity and when there is a GaAs layer containing the n-type impurity at a high concentration (100 A, 200 A). The n-type impurity concentration of the GaAs layer containing a high concentration n-type impurity is 1.5 × 10 17 cm −3 , and the n-type impurity concentration of the AlGaAs layer containing a high concentration n-type impurity is 1 ×
70 17 cm -3 Its thickness is 2000mm. High resistance low impurity GaAs
The impurity concentration of the layer is 1 × 10 13 cm −3 of P type.

高濃度のn型不純物を含むGaAs層が厚くなる程nsは増
大し、μは低下している。nsの増大とμの低下とどちら
の効果が大きいを調べるために、ns×μを第3図に示し
た。ns×μは高濃度のn型不純物を含むGaAs層の厚さd
が大きくなる程、大きくなっていることがわかる。
As the GaAs layer containing a high concentration of n-type impurity becomes thicker, ns increases and μ decreases. FIG. 3 shows ns.times..mu. in order to examine which effect, the increase in ns or the decrease in .mu., is greater. ns × μ is the thickness d of the GaAs layer containing a high concentration of n-type impurities.
It can be seen that the larger the is, the larger it is.

つまり、μが低下する効果より、nsが大きくなる効果
の方が大きいことがわかる。
That is, it can be seen that the effect of increasing ns is greater than the effect of decreasing μ.

〔発明の効果〕〔The invention's effect〕

通常ヘテロ接合を有する高移動度トランジスタでは、
その2次元電子濃度は、2×1012cm-2を超えることがで
きない。これに対し、本発明のような構造をとると、高
濃度の不純物を含むGaAs層の厚さを厚くすることにより
2×1012cm-2を超える2次元電子濃度を得ることができ
る。このことにより、トランジスタのゲインは大きくな
り、更に、パワーの増大によりパワートランジスタに応
用することができる。
In a high mobility transistor that usually has a heterojunction,
Its two-dimensional electron concentration cannot exceed 2 × 10 12 cm −2 . On the other hand, with the structure according to the present invention, a two-dimensional electron concentration exceeding 2 × 10 12 cm −2 can be obtained by increasing the thickness of the GaAs layer containing a high concentration of impurities. As a result, the gain of the transistor increases, and the transistor can be applied to a power transistor by increasing the power.

〔発明の実施例〕(Example of the invention)

以下、上述した本発明の実施例を図面に基づいて説明
する。第4図は本発明を説明するためのエピタキシャル
ウェハーの構成図である。11は半絶縁性(100)GaAs基
板、12〜15はその上に分子線エピタキシによって成長し
たエピタキシャル層である。12は、厚さ1μmのアンド
ープGaAs層である。13は、Siを1.5×1017cm-3dopingし
たGaAsで、厚さ200Åである。14はGaAlAsからなる電子
供給層で、Siが1×1017cm-3dopingされていて、厚さは
2000Åある。15はキャップ層で、アンドープGaAs(200
Å)である。この構造のウェハーを用いて、ホール効果
により、電子濃度と電子移動度を室温で測定した。その
結果、2次元電子濃度はns=7.9×1011cm-2、電子移動
度μ=4622cm2V-1sec-1を得た。又、第4図に対し、(S
i−doped GaAs層3)を入れなかった場合のウェハーを
用いて、2次元電子ガスの濃度と移動度を測定した。そ
の結果、ns=4.6×1011cm-2,μ=6513cm2・V-1sec-1
得、本発明の構造に比べ、nsが劣ることが示された。
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 4 is a structural view of an epitaxial wafer for explaining the present invention. 11 is a semi-insulating (100) GaAs substrate, and 12 to 15 are epitaxial layers grown thereon by molecular beam epitaxy. Reference numeral 12 denotes an undoped GaAs layer having a thickness of 1 μm. 13 is GaAs obtained by doping 1.5 × 10 17 cm −3 of Si, and has a thickness of 200 °. 14 is an electron supply layer made of GaAlAs, in which Si is doped at 1 × 10 17 cm −3, and has a thickness of
There are 2000Å. 15 is a cap layer, which is undoped GaAs (200
Å). Using the wafer having this structure, the electron concentration and the electron mobility were measured at room temperature by the Hall effect. As a result, two-dimensional electron concentration was obtained ns = 7.9 × 10 11 cm -2 , the electron mobility μ = 4622cm 2 V -1 sec -1 . In addition, (S
Using the wafer without the i-doped GaAs layer 3), the concentration and mobility of the two-dimensional electron gas were measured. As a result, ns = 4.6 × 10 11 cm -2, to obtain a μ = 6513cm 2 · V -1 sec -1, compared with the structure of the present invention, ns is the poor indicated.

〔発明の他の実施例〕[Another embodiment of the invention]

本発明ではGaAsとAlGaAsのヘテロ接合を用いたが、他
のヘテロ接合であってもよい。又、ドーパントとして、
Siを選んだが、他のn型ドーパントであっても、又、他
のp型ドーパントであってもよい。
In the present invention, a hetero junction of GaAs and AlGaAs is used, but another hetero junction may be used. Also, as a dopant,
Although Si was selected, it may be another n-type dopant or another p-type dopant.

【図面の簡単な説明】[Brief description of the drawings]

第1図は、本発明の基本構成を説明するための断面構造
図、第2図及び第3図は、従来時の方法を採用した場合
と本発明方法を採用した場合の効果の相違を説明するた
めの図、第4図は、本発明による一実施例を説明するた
めの図である。 1〜高抵抗低不純物GaAs層、 2〜高濃度のn型不純物を含むGaAs層、 3〜高濃度のn型不純物を含むAlGaAs層。
FIG. 1 is a sectional structural view for explaining the basic structure of the present invention, and FIGS. 2 and 3 illustrate the difference between the effects obtained when the conventional method is adopted and when the present method is adopted. FIG. 4 is a diagram for explaining an embodiment according to the present invention. 1 GaAs layer containing high resistance and low impurity, 2 GaAs layer containing high concentration of n-type impurity, 3 AlGaAs layer containing high concentration of n-type impurity.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】2つの層から形成されるヘテロ接合を有す
る高移動度トランジスタにおいて、電子供給層に隣接し
2次元電子ガスが形成される部分に、前記電子供給層と
同じ導電型の不純物が高濃度にドーピングされているこ
とを特徴とする高移動度トランジスタ。
In a high mobility transistor having a heterojunction formed of two layers, an impurity of the same conductivity type as that of the electron supply layer is formed in a portion where a two-dimensional electron gas is formed adjacent to the electron supply layer. A high mobility transistor characterized by being highly doped.
JP60116385A 1985-05-31 1985-05-31 High mobility transistor Expired - Lifetime JP2621854B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60116385A JP2621854B2 (en) 1985-05-31 1985-05-31 High mobility transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60116385A JP2621854B2 (en) 1985-05-31 1985-05-31 High mobility transistor

Publications (2)

Publication Number Publication Date
JPS61276267A JPS61276267A (en) 1986-12-06
JP2621854B2 true JP2621854B2 (en) 1997-06-18

Family

ID=14685706

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60116385A Expired - Lifetime JP2621854B2 (en) 1985-05-31 1985-05-31 High mobility transistor

Country Status (1)

Country Link
JP (1) JP2621854B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5016064A (en) * 1989-09-25 1991-05-14 Motorola, Inc. Quantom well structure having enhanced conductivity
EP0531550B1 (en) * 1991-03-28 1997-12-29 Asahi Kasei Kogyo Kabushiki Kaisha Field effect transistor

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2465317A2 (en) * 1979-03-28 1981-03-20 Thomson Csf FIELD EFFECT TRANSISTOR WITH HIGH BREAKAGE FREQUENCY

Also Published As

Publication number Publication date
JPS61276267A (en) 1986-12-06

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