JP3287054B2 - Magnetoelectric conversion element - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Hall element which uses a group III-V compound semiconductor as a crystal layer (referred to as a magneto-sensitive layer) which functions to detect a magnetic field. The present invention relates to a high-sensitivity Hall element provided with an indium (GaInAs) layer as a magnetic sensing layer.

[0002]

2. Description of the Related Art A hole (Ha) is used as one of so-called magneto-electric conversion elements for detecting a magnetic field and converting the intensity into an electric signal.
11) Elements are known. The Hall element usually includes a simple (element) semiconductor belonging to Group IV of the periodic rule such as silicon (Si) and germanium (Ge), and a periodic rule such as gallium arsenide (GaAs) and indium arsenide (InAs). III-V group 2 obtained by combining group III and group V elements
Original compound semiconductors or a mixture of them (mixed crystal)
Semiconductors are used. Regardless of which semiconductor material is used, a Hall element is a type of device that utilizes a Hall (Hall) voltage generated by the movement of electrons in these semiconductors when a magnetic field is applied to the semiconductor material constituting the Hall element. It is a sensor that has been widely used in industry as a rotation sensor and position sensor.

As described above, in addition to a simple substance semiconductor of Si as described above, indium antimonide (InSb), InAs
Although a III-V compound semiconductor such as GaAs or GaAs is also used, in an actual Hall element, for example, an InSb bulk crystal itself has a function of detecting the magnetism of the Hall element as seen in an InSb Hall element. (Magnetic sensing part)
In many cases, VPE (Va (Va) is applied by ion implantation into a high-resistance semiconductor single crystal substrate such as a GaAs Hall element, or on a similar single crystal substrate.
por Phase Epitaxy), MOVPE (Metal-Organiic V)
Also called apor Phase Epitaxy, MOCVD, OMVPE. ), Vapor phase epitaxial growth methods such as MBE (Molecular Beam Epitaxy) and liquid phase epitaxial growth (L
A semiconductor layer formed by the (PE) method is used as a magnetic sensing part.

[0004] The magneto-sensitive part made of these semiconductor layers is an important part that bears various characteristics of the Hall element. In particular, in the case of a so-called high-sensitivity (high product sensitivity) Hall element having a high magnetic field detecting ability, a semiconductor material having a large Hall coefficient, which is one of the physical properties of a semiconductor, is selected for the magnetic sensing portion. There is a need. The Hall coefficient is also proportional to the electron mobility of the semiconductor material, and the larger the electron mobility, the larger the Hall coefficient is obtained, which promotes the realization of a highly sensitive Hall element.

For this reason, recently, instead of a conventional Hall element using a binary III-V compound semiconductor material such as GaAs or InSb made of two elements as a magnetically sensitive part, a different three element is used.
A hetero-junction is formed by using a multi-element (multi-element) mixed crystal of a group III-V compound semiconductor composed of one or four elements, thereby retaining a high electron mobility, thereby providing a high sensitivity Hall element. Attempts have been made to use them as new materials. By providing such a heterojunction, new physical properties not found in each single semiconductor material forming the heterojunction can be obtained, and the electron mobility can be improved in some cases.

Gallium (Ga) and indium (In), which are Group III elements of the periodic table, and arsenic (A) of Group V
Gas In1-x As (x indicates a mixed crystal ratio (composition ratio)) is also one of the group III-V compound semiconductor mixed crystals, and has a high mobility by forming a heterojunction with InP. Is fulfilled (for example, Kenjiro Onuma et al., 199
2nd Autumn 53rd JSAP Symposium Preprints N
o. 1 (published by the Japan Society of Applied Physics), lecture number 18a-ZE-
3, p. 283), and recently, the GaInAs / InP
Attempts have also been made to obtain novel compound semiconductor Hall elements with higher sensitivity than ever before using heterojunction materials (Okuyama Shinobu, et al., Proceedings of the 53rd JSAP Autumn Meeting, 1992 No. .3 (issued by the Japan Society of Applied Physics, 1992), Lecture Number 16a-SZC-16, 1078
page).

The above heterojunction is specifically composed of an InP buffer layer and a GaInAs layer deposited on a high-resistance semi-insulating InP single crystal substrate to which Fe is added (Shinobu Okuyama et al., 1992) Proceedings of the 53rd JSAP Autumn Meeting No.3, Lecture No. 16a-SZ
C-16, p. 1078). As described above, in the conventional example, an InP crystal layer exhibiting n-type conduction is often used as a buffer layer. However, originally, a buffer layer for a Hall element is used to transfer a GaInAs magnetosensitive layer from an InP buffer layer to an InP buffer layer. It is desirable that the resistance is high in order to prevent the leakage of the operating current. However, when such a binary InP crystal layer is used as a buffer layer, there is an advantage that troublesome control of a mixed crystal ratio (composition ratio) as observed in the growth of a multi-element mixed crystal can be avoided. However, InP usually has a drawback in that it does not intentionally doping impurities, that is, it exhibits n-type conduction even in a so-called undoped state, and is unlikely to have high resistance.

When such a crystal layer having incomplete electrical insulation is used as a buffer layer, and when an operating current for operating a Hall element is passed, a leak (leak) of the operating current to the buffer layer occurs. ) Occurs, and reliable device operation cannot be achieved in many cases.

[0009]

SUMMARY OF THE INVENTION In view of the above-mentioned disadvantages of the prior art, the present invention has found a new measure for preventing unnecessary leakage of operating current from a semiconductor crystal layer serving as a magnetic sensing portion, and has found a stable measure for a Hall element. The purpose of the present invention is to make it possible to realize a Hall element having a higher sensitivity than ever before as well as to obtain an efficient operation.

[0010]

That is, the present invention provides a GaIn
In a Hall element having an As layer as a magnetic sensing layer, a single element as in the related art is provided between the magnetic sensing layer and the high-resistance InP substrate used for depositing the magnetic sensing layer. Instead of a single crystal layer made of a compound semiconductor material, each has a thickness of 1n
m to 100 nm and a carrier concentration of 1 × 10 ¹⁵
By inserting a buffer layer formed by alternately laminating crystal layers made of two kinds of semiconductor materials having different band gaps of less than cm ^-3 , the leak current is extremely small, which is one of the characteristics of the Hall element. An object of the present invention is to provide a novel Hall element that suppresses an increase in the unbalance rate and has high reliability.

Usually, when a heterojunction made of GaInAs and AlInAs is formed in consideration of application to a high-sensitivity Hall element, a semi-insulating material having a high semi-insulating property is required from the viewpoints of lattice matching and the need for electrical insulation. A resistive InP single crystal substrate is used. In practice, it is common to use an InP substrate having a specific resistance of about 10 ⁶ Ω · cm or more, and these are used in a liquid encapsulation method (Liquid Encapsulated Czochralski;
It can be easily manufactured by a vertical Bridgman method called LEC method or VB (Vertical Bridgman) method and the like, and there is no difficulty in obtaining the material when implementing the present invention.

On such a high-resistance InP substrate, InP, A
l _x In ₁ -x As and Ga _x In ₁ -x As (x each indicate a mixed crystal ratio, and usually from the viewpoint of lattice matching degree.
4 ≦ x ≦ ４0.6 is desirable. Grow). These growth methods are not particularly limited, and may be based on a liquid phase epitaxial growth (LiPE) method or a molecular beam epitaxial growth method (Molecular Beam). Epita
xial; MBE method) or a metal organic decomposition vapor phase growth method, the so-called MOVPE (Me ta l Organic Chemical VaporDepositi
on: also called MOCVD, OMCVD or OMVPE method. ) Method, may be I Yi in such as MBE method and MOVPE method MO · MBE method was complex both. However, at present, since an InP crystal containing phosphorus (element symbol P) having a relatively high vapor pressure is used as a substrate, evaporation and separation of P from an InP substrate heated before growing a crystal layer are reduced. The MOVPE method, which is convenient for
Pressure (atmospheric pressure) using cyclopentadienyl indium (C ₅ H ₅ In) having a monovalent valence as a starting material for
By MOCVD, high-quality InP, GaInAs, and the like can be obtained.

[0013] To be more specific, for example, In
When obtaining a laminated crystal layer composed of P and Ga _X In _{1 -X} As (x represents a mixed crystal ratio (composition ratio)), first, a specific thickness is formed on the above-described high-resistance InP single crystal substrate. And a Ga _x In ₁ -x As crystal layer having a carrier concentration are deposited, and then an InP crystal layer having a specific thickness and a carrier concentration is laminated to obtain alternately laminated crystal layers made of these semiconductors. Just do it. In this lamination, the order of deposition is not limited, and the thickness of the crystal layers alternately laminated may be the same or different, and even in the case of a crystal layer made of the same semiconductor material, The film thickness may be changed for each layer to be laminated. The point is that crystal layers made of different semiconductor materials are alternately stacked, and the number of the stacked layers may be considered in consideration of the element-forming process of the Hall element and the like. Similarly, the semiconductor material to be laminated is Ga _x In ₁ -x As.
And Al _X In _1-X As, or InP and Al _X In _1-X A
Even in the case of s, no problem occurs.

However, the thickness of each crystal layer of the semiconductor material constituting the above-mentioned laminated structure is 1 nm or more. this is,
When the film thickness is extremely thin, less than 1 nm, and the number of stacked crystal layers is extremely small, the present inventors have conducted intensive studies and found that Ga _x In of impurities and crystal defects from the InP single crystal substrate. _This is because propagation and diffusion to the _1-X As crystal layer cannot be sufficiently prevented, and a situation that hinders improvement in the quality of the magnetosensitive layer has been caused. Therefore, the minimum film thickness that each semiconductor layer constituting the laminated structure according to the present invention should have at least is 1n.
m. Conversely, the upper limit of the thickness of each semiconductor crystal layer constituting the laminated structure is set to 100 nm to avoid complication of a mesa etching step employed in device fabrication as described later. This is mainly due to the consideration of the device fabrication process. That is, as described above, the total film thickness of the crystal layer having the laminated structure including the hetero junction is approximately 5 μm or less, which is mainly caused by the difference in the etching shape by the mesa etching required for manufacturing the Hall element. This is because there is an advantage that an increase in the unbalance voltage can be prevented, and an increase in the unbalance rate in the element characteristics can be suppressed.

The carrier concentration of each crystal layer forming the laminated structure is less than 10 ¹⁵ cm ^-3 irrespective of the kind of the semiconductor material. This is because by setting the carrier concentration to be low, high resistance is given to the laminated structure, and the leakage of the operating current from the magneto-sensitive layer to the external layer is suppressed. Each different semiconductor materials, if from being depositing one layer as one cycle, typically Ru Oh and enough to provide a laminated structure of two five periods.

With the above structure, the electron mobility of the Hall element wafer is remarkably improved. For this reason, secondary ion mass spectrometry, Auger
) As a result of conducting analysis by various physical analysis methods such as electron spectroscopy and optical analysis methods such as photoluminescence, the electronic action caused by the difference in band gap of each semiconductor material constituting the laminated structure It has been found that the confinement effect due to also contributes to the improvement of the mobility.

A Hall element is manufactured from such a heterojunction material. However, no special device is required for manufacturing the Hall element.
Process into the desired shape by making full use of the processing technology such as etching technology, and then form the ohmic electrode which will be the input electrode for inputting the operating current of the element and the output electrode for outputting the Hall voltage. Specifically, it is only necessary to separate the individual devices through a dicing process. To add a little explanation for the formation of this ohmic electrode step by step,
First, a metal film forming a pair of input and output electrodes is deposited on the surface of the magnetic sensing part material by a vacuum deposition method or the like. In general, in the Hall element, from the viewpoint of electron mobility, a layer exhibiting n-type conduction is used as the magnetosensitive layer,
(Au), which can form an ohmic electrode for the shaped layer
Metal electrode materials such as germanium (Ge) alloys are used exclusively. In the Hall element according to the present invention, the input and output electrodes may be formed in accordance with a normal electrode forming method. Unique technical problems and problems related to the material of the present invention in forming an ohmic electrode are as follows. Not granted. The Au.Ge alloy described above is generally used as the metal material for the ohmic electrode, but it is needless to say that the electrode material is not particularly limited to this. After that, heat treatment is performed so that the deposited metal electrode becomes an ohmic electrode. This heat treatment is generally called an alloying treatment, and the alloying of the Au.Ge alloy is usually performed at a temperature of 4 ° C.
It is carried out at about 00 ° C. for an appropriate time.

The above alloying step can be omitted by providing a layer having a high carrier concentration immediately below the ohmic electrode. For example, in the case of the heterojunction material according to the present invention, 10 ¹⁹ to 10 ²⁰ cm ⁻³ is provided on the magneto-sensitive layer.
A low-resistance GaInAs layer having a high carrier concentration is provided by an epitaxial growth method.
If an alloy is applied, an ohmic electrode can be formed without alloying. Use this method for non-alloycon
BR> tact (non-alloy contact). Alternatively, silicon (Si) or the like may be selectively implanted into the electrode formation region by an ion implantation method instead of the epitaxial growth method to form a low resistance layer having a high carrier concentration. Further, the ion implantation is not limited to the selective region, that is, so-called selective ion implantation.
A non-alloy contact can also be formed by forming a high carrier concentration layer by injecting, for example, and then removing the high carrier concentration layer other than a region to be an electrode portion.

A new Hall element manufactured through the above-described process was subjected to evaluation of electrical characteristics. Further, the characteristics of a conventional Hall element having a simple heterojunction between a GaInAs magnetic sensing layer and a buffer layer made of InP were also evaluated. By comparing the characteristics, in the material according to the present invention, the leak current between the adjacent input electrodes is reduced in the state before the isolation between the adjacent elements by the mesa etching, and the complete isolation is achieved. In addition, since the operating current leaking to the buffer layer is reduced,
It was clearly shown that a Hall element having an extremely low unbalance rate was revealed.

[0020]

By stacking semiconductor materials having different band gaps, unnecessary leakage of operating current can be prevented by utilizing the electron confinement effect, and a high-performance GaInAs Hall element having an extremely low unbalance ratio can be obtained. Can be provided.

[0021]

EXAMPLES The present invention will be described in detail based on examples. FIG.
FIG. 2 is a schematic plan view of a Hall element according to the present invention in which a GaInAs crystal layer and an AlInAs crystal layer are alternately stacked and a heterojunction structure serving as a magnetic sensing portion is provided.
FIG. 2 is an enlarged schematic view of a vertical cross section along the line AA ′ in the schematic plan view shown in FIG . In forming the epitaxial wafer of the structure of the above SL, first semi-insulating high resistance InP single crystal substrate of iron added comprising specific resistance (Fe) is a plane orientation of about ^{10 7 Ω · cm (100)} (1
01), an undoped AlInAs layer (103) was grown as a first layer to a thickness of about 90 nm. The Al
The carrier concentration of the InAs layer (103) is adjusted to a hole (Hal).
l) The result of measurement by the effect method was 10 ¹⁴ cm ^-3 . Thereafter, the carrier concentration of the high resistance AlInAs (103) is 8 × 10 ¹⁴ c as a layer for forming a heterojunction.
Undoped n-type Ga _0.47 with m ⁻³ and mixed crystal ratio of _0.47
In _0.53 As (102) is deposited to a thickness of 10 nm,
A heterojunction composed of aInAs and AlInAs was formed. In this embodiment, a total of five GaInAs crystal layers having such a carrier concentration and a film thickness,
The As crystal layer without a total of six layers is continuously 5 deposited periodically whether we <br/> consisting buffer (buffer) layer. The outermost surface of this buffer layer is AlIn as shown in the enlarged schematic cross-sectional view of FIG.
As (103). In this embodiment, an AlInAs crystal layer was first deposited on the InP substrate, and a total of six crystal layers were provided. However, the order of deposition of the crystal layers and the number of crystal layers to be laminated are not limited thereto. There is no harm in depositing the layer first and then depositing the AlInAs crystal layer. However, from the viewpoint of using GaInAs as the magnetic sensing layer, it is convenient to design the characteristics of the Hall element if the outermost surface of the laminated structure is formed of AlInAs instead of GaInAs.

Further, AlInA which forms the outermost surface of the laminated structure
On the s crystal layer, an n-type GaInAs crystal layer (104) serving as a magneto-sensitive layer having a carrier concentration of 3 × 10 ¹⁶ cm ⁻³ and a thickness of 400 nm obtained by adding sulfur (element symbol S) is provided. Was. In this example, both GaInAs and AlInAs were grown by the atmospheric pressure (atmospheric pressure) MOVPE method using a monovalent cyclopentadienyl indium (chemical formula: C ₅ H ₅ In) as a source of valence. The method for growing the layer does not need to be limited to this, and the growth method may be different between the AlInAs layer and the GaInAs layer.

Next, the entire surface of the n-type GaInAs magnetic sensing portion layer (104) as the outermost layer is covered with a normal organic photoresist material. The region in which is to be formed and the region (105) to be a magnetically sensitive portion were processed into a mesa shape. In this embodiment, an inorganic acid is used for the mesa etching, but the etching solvent is not limited to this. However, if the thickness of the GaInAs layer is too thick, as described above, as the separation and removal of the crystal layer by mesa etching progress, the difference in the mesa shape due to the difference in the crystal orientation (crystal axis) becomes remarkable, This leads to an increase in the unbalance rate, which is one of the characteristics of the Hall element.

Thereafter, the entire surface of the GaInAs layer (104) was again covered with an organic resist material. Next, a pair of the input electrode (106) and the output electrode (10
7) Only the above-mentioned resist material existing in the region to be formed is removed using a known photolithography technique, and Ga is removed.
The surface of the InAs layer (104) was exposed. After that,
An Au.Ge alloy containing about 13% by weight of Ge was vacuum deposited. Thereafter, the heterojunction material is immersed in an organic solvent mixture, the resist is peeled off, and at the same time Au / G becomes unnecessary in the manufacture of an element deposited on the resist material by vapor deposition.
The e-alloy film was removed by a so-called lift-off method. Next, the wafer on which the alloy film serving as an electrode was deposited was subjected to heat treatment (alloying) at 420 ° C. for several minutes to obtain an ohmic electrode. here,
The Au.Ge alloy is used as an ohmic electrode material because of the use of an n-type GaInAs crystal layer as the magnetic sensing portion, but the material for the electrode is not limited to this. Also, from the viewpoint of the electrode structure, Au
A two-layer structure in which a metal film is further adhered on the surface of the Ge alloy electrode, or a multilayer structure may be used. Further, GaInA
A low-resistance GaInAs crystal layer having a carrier concentration as high as −10 ¹⁹ cm ⁻³ is deposited on the s magnetic sensing part crystal layer, and an ohmic electrode, so-called, is formed even when a simple substance such as aluminum (Al) or Au is deposited. A non-alloy ohmic contact can also be obtained.

Further, the surface of the region other than the above-mentioned input / output electrode portion of the heterojunction material having undergone the above-mentioned steps is subjected to plasma CVD.
It was covered with a silicon dioxide (SiO ₂ ) film (108) using the method. Next, a general photoresist material is applied on the oxide film (108), and a linear groove (109) (typically a dicing line (dic) is used to separate the elements.
ing line). The portion of the photoresist material corresponding to ()) was peeled off by a known photolithography method to selectively expose the surface of the GaInAs crystal layer (104). Thereafter, the surface of the exposed GaInAs crystal layer (104) corresponding to the dicing line (109) is etched with an inorganic acid, and the GaInAs crystal layer (104) is removed to a depth suitable for individually separating the elements. did.

The electrical characteristics of the Hall elements manufactured as described above, in particular, the magnitude of the leak current between the input electrodes between adjacent Hall elements were compared. As a result, G according to the present invention
In the aInAs Hall element, the leakage current measured when a voltage of 10 V is applied between the nearest input electrodes sandwiching the dicing line is reduced by about one digit or more compared to the conventional example, and changes from several hundred pA to several nA. . Here, the conventional example employs an n-type InP having a carrier concentration of about 2 × 10 ¹⁵ cm ⁻³ as a buffer layer, and a heterojunction comprising this and a Ga _0.47 In _0.53 As magnetosensitive layer. GaInAs refers to a Hall element. Further, it was confirmed that the unbalance rate of the Hall element according to the present invention was reduced to about 6%, which was 8 to 10% of the conventional hole.

[0027]

According to the present invention, it is possible to prevent leakage of operating current, provide a stable operation, and provide a highly sensitive Hall element having a low unbalance ratio.

[Brief description of the drawings]

FIG. 1 is a plan view schematically showing a GaInAs Hall element according to the present invention.

FIG. 2 is an enlarged schematic view showing a vertical cross section of the Hall element according to the present invention shown in FIG. 1 along a direction of a line AA ′.

[Explanation of symbols]

 (101) Fe-doped high-resistance InP single crystal substrate (102) GaInAs crystal layer (103) AlInAs crystal layer (104) GaInAs magnetosensitive layer (105) Mesa region (106) Input electrode (107) Output electrode (108) Oxidation Membrane (109) Dicing line

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-6-5882 (JP, A) JP-A-60-198877 (JP, A) JP-A-57-177583 (JP, A) JP-A-5-1982 275767 (JP, A) Proceedings of the 1992 Fall Meeting of the Japan Society of Applied Physics, No. 3, p. 1078, 16a- SZC-16 (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 43/06 G01R 33/07 JICST file (JOIS)

Claims (4)

(57) [Claims] 1. A high-resistance indium phosphide (InP) single crystal substrate, a buffer layer provided on the InP single crystal substrate, and gallium indium arsenide (GaInAs) provided on the buffer layer. Wherein the buffer layers each have a thickness of 1n.
m to 100 nm and a carrier concentration of 1 × 10 ¹⁵
A Hall element comprising crystal layers made of two kinds of semiconductor materials having different band gaps, each having a band gap of less than cm ^-3 , which are alternately stacked. 2. The method according to claim 1, wherein the buffer layer comprises InP and GaInA.
2. The Hall element according to claim 1, wherein crystal layers made of s are alternately stacked. 3. The method according to claim 1, wherein the buffer layer is made of aluminum arsenide.
2. The method according to claim 1, wherein crystal layers made of indium (AlInAs) and GaInAs are alternately stacked.
2. A Hall element according to claim 1. 4. The method according to claim 1, wherein the buffer layer comprises AlInAs and In.
2. The Hall element according to claim 1, wherein crystal layers made of P are alternately stacked.