JPH0785485B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0785485B2 JPH0785485B2 JP61171912A JP17191286A JPH0785485B2 JP H0785485 B2 JPH0785485 B2 JP H0785485B2 JP 61171912 A JP61171912 A JP 61171912A JP 17191286 A JP17191286 A JP 17191286A JP H0785485 B2 JPH0785485 B2 JP H0785485B2
- Authority
- JP
- Japan
- Prior art keywords
- copper
- ppm
- wire
- ball
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/43—Manufacturing methods
- H01L2224/438—Post-treatment of the connector
- H01L2224/43848—Thermal treatments, e.g. annealing, controlled cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85439—Silver (Ag) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01021—Scandium [Sc]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01051—Antimony [Sb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01058—Cerium [Ce]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】 〔発明の目的〕 （産業上の利用分野） 本発明は、半導体のチップ電極と外部引出し用リードフ
レームのインナーリード部とをワイヤボンディングした
半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to a semiconductor device in which a semiconductor chip electrode and an inner lead portion of a lead frame for external extraction are wire-bonded.
（従来の技術） 一般に、トランジスタ、IC（集積回路）LSI（大規模集
積回路）の如き半導体装置としては、例えば第２図に示
す構造のものが知られている。ダイフレームの上に半導
体チップであるペレット２をダイボンディングし、この
ペレット２の電極とリードフレーム３とをボンディング
ワイヤ４で電気的に接続した後、これを樹脂５でモール
ディングすることにより形成される。(Prior Art) Generally, as a semiconductor device such as a transistor or an IC (integrated circuit) LSI (large-scale integrated circuit), for example, one having a structure shown in FIG. 2 is known. It is formed by die-bonding the pellet 2 which is a semiconductor chip on the die frame, electrically connecting the electrode of the pellet 2 and the lead frame 3 with the bonding wire 4, and then molding the resin with the resin 5. .
前記ボンディングワイヤとしては、熱圧着法あるいは超
音波併用熱圧着法によりボンディングするφ20〜100μ
ｍの金、超音波法によりボンディングするφ25〜50μｍ
のアルミニウム合金（例えばAl−１％Si,Al−１％Mg）
とφ100〜500μｍの高純度アルミニウム（99.99％以
上）が用いられている。As the bonding wire, a thermocompression bonding method or a thermocompression bonding method using ultrasonic waves is used to bond φ20 to 100μ.
m gold, φ25 ~ 50μm bonding by ultrasonic method
Aluminum alloy (eg Al-1% Si, Al-1% Mg)
And high-purity aluminum (99.99% or more) with φ100 to 500 μm is used.
現在、金ワイヤは普及タイプのICやLSIに用い、アルミ
ニウムワイヤはサーディプ型またはパワートランジスタ
用にと使いわけられている。At present, gold wires are used for popular ICs and LSIs, and aluminum wires are used for sardip type or power transistors.
最近、集積度の増加に伴う多ピン化の傾向によって、金
ワイヤのコストを無視することが出来なくなっている。
そのため、ボンディングワイヤを高価な金から比較的安
価な銅に変更することが検討されている。また銅は金に
比べ材料コストが大幅に低減する他に、導電率が高く細
線化が可能で、さらにアルミニウム電極との金属間化合
物が生成しにくく、接合部の高温強度が優れている等の
特徴を有している。Recently, the cost of gold wires cannot be ignored due to the tendency of increasing the number of pins as the degree of integration increases.
Therefore, it is considered to change the bonding wire from expensive gold to relatively inexpensive copper. In addition, copper has a significantly lower material cost than gold, has high conductivity, can be thinned, and does not easily form intermetallic compounds with aluminum electrodes, and has excellent high-temperature strength at the joint. It has features.
銅ワイヤを用いたボンディングは、アルゴン、窒素、水
素等の還元ガス雰囲気中で、電気トーチによる放電ある
いは酸水素炎による加熱により銅ワイヤを溶融してボー
ルを形成し、このボールをアルミニウム電極にキャピラ
リで超音波を印加しながら接合する。この時、銅ボール
の表面が侵入空気によって酸化し、さらに形成されたボ
ールが金あるいはアルミニウムに比べて硬すぎるため、
半導体チップの損傷あるいはボンディング強度不足によ
るワイヤの剥離など発生する場合がある。そこで、銅を
硬くしているS,O,Se,Te等の不純物元素を低減した高純
度の銅ワイヤ（99.99％以上）を用いて上述の欠点を解
消する試みがなされているが、良好な結果は得られてい
ない。Bonding using a copper wire melts the copper wire by discharging with an electric torch or heating with an oxyhydrogen flame in an atmosphere of a reducing gas such as argon, nitrogen, or hydrogen to form a ball. Join while applying ultrasonic waves. At this time, the surface of the copper ball is oxidized by the invading air, and the formed ball is too hard as compared with gold or aluminum.
The semiconductor chip may be damaged or the wire may be peeled off due to insufficient bonding strength. Therefore, attempts have been made to eliminate the above-mentioned drawbacks by using a high-purity copper wire (99.99% or more) in which impurity elements such as S, O, Se, and Te, which harden copper, have been reduced. No results have been obtained.
また銅ワイヤによって配線されたトランジスタ、IC及び
LSIは、一般に経済性や量産性の点で優れている樹脂封
止（例えばエポキシ樹脂、シリコン樹脂）して使用され
る。しかしながら、樹脂封止型素子はボンディングワイ
ヤが直接樹脂に含まれた状態になっているため、動作中
の発熱によってボンディングワイヤには引張応力が加わ
る。これはモールド樹脂（エポキシ樹脂:22〜30×10-6/
℃）とボンディングワイヤ（銅:17×10-6/℃）及びリー
ドフレーム（42合金:4.5×10-6/℃）の熱膨張係数が大
きく異なるためで、高温雰囲気になると相互間の熱膨張
差によってボンディングワイヤには引張応力が作用す
る。このような動作中の発熱冷却により生ずる繰返し引
張応力が長時間にわたってボンディングワイヤである高
純度銅に作用すると、アルミニウム電極上に接合した銅
ボール直上部の結晶粒界からクラックが発生してクリー
プ破断する。またアルミニウム電極との接合部にはせん
断応力が作用し、接合界面からワイヤが剥離し、配線の
オープン不良を引き起こすことがある。Also, transistors, ICs and
The LSI is generally used after being resin-sealed (for example, epoxy resin or silicon resin), which is excellent in economical efficiency and mass productivity. However, in the resin-sealed element, since the bonding wire is directly contained in the resin, heat generated during operation causes tensile stress to be applied to the bonding wire. This is a mold resin (epoxy resin: 22-30 × 10 -6 /
(° C), the bonding wire (copper: 17 × 10 -6 / ° C) and the lead frame (42 alloy: 4.5 × 10 -6 / ° C) have large thermal expansion coefficients. Due to the difference, tensile stress acts on the bonding wire. When the repeated tensile stress generated by such heat generation cooling during operation acts on the high-purity copper that is the bonding wire for a long time, a crack is generated from the grain boundary just above the copper ball bonded on the aluminum electrode and creep rupture occurs. To do. Further, shear stress acts on the joint with the aluminum electrode, and the wire may peel off from the joint interface, causing an open defect of the wiring.
（発明が解決しようとする問題点） 本発明はこのような問題を解決するためになされたもの
で、クリープ強さが良好でかつボンディング性の優れた
銅ワイヤを用いた信頼性の高い半導体装置を提供するこ
とを目的とする。(Problems to be Solved by the Invention) The present invention has been made to solve such a problem, and is a highly reliable semiconductor device using a copper wire having good creep strength and excellent bonding properties. The purpose is to provide.
（問題点を解決するための手段） そこで本発明者等は、上述の問題点に対して鋭意検討を
重ねた結果、銅ワイヤのクリープによる結晶粒界破断
は、銅ワイヤの再結晶に伴う高温強度の低下が大きな要
因で、また銅ボールの硬化原因の１つは、ボール形成時
に銅ボール中に侵入する空気中の酸素によって酸化銅
（Cu2O）が形成されるためであることを見い出し、本発
明を完成するに致った。(Means for Solving the Problems) Therefore, the inventors of the present invention have conducted extensive studies on the above problems, and as a result, the grain boundary rupture due to creep of the copper wire is We found that the decrease in strength was a major factor and that one of the causes of hardening of copper balls was that copper oxide (Cu 2 O) was formed by oxygen in the air that entered the copper balls during ball formation. , Was completed in completing the present invention.
すなわち、本発明は半導体チップとの接続にワイヤボン
ディングを用いた半導体装置において、前記ワイヤボン
ディング素材として、Sc,Y,La及びCeから選択された１
種または２種以上の元素を20〜440ppm（wt ppm、以下
同）含有し、かつSb,P,Li,Sn,Pb及びCdから選択された
１種または２種以上の元素を25〜250ppm、又は、Sb,P,L
i,Sn,Pb及びCdから選択された１種または２種以上の元
素を25〜250ppm含有し、さらにＳ≦1ppm,O≦2ppm含有
し、残部がCuからなるワイヤ材を用いることを特徴とす
る半導体装置である。That is, the present invention is a semiconductor device using wire bonding for connection to a semiconductor chip, wherein the wire bonding material is selected from Sc, Y, La and Ce.
20 to 440 ppm (wt ppm, hereinafter the same) containing one or more elements, and 25 to 250 ppm of one or more elements selected from Sb, P, Li, Sn, Pb and Cd, Or Sb, P, L
A wire material containing 25 to 250 ppm of one or more elements selected from i, Sn, Pb and Cd, further containing S ≦ 1 ppm, O ≦ 2 ppm, and the balance being Cu It is a semiconductor device.
（作 用） 次に本発明で規定する各元素の効果と含有量の限定理由
について説明する。(Operation) Next, the effect of each element specified in the present invention and the reason for limiting the content will be described.
Sc,Y,La及びCeは微量の添加で転位の回復と再結晶時の
粒界移動を遅らせて再結温度を高め、銅ワイヤの粒界破
断を防止する効果を発揮するが、あまり多いと銅中に固
溶あるいは析出して著しく強度が増大し、銅ボールが硬
化して半導体チップに損傷を与え、かつ接合強度が低下
して銅ボールが剥離し易くなる。したがって、添加量は
20〜440ppmとした。好ましくは30〜350ppm、さらに好ま
しくは50〜250ppmである。Sc, Y, La, and Ce have the effect of delaying the recovery of dislocations and the movement of grain boundaries during recrystallization to increase the recrystallization temperature with the addition of a small amount, and prevent the grain boundary rupture of copper wires. Solid solution or precipitation in copper significantly increases the strength, the copper balls harden and damage the semiconductor chip, and the bonding strength decreases, and the copper balls easily peel off. Therefore, the added amount is
It was set to 20 to 440 ppm. It is preferably 30 to 350 ppm, more preferably 50 to 250 ppm.
またSb,P,Li,Sn,Pb及びCdは銅ボール形成時の侵入酸素
と反応して酸化物を生成し、これが銅ボール中から蒸発
するため、銅ボールを軟化する効果がある。その効果を
充分に得るためには25ppmを超える添加が必要となる
が、250ppmの添加は銅ボール中に未反応の元素が残存
し、ボール硬度を高め、ボール変形能が低下するので、
25〜250ppmの範囲とした。好ましくは35〜200ppm、さら
に好ましくは50〜150ppmである。Further, Sb, P, Li, Sn, Pb and Cd react with the invading oxygen at the time of forming the copper ball to form an oxide, which is evaporated from the copper ball, which has the effect of softening the copper ball. To obtain the effect sufficiently, addition of more than 25 ppm is necessary, but addition of 250 ppm leaves unreacted elements in the copper balls, increases the ball hardness, and reduces the ball deformability,
The range was 25 to 250 ppm. It is preferably 35 to 200 ppm, more preferably 50 to 150 ppm.
またAs,Zn,K,Sr,Mg,Ca及びTlは銅ボール形成時に銅中か
ら気化してボール中への酸素混入を阻止し、ボール硬化
を防ぐ効果がある。その効果を充分に得るためには10pp
mを超える添加が必要となるが、650ppmの添加は銅ボー
ル中に未反応の元素が残存し、ボール硬度を高め、ボー
ル変形能が低下するので、10〜650ppmの範囲とした。好
ましくは20〜500ppm、さらに好ましくは30〜300ppmであ
る。Further, As, Zn, K, Sr, Mg, Ca and Tl have an effect of vaporizing from the copper during the formation of the copper ball to prevent oxygen from being mixed into the ball and prevent the ball from hardening. 10pp to get the full effect
It is necessary to add more than m, but if 650 ppm is added, unreacted elements remain in the copper balls, the ball hardness is increased, and the ball deformability is reduced, so the range was set to 10 to 650 ppm. It is preferably 20 to 500 ppm, more preferably 30 to 300 ppm.
上記Sb,P,Li,Sn,Pb及びCdの各元素、またはAs,Zn,K,Sr,
Mg,Ca及びTlの各元素は、それぞれの群の元素の含有で
本発明の目的を達成することができるが、それらの両方
の群の元素を各々含有しても良い。Each element of the above Sb, P, Li, Sn, Pb and Cd, or As, Zn, K, Sr,
The respective elements of Mg, Ca and Tl can achieve the object of the present invention by containing the elements of their respective groups, but the elements of both groups may be contained respectively.
さらに本発明においてボンディング性を改善するために
は、銅中に不純物として含有しているＳ及びＯ量を減少
させることが有効である。第１図は、オージェ電子分光
装置（AES）で銅ボール表面から深さ方向のＳおよびＯ
の分布状態を測定した結果である。銅中のＳ及びＯは、
第１図に示すように形成されたボール表面に濃化偏析す
るため、ボンディング性の劣化を招く。このためＳ≦1p
pm,O≦2ppmとした。Further, in order to improve the bondability in the present invention, it is effective to reduce the amounts of S and O contained as impurities in copper. Figure 1 shows Auger electron spectroscopy (AES) in the depth direction of S and O from the copper ball surface.
It is the result of measuring the distribution state of. S and O in copper are
Since the surface of the ball formed as shown in FIG. 1 is concentrated and segregated, the bondability is deteriorated. Therefore S ≤ 1p
pm, O ≦ 2 ppm.
上記本発明の半導体装置の製造方法の一例としては、ま
ずボンディングワイヤの製造方法の一例としては、例え
ば、ゾーンメルティング法によって得た純度99.999wt％
以上の高純度銅を素材として、真空溶解により各含有元
素を添加したインゴットを作製する。そして、前記イン
ゴットを冷間引抜加工などの各種加工および焼鈍を繰返
して、意図するボンディングワイヤを得る。そして、前
記ボンディングワイヤを用いて常法により半導体装置を
製造する。As an example of a method for manufacturing the semiconductor device of the present invention, first, as an example of a method for manufacturing a bonding wire, for example, a purity of 99.999 wt% obtained by a zone melting method.
Using the above high-purity copper as a raw material, an ingot to which each contained element is added is manufactured by vacuum melting. Then, various processes such as cold drawing and annealing are repeated for the ingot to obtain the intended bonding wire. Then, a semiconductor device is manufactured by a conventional method using the bonding wire.
（実施例） 以下、具体的な実施例に基づいて本発明を説明する。(Examples) Hereinafter, the present invention will be described based on specific examples.
ゾーンメルディング法によって得た純度99.999wt.％の
高純度銅を素材として、第１表に示すように、純度99.9
wt.％以上の各種元素を添加した試料を真空溶解により
作製した。φ20mmの各鋳塊を面削し、1mmまで冷間引抜
き後、400℃で1hr焼鈍し、さらに引抜き加工によりφ25
μｍの細線とした。次に線材を300℃で等温焼鈍を行な
い、試料とした。Using high-purity copper with a purity of 99.999 wt.% Obtained by the zone-melting method as a raw material, as shown in Table 1, a purity of 99.9
Samples containing various elements of wt.% or more were prepared by vacuum melting. φ20mm ingots are each faceted, cold drawn to 1mm, annealed at 400 ℃ for 1hr, and drawn to φ25
It was a fine line of μm. Next, the wire was annealed at 300 ° C. to obtain a sample.
得られた試料を用い、アルゴンと水素の混合還元ガス雰
囲気中で電気アークによりボールを形成し、半導体チッ
プ上のアルミニウム電極と、Agメッキを施した銅リード
フレームにボンディングを行なった後、電極部との接合
強度をプッシュ・テストで測定した。またワイヤを剥離
した電極面を塩酸でエッチングし、チップ損傷の有無を
光学顕微鏡で調べた。これらの結果を第２表に示す。Using the obtained sample, a ball was formed by an electric arc in a mixed reducing gas atmosphere of argon and hydrogen, and after bonding the aluminum electrode on the semiconductor chip and the copper lead frame plated with Ag, the electrode part The joint strength with was measured by a push test. The electrode surface from which the wire was peeled off was etched with hydrochloric acid, and the presence or absence of chip damage was examined with an optical microscope. The results are shown in Table 2.
ところで、第１表に示す比較例についても実施例と同様
に試料を作成して、それぞれ本発明例に対応する試験を
行なった。By the way, for the comparative examples shown in Table 1, samples were prepared in the same manner as the examples, and the tests corresponding to the examples of the present invention were conducted.
第２表の結果から明らかなように、本発明の実施例は比
較例に比べ接合強度が高く、しかもチップ損傷は発生し
ていないことから優れたボンディング性を有しているこ
とが確認された。As is clear from the results shown in Table 2, it was confirmed that the examples of the present invention have higher bonding strength than the comparative examples and no chip damage occurs, and thus have excellent bonding properties. .
次に配線した半導体素子を樹脂封止し、高温放置試験
（200℃×500hr）と温度サイクル試験（−65℃×30min
→25℃×5min→200℃×30minを100サイクル実施）を行
なった。その結果を第２表に示す。この表から明らかな
ように、本発明の実施例にはワイヤ剥離さらにワイヤ断
線は認められず、優れたボンディング性及びクリープ強
さを有していることが確認された。Next, seal the wired semiconductor element with resin, and leave it at high temperature (200 ℃ x 500hr) and temperature cycle test (-65 ℃ x 30min).
→ 25 ℃ × 5 min → 200 ℃ × 30 min 100 cycles). The results are shown in Table 2. As is clear from this table, wire peeling and wire breakage were not observed in the examples of the present invention, and it was confirmed that the examples of the present invention had excellent bondability and creep strength.
〔発明の効果〕 以上説明したように本発明は、再結晶を抑制する銅合金
を半導体素子のボンディングワイヤとして用いるので、
温度サイクルによって発生する引張応力の負荷によるク
リープの破断寿命が大幅に向上する。またボール中への
酸化物の混入がなく、軟らかいボールが形成できるの
で、接合強度が向上し、チップ損傷が防止できる。この
ように、本発明によれば、温度変化に対して長時間にわ
たって安定した性能を発揮し、かつ良好なボンディング
性を有する半導体装置を提供することができる。 As described above, the present invention uses a copper alloy that suppresses recrystallization as a bonding wire of a semiconductor element,
The creep rupture life due to the tensile stress load generated by the temperature cycle is significantly improved. In addition, since a soft ball can be formed without the inclusion of oxide in the ball, the bonding strength is improved and chip damage can be prevented. As described above, according to the present invention, it is possible to provide a semiconductor device that exhibits stable performance over a long period of time with respect to temperature changes and that has good bondability.
第１図は銅ボール表面からの不純物分布曲線図、第２図
は樹脂封止型ICを示す概略断面図である。 ２……ペレット、３……レードフレーム ４……ボンディングワイヤFIG. 1 is an impurity distribution curve diagram from the surface of a copper ball, and FIG. 2 is a schematic sectional view showing a resin-sealed IC. 2 ... Pellet, 3 ... Rade frame 4 ... Bonding wire
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭60−124960（ＪＰ，Ａ) 特開 昭61−20693（ＪＰ，Ａ) 特開 昭59−139662（ＪＰ，Ａ) 特開 昭62−127438（ＪＰ，Ａ) ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-60-124960 (JP, A) JP-A-61-20693 (JP, A) JP-A-59-139662 (JP, A) JP-A-62- 127438 (JP, A)
Claims (1)
グを用いた半導体装置において、前記ワイヤボンディン
グ素材として、Sc,Y,La及びCaから選択された１種また
は２種以上の元素を20〜440ppm（wt.ppm以下同じ）含有
し、かつAs,Zn,K,Sr,Mg,Ca及びTlから選択された１種ま
たは２種以上の元素を10〜650ppm又はSb,P,Li,Sn,Pb及
びCdから選択された１種または２種以上の元素を25〜25
0ppm含有し、さらにＳ≦1ppm,O≦2ppm含有し、残部がCu
からなるワイヤ材を用いることを特徴とする半導体装
置。1. A semiconductor device using wire bonding to connect to a semiconductor chip, wherein 20 to 440 ppm of one or more elements selected from Sc, Y, La and Ca are used as the wire bonding material. wt.ppm or less) and contains 10 to 650 ppm of one or more elements selected from As, Zn, K, Sr, Mg, Ca and Tl or Sb, P, Li, Sn, Pb and 25-25 with one or more elements selected from Cd
0ppm, S ≦ 1ppm, O ≦ 2ppm, balance Cu
A semiconductor device using a wire material made of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61171912A JPH0785485B2 (en) | 1986-07-23 | 1986-07-23 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61171912A JPH0785485B2 (en) | 1986-07-23 | 1986-07-23 | Semiconductor device |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5196727A Division JPH0828384B2 (en) | 1993-07-15 | 1993-07-15 | Bonding wire |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6329938A JPS6329938A (en) | 1988-02-08 |
| JPH0785485B2 true JPH0785485B2 (en) | 1995-09-13 |
Family
ID=15932135
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61171912A Expired - Lifetime JPH0785485B2 (en) | 1986-07-23 | 1986-07-23 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0785485B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104278169A (en) * | 2013-07-12 | 2015-01-14 | 河南理工大学 | Corrosion-resistant bonding copper wire and preparation method thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59139662A (en) * | 1983-01-31 | 1984-08-10 | Mitsubishi Metal Corp | Alloy thin wire for wire bonding of semiconductor device |
| JPS60124960A (en) * | 1983-12-09 | 1985-07-04 | Sumitomo Electric Ind Ltd | Wire for connecting semiconductor element |
| JPS6120693A (en) * | 1984-07-06 | 1986-01-29 | Toshiba Corp | Bonding wire |
| JPS62127438A (en) * | 1985-11-26 | 1987-06-09 | Nippon Mining Co Ltd | Bonding wire for semiconductor device |
-
1986
- 1986-07-23 JP JP61171912A patent/JPH0785485B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104278169A (en) * | 2013-07-12 | 2015-01-14 | 河南理工大学 | Corrosion-resistant bonding copper wire and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6329938A (en) | 1988-02-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3527356B2 (en) | Semiconductor device | |
| JP2993660B2 (en) | Bonding wire | |
| JPS63235440A (en) | Fine copper wire and its production | |
| JP2656236B2 (en) | Semiconductor device | |
| JPH0785485B2 (en) | Semiconductor device | |
| JPS6365036A (en) | Fine copper wire and its production | |
| JPH0464121B2 (en) | ||
| JPH0828384B2 (en) | Bonding wire | |
| JPH0785484B2 (en) | Semiconductor device | |
| JPH0785483B2 (en) | Semiconductor device | |
| JPH0828382B2 (en) | Bonding wire | |
| JPH10303235A (en) | Gold alloy wire for bonding on semiconductor device | |
| JPH0828383B2 (en) | Bonding wire | |
| JPS63235442A (en) | Fine copper wire and its production | |
| JP2745065B2 (en) | Bonding wire for semiconductor device | |
| JPS63238232A (en) | Fine copper wire and its production | |
| JPH0717976B2 (en) | Semiconductor device | |
| JP2656237B2 (en) | Semiconductor device | |
| JPH03291340A (en) | Copper alloy extra fine wire for semiconductor device and semiconductor device | |
| TWI838488B (en) | Al bonding wire | |
| JP2656238B2 (en) | Semiconductor device | |
| JPH10233410A (en) | Alloy au wire for bonding semiconductor element | |
| JP2766706B2 (en) | Bonding wire | |
| JP3615901B2 (en) | Gold alloy wire for semiconductor element bonding | |
| JPS6365034A (en) | Fine copper wire and its production |