JPH0779033A - Magneto-electric transducer - Google Patents

Abstract

PURPOSE:To prevent a mechanical impact, etc., applied at the time of bonding to an electrode, etc., from reaching a mesa region including a Hall-cross and reduce the unbalanced voltage of a Hall device by a method wherein electrode forming parts and the mesa region in which the Hall-cross is provided are independent from each other. CONSTITUTION:In order to form a hetero junction, a semi-insulating InP single crystal doped with Fe is employed as a substrate. An undoped InP epitaxial crystal layer is grown on the crystal substrate as a buffer layer. Further, an n-type Ga0.47In0.53As epitaxial layer which is a magnetism sensing layer is provided on the InP buffer layer. Mesa-etching is applied to form a Hall-cross part mesa region 104 including the magnetism sensing part, etc., and the mesa regions 105 of electrode parts. In order to form the mesa regions, the etching is performed so deep as to reach the surface layer part of the InP layer 102, so that both mesa regions 104 and 105 are not structurally linked with each other and, further, are electrically independent from each other.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetoelectric conversion device having a heterojunction of III-V compound semiconductor layers,
Particularly, it relates to enhancement of sensitivity of a magnetoelectric conversion element including a semiconductor heterojunction of a GaInAs crystal layer and a III-V group compound semiconductor lattice-matched with InP, AlInAs or InP.

[0002]

2. Description of the Related Art Conventionally, a magnetoelectric conversion element (Hall element) has been known as a magnetic sensor. For this Hall element, in addition to elemental semiconductors such as silicon (Si) and germanium (Ge), indium antimonide (InSb), indium arsenide (InAs), gallium arsenide (GaAs), etc. A III-V group binary compound semiconductor formed by combining two elements belonging to Group V as well as an element belonging to Group V is also used.

Recently, even in III-V group compound semiconductors, a ternary mixed crystal of gallium-indium-arsenide (GaInAs) and indium phosphide (In).
Attempts have also been made to apply a heterojunction composed of P) as a material for a new high-sensitivity Hall element equipped with a InP single crystal substrate (Okuyama Shinobu et al., Autumn 1992 53rd Applied Physics Society). Academic Lecture Proceedings No. 3
(Published by Japan Society of Applied Physics, 1992), 16a-SZC-1
6, page 1078). It is said that this new GaInAs heterojunction Hall element brings about an unprecedented excellent product sensitivity because the characteristic temperature change is relatively small and the room temperature electron mobility is extremely high.

Even when a GaInAs Hall element is manufactured using such a heterojunction material composed of Ga _x In _1-x As and InP as a base material, the conventional GaAs hole is used regardless of the material used. Similar to the device, the base material is processed in various processes, for example, the mesa etching process for electrically insulating the device functional part including the magnetic sensitive part region and the input / output electrode part from other regions. A usual manufacturing method is to go through an electrode forming step after mesa etching of a region for forming an output electrode.

Here, the mesa etching of the element functional portion will be further described. This mesa etching is an essential process for electrically insulating the element functional portion from other regions. As a result, a so-called Hall cross corresponding to the electrode forming region and the magnetic sensitive portion is formed.
Remains as a mesa (trapezoid). It is customary in the past that the electrode forming portion and the hole cross portion thus processed are in a single and the same mesa region.

[0006]

However, in the mesa etching which has been indispensable for manufacturing a Hall element, the etching shape in the depth direction of the base material depends on the crystal orientation, that is, the crystal axis. Therefore, due to the difference in the etching shape, the unbalance voltage, which is an important characteristic of the Hall element, is increased. This will be described in detail. In the conventional general Hall element, the above-mentioned hole crosses that are orthogonal to each other have the <0 bar 11> and <0 bar 11 that are orthogonal to each other in the wall opening direction.
Bar 1 Bar 1> is formed along the crystal axis. As a result, the cross section perpendicular to the <0 bar 11> direction has a trapezoidal shape called a forward mesa, and conversely, the cross section perpendicular to the <0 bar 1 bar 1> crystal axis is etched. The bottom surface shrinks with the progress of, and the shape becomes an inverted mesa shape. In particular,
In the central region of the hole cross section, these semiconductor layers having different cross-sectional shapes cross each other, but the unbalance voltage is greatly influenced by the way of crossing and the crossing plane, which leads to an increase in the unbalance rate. There was a serious drawback.

On the other hand, even in the area where the electrodes are formed, the mesa is also processed to form a plateau shape. In this area, the side surface around the mesa is also in the normal mesa shape or the inverted mesa shape. Is customary. However, in the mesa region where the electrodes are formed, the driving voltage in units of volt (V) is simply forcibly applied, and it is sufficient if the insulating property with other regions is maintained. The situation is naturally different from the semiconductor mesa region for extracting a weak voltage of several mV to several tens of mV on the output side, and the difference in mesa shape is not significantly affected. Rather, the mesa region of the electrode portion and the mesa region of the hole cross portion are conventionally connected to each other and are not independent mesas.
For this reason, mechanical shocks applied to the input and output electrodes during bonding of lead wires to these electrodes propagate through this mesa region, resulting in the GaInAs layer and other III.
This has a bad influence such as disturbing the interface of the heterojunction with the group-V compound semiconductor layer, and impairs the high electron mobility characteristics manifested by the heterojunction. In particular, the physical properties brought about by the heterojunction are sensitively influenced by the state of the interface, and the application of such a direct impact to the heterojunction is one of the reasons for impairing the stable supply of the highly sensitive Hall element. I cannot deny that.

The present invention has been made to overcome the above-mentioned conventional drawbacks, and in order to stably obtain a highly sensitive Hall element, particularly a heterojunction Hall element including a heterojunction,
Avoids the factors that adversely affect the excellent electrical characteristics brought about by the heterojunction in the element processing process while maintaining the insulation required for element fabrication, and at the same time reduces the unbalanced voltage of the Hall element as much as possible. The purpose is to find a new structure of a hole element that can be made.

[0009]

That is, according to the present invention, a new idea is added to the point that the electrode forming portion and the hole cross portion are conventionally formed in a single mesa region, and a mesa for providing the electrode forming portion and the hole cross is provided. The regions are made independent from each other to prevent mechanical impacts applied to the electrodes during bonding, etc. from reaching the mesa region including the hole cross. Further, impurity ions are implanted into the mesa region including the hole cross to achieve electrical insulation between the hole cross and other regions in a so-called planer state.

The effect of the present invention is most exerted, Ga
In manufacturing a heterojunction Hall element composed of InAs / InP or GaInAs / AlInAs heterojunction, an elementization process similar to that of a conventional GaAs Hall element or the like is adopted. Therefore, although not described in detail, a brief description will be added here in the order of the element forming process.

First, in order to deposit such a heterojunction, a single crystal substrate made of a high-resistance III-V compound semiconductor having a semi-insulating property is used. Substrates corresponding to this include GaAs and InP crystals exhibiting semi-insulating properties, and may be selected in consideration of the lattice matching of a compound semiconductor layer forming a desired heterojunction. GaInA
When an s / InP heterojunction is desired, a semi-insulating InP single crystal is generally adopted as the substrate.

Next, regarding the specific resistance of the single crystals used as these substrates, for the Hall element, there is no great difference from the conventional GaAs Hall element, and the specific resistance is 10 ^4.
It is general to use a single crystal of Ω · cm or more and less than 10 ⁸ Ω · cm for the substrate.

An AlInAs layer or a GaInAs layer is epitaxially grown on these single crystal substrates. For example, in the formation of a GaInAs / InP heterojunction, the GaInAs layer, which normally forms the magnetically sensitive portion, has a high electron mobility. In general, a III-V group compound semiconductor layer that lattice-matches with InP such as InP or AlInAs is generally deposited as a buffer layer on a single crystal substrate.
By providing this buffer layer, the effect of suppressing the propagation of crystal defects and the like to the epitaxial growth layer and suppressing the diffusion of Fe impurities from the single crystal substrate can be achieved.
Without unnecessarily decreasing the electron mobility of the aInAs layer,
This is because it brings advantages such as being able to maintain the high sensitivity characteristics of the Hall element.

The growth method of the epitaxial layer forming the above-mentioned heterojunction is not particularly limited, and liquid phase epitaxial growth (LPE method), molecular beam epitaxy (Molecular Beam Epitaxia)
l; MBE method) and metal organic pyrolysis vapor phase growth method, so-called MOVPE (Metal Organic Vapor Phase Epitaxial)
Method, or MO that combines both MOVPE and MBE
-MBE method etc. can be applied.

GaInAs forming a heterojunction
To describe the mixed crystal ratio of the elements that make up
For As, it is desirable that the mixed crystal ratio of Ga is 0.47 ± 0.10. Because G that is lattice-matched to InP
As the mixed crystal ratio of Ga shifts from 0.47, which is the mixed crystal ratio of a, the difference in the lattice constant between GaInAs and InP, that is, the degree of lattice mismatch, becomes remarkable, and a large amount of crystal defects are induced to induce crystallinity. Of the Hall element, and also deteriorates electrical characteristics such as reduction of electron mobility, which greatly hinders improvement of product sensitivity due to the characteristics of the Hall element.

Since the manufacturing process of the Hall element does not differ depending on the type of the crystal layer serving as the buffer layer, the InP layer will be referred to as the buffer layer on the InP single crystal substrate, and Ga will be described below.
The case where the InAs layer is used as the magnetic sensing layer will be described. As described above, the heterojunction epitaxial wafer composed of the InP buffer layer and the Ga _x In _1-x As magnetic sensitive layer grown on the InP single crystal substrate is used as a base material for Ga.
InAs Hall element is manufactured. In this fabrication, a well-known photolithography technique is used, first, a region including a hole cloth that exhibits a function as a Hall element and a region for forming an electrode are covered with a general photoresist material, and then patterned. On the surface of the Ga _x In _1-x As layer exposed by this patterning,
At least one impurity selected from hydrogen, oxygen, argon, iron, chromium, nickel, or vanadium is ion-implanted. As a result, Ga in the ion-implanted region is
_The xIn1 _- xAs layer and the InP buffer layer are electrically insulated. The point to be noted in this insulation is Ga _x In
_The implantation dose amount is set so that the _1-x As layer and the InP buffer layer are completely insulated from other regions, and the ion species to be implanted is made of the above-mentioned semi-insulating InP single crystal. The accelerating voltage, which is a factor that determines the depth of penetration of implanted ions, is selected so as to penetrate into the surface layer portion.

After that, the surface of the heterojunction base material is again covered with a photoresist material and a well-known photolithography technique is used. This time, contrary to the above patterning of the ion implantation region, the hole crossing portion is formed. Patterning is performed so as to leave the region including and the electrode forming portion region. The present invention is characterized in that a region including an electrode and a region including a hole cross portion are not formed into a single mesa region as in the conventional case, but are patterned to form a mesa region independently of each other. That is, a single Hall element is patterned so that a plane including a mesa region serving as an electrode portion and a hole cross portion is provided with a plurality of mesa regions formed of a quadrangular mesa region. After that, so-called mesa etching is applied to the Ga _x In _1-x As layer and the InP layer to process both regions into a mesa shape. As a method of obtaining this mesa structure, for example, an inorganic acid is used to perform mesa etching on the Ga _x In _1-x As layer and the InP buffer layer. The method for obtaining the mesa is not particularly limited to this, and for example, dry etching may be used. In any case, in providing the mesa region, which is a feature of the present invention, it is necessary to provide the mesa regions independently so as not to contact each other both electrically and structurally.

As described above, the advantage of providing the individual mesa structures that do not contact each other in the electrode forming portion and the plane area including the hole cross is as follows. First, when bonding the lead wire to the electrode. The mechanical shock applied can be retained in the mesa area of the electrode part, and there is a structural problem that the hole cross including the electrode and the magnetic sensitive part is conventionally formed on the same mesa. , Was said to be difficult to avoid. There is an advantage that it is possible to prevent the stress and strain during bonding during the heat treatment of the electrode and mechanical impact from directly reaching the hole cross portion including the magnetic sensitive portion. Secondly, since the ion implantation method is used for electrical insulation between the hole cross portion and other regions, the so-called planar insulation is achieved, so that the unbalance voltage can be suppressed extremely low. . This is because the insulation method does not cause a difference in etching shape due to crystal orientation (crystal axis) associated with mesa etching. However, in the insulation method using the ion implantation method, of course, depending on the ion species to be implanted, it is represented by the total of the layer thickness of the Ga _x In _1-x As layer and the buffer layer such as InP, If the total thickness of the epitaxial growth layer is too thick, a large acceleration voltage is required to allow ions to enter. In this case, if the accelerating voltage is excessively high in the ion implantation method, the epitaxial layer, which is the body to be implanted, may be damaged, and even if a heat treatment is performed after the implantation to recover this damage, the heterojunction matrix material is originally present. This may result in a loss of electron mobility. Therefore, it is better to set the total thickness of the epitaxial layer to about several μm or less.

A heterojunction Hall element is formed using the heterojunction epitaxial wafer grown on the single crystal substrate as described above as a base material. There is no particular difference in the manufacturing process when making elements, like the conventional Hall element, and well-known techniques such as photolithography technology and etching technology can be used. By making full use of these technologies, input and output electrodes and individual electrodes can be used. A scribe line or the like for separation into elements is formed. In dicing for actually separating individual Hall elements, scribing is performed along the above dicing lines. This scribe may actually be performed by using a diamond needle or a diamond blade.

The GaInAs Hall element manufactured as described above was mainly evaluated in terms of electrical characteristics, especially electron mobility which influences the product sensitivity of the Hall element. In this evaluation, the difference in the distribution of room temperature electron mobilities after individual device formation was compared with that of the conventional example. As a result, in the Hall element according to the present invention, the average electron mobility is about 1
Whereas a 0,000cm ² / V · s, Ho consist conventional single mesa structure - In the Le device, only an average of 6,000cm ² / V · s of about room temperature electron mobility I couldn't get it. On the other hand, looking at the distribution of the unbalanced voltage, in the Hall element according to the present invention, the unbalanced ratio is ± 6.
%, Whereas the conventional example shows ± 12 to 15%, showing the superiority of the present invention in terms of the unbalance ratio, and in particular, the superiority of the method of insulating the hole cross portion by ion implantation.

[0021]

By providing the electrode portion and the hole cloth including the magnetic sensitive portion in different mesa regions according to the present invention, mechanical impact or the like applied in the processing process of the Hall element affects the mutual mesa regions. By avoiding the above, and by achieving the insulation of the hole cross including the magnetic sensitive portion with the ion-implanted impurities, there is no difference in the mesa shape depending on the crystal axis due to the conventional mesa etching, and the planar shape is obtained. Has the effect of easily achieving insulation.

[0022]

EXAMPLES The present invention will be specifically described below with reference to examples of a heterojunction Hall element made of GaInAs / InP. FIG. 1 shows GaInAs / In according to the present invention.
The schematic top view of a P heterostructure Hall element is shown. Further, FIG. 2 is a schematic cross-sectional view of the Hall element shown in FIG. 1 taken along the broken line AA ′ in the vertical direction. 3 to 5 are schematic cross-sectional views of the Hall element shown in FIG. 1 in the vertical direction along broken lines BB 'to DD'. In forming the heterojunction, a semi-insulating InP single crystal (101) having a plane orientation of (100) and containing iron (Fe) was used as a substrate. The resistivity of the InP single crystal (101) is 1 × 1.
It was 0 ⁷ Ω · cm and the thickness was about 350 μm.

In FIG. 1, (102) is a crystal substrate (101) on which cyclopentadienylindium (molecular formula: C ₅ H
₅ In) is an In source and is an undoped InP epitaxial crystal layer having a film thickness of about 100 nm grown by a MOVPE method under normal pressure. This InP layer (10
2) was grown at a temperature of 610 ° C. Further, an n-type Ga _0.47 In _0.53 As epitaxial layer (103) having a mixed crystal ratio of 0.47 and a film thickness of about 400 nm was provided on the InP buffer layer (102) by the above atmospheric pressure MOVPE growth method. . The growth temperature of the Ga _0.47 In _0.53 As epitaxial layer (103) formed with this magnetic sensing part layer is 610 ° C. like the InP layer (102), and the InP layer (102) and the n-type Ga _0.47 In _0.53 As layer ( The electron density of 103) is
They were 2 × 10 ¹⁵ cm ^-3 and 2 × 10 ¹⁶ cm ^-3 , respectively.
The electron concentration of the Ga _0.47 In _0.53 As layer (103) was achieved by doping with sulfur (element symbol: S) belonging to Group VI of the periodic table. The electron mobility of the wafer according to the present invention having such specifications is 1 at room temperature.
It was 1,000 cm ² / V · s.

Using the well-known photolithography technique as described above, the wafer having such a structure is first patterned by patterning the hole crossing region including the magnetically sensitive portion exhibiting the magnetically sensitive function and the electrode forming region. Coated. Then, oxygen ions having a mass number of 32 were implanted to form an ion implantation layer (110). Acceleration voltage is InP above
Considering the total film thickness of the layer (102) and the Ga _0.47 In _0.53 As layer (103), it was set to 45 KV so that oxygen ions could penetrate into a part of the surface layer portion of the InP single crystal (101). Further, the dose amount of oxygen ions is set to the InP layer (10
2) and the desired region of the Ga _0.47 In _0.53 As layer (103) was set to 3.0 × 10 ¹³ cm ^-2 so as to have high resistance. By this ion implantation, the InP layer (102) and Ga _0.47 I existing in the region other than the region where the above photoresist remains.
The n _0.53 As layer (103) has a high resistance, and the electrode formation region and the region including the hole cross are insulated from other regions.

Next, mesa etching is performed to further isolate these regions into trapezoidal shapes, and the mesa region (104) of the hole cross portion including the magnetic sensitive portion and the mesa region (10) of the electrode portion are formed.
5) and were formed. In forming these mesa regions, as shown in FIG. 2, mesa etching is advanced to reach the surface layer of the InP layer (102), and both mesa regions (1
04 and 105) are not structurally connected to each other,
It is electrically independent of each other. Please refer to this situation as presented in FIGS.

Unlike the conventional case, the mesa region (104) including the hole cross is not a cross-shaped mesa that is orthogonal to each other, but has a rectangular plane mesa. Hole cross (106) included in the rectangular mesa area (104)
Is insulated from the other regions of the mesa region (104) by forming the high resistance region (110) by the ion implantation described above. That is, in the method according to the present invention, the insulation of the hole cross portion is made into a high resistance region (11) by ion implantation without the need for mesa etching which causes an increase in the unbalanced voltage.
0) is achieved.

After that, the surface of the wafer is covered with a general photoresist material, and after the steps of patterning, resist stripping, lift-off, etc., the electrodes for input and output G are formed.
An Au / Ge alloy containing 13% by weight of e was vacuum-deposited to a thickness of about 600 nm to form an ohmic input / output electrode (107). The shapes of these electrodes (107) were all the same. By the way, the input resistance of the obtained Hall element was distributed around 1 KΩ.

Further, the entire surface of the wafer was once covered with a SiO ₂ insulating film (108) by the plasma CVD method. SiO ₂
The thickness of the film (108) was about 300 nm. Next, a photoresist material is applied on the insulating film (108), and the surface of the input / output electrode (107) is exposed for later electrical connection through the photolithography and patterning steps as described above. Let Following this, dicing lines (109) for separating into individual Hall elements were formed. After that, scribing was performed along the dicing line (109) to separate each element (chip). In this chip formation, a part of the back surface of the InP single crystal substrate (101) was removed by etching to make the substrate thickness from an initial thickness of 350 μm to about 130 μm to facilitate scribe.

The GaInAs Hall element manufactured by such processing was used for evaluation of electrical characteristics. In this evaluation, the electron mobility at room temperature and the unbalanced voltage were emphasized and the characteristics were compared with the GaInAs Hall element of the conventional example. First, as a result of comparison between the present invention and the conventional example with respect to room temperature electron mobility, as shown in Table 1 and FIG. 6, the Hall element of the present invention has an electron mobility of about 10,000.
While it is 0 cm ² / V · s, that of the conventional example is 6,
It was 500 cm ² / V · s. Further, comparing the unbalance rates, in the element according to the present invention, the average value is ± 6%.
In contrast to that of the conventional example, a clear difference of ± 12% was recognized.

[0030]

[Table 1]

[0031]

EFFECT OF THE INVENTION There is an effect that it is possible to easily provide a high-quality Hall element having excellent sensitivity characteristics and suppressing the unbalance ratio to a low level. In this example, Ga _x In _1-x As
The GaInAs Hall element having a heterojunction of InP and InP has been described as an example, but the effect of the present invention is exerted not on the semiconductor material forming the base material of the Hall element but on the processed shape of the element. Therefore, GaInA
Regardless of the s Hall element, other elements such as GaAs and InAs
It can also be applied to Hall elements made of InSb or the like. In particular, the effect of the present invention can be further exerted in the case of a Hall element having a heterojunction that utilizes the physical properties brought by the heterojunction.

[Brief description of drawings]

FIG. 1 is a schematic plan view of a Hall element according to the present invention.

FIG. 2 is a broken line A of the schematic plan view of the Hall element shown in FIG.
It is a schematic diagram of the cross section along -A '.

FIG. 3 is a broken line B of the schematic plan view of the Hall element shown in FIG.
It is a schematic diagram of the cross section along -B '.

FIG. 4 is a broken line C of the schematic plan view of the Hall element shown in FIG.
It is a schematic diagram of the cross section along -C '.

5 is a broken line D of the schematic plan view of the Hall element shown in FIG.
It is a schematic diagram of the cross section along -D '.

FIG. 6 is a graph showing room temperature electron mobility distributions of Hall elements according to the present invention and a conventional example.

[Explanation of symbols]

(101) InP semi-insulating single crystal substrate (102) Undoped InP buffer layer (103) Ga _0.47 In _0.53 As layer (104) Mesa-shaped region including hole cross (105) Mesa region of electrode part (106) ) Hole cross (107) Ohmic input / output electrode (108) SiO ₂ insulating film (109) Dicing line (110) High resistance region by ion implantation

Claims (4)

[Claims] 1. A magnetoelectric conversion element having a heterojunction of a III-V group compound semiconductor crystal, wherein a hole cross portion and an electrode portion are formed in mutually independent mesa regions. 2. The magnetoelectric conversion element according to claim 1, wherein the mutually independent mesa regions are electrically insulated from each other. 3. The mesa region including a hole cross portion is ion-implanted with at least one impurity selected from hydrogen, oxygen, argon, iron, chromium, nickel, or vanadium. The magnetoelectric conversion element described. 4. The heterojunction comprises gallium indium arsenide (GaInAs) and aluminum indium arsenide (AlInAs), indium phosphide (InP), or a III-V group compound lattice-matched with indium phosphide. The magnetoelectric conversion element according to claim 1, wherein: