JPH0774361A - Manufacture of polysilicon thin film transistor - Google Patents

Abstract

PURPOSE:To obtain a polysilicon thin film transistor wherein no grain boundaries are present in a channel region. CONSTITUTION:Many grain boundaries 15 are present at random in a polysilicon thin film 12 deposited on an insulating board 11. Silicon ions are implanted into parts of the polysilicon thin film 12 correspondent to a gate electrode forming region 16 and a continuous region 17 connected to the region 16 so as to turn these parts amorphous, and these amorphous parts are recrystallized by thermal annealing. In this case, as the amorphous part is uniformly recrystallized starting front both its sides and stopping at its center, crystals start growing at both the sides of the amorphous part and stop growing at the center of the regions 16 and 17 where crystals meet each other to form a grain boundary. The grain boundary is located to the right of the gate electrode forming region 16. Therefore, a grain boundary 15 is not present in a channel region which is formed in a part correspondent to the gate electrode forming region 16.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a polysilicon thin film transistor.

[0002]

2. Description of the Related Art FIG. 10 shows an example of a conventional polysilicon thin film transistor. This polysilicon thin film transistor includes an insulating substrate 1 made of glass or the like. A polysilicon thin film 2 is formed in the device area on the upper surface of the insulating substrate 1. A gate insulating film 3 is formed on the upper surface of the central portion (channel region 2a) of the polysilicon thin film 2. A gate electrode 4 is formed on the upper surface of the gate insulating film 3. Then, by implanting phosphorus ions using the gate electrode 4 as a mask, the polysilicon thin film 2 under the gate electrode 4 becomes a channel region 2a, and the left and right sides thereof become source / drain regions 2b. An interlayer insulating film 5 is formed on the entire upper surface of the insulating substrate 1 including the gate electrode 4 and the like. Source / drain region 2
Contact holes 6 are formed in the interlayer insulating film 5 in the portions corresponding to b, and source / drain electrodes 7 are formed in the portions of these contact holes 6.

[0003]

By the way, in such a conventional polysilicon thin film transistor, when the polysilicon thin film 2 is formed in the device area, the insulating substrate 1 is used.
A polysilicon thin film is deposited on the entire upper surface of the substrate by plasma CVD or the like, and patterned by photolithography. However, since a large number of crystal grain boundaries are randomly present in the polysilicon thin film deposited by plasma CVD or the like, crystal grain boundaries 8 are also present in the polysilicon thin film 2 obtained by patterning this. . When the crystal grain boundary 8 exists in the channel region 2a, there is a problem that the transistor characteristics are deteriorated. An object of the present invention is to provide a method of manufacturing a polysilicon thin film transistor which can prevent the crystal grain boundaries from existing in the channel region.

[0004]

The invention according to claim 1 is
An insulating film having a predetermined shape is formed on the polysilicon thin film, and by implanting silicon ions, only the polysilicon thin film under the insulating film is made amorphous, and the amorphous portion is annealed to re-reproduce it. Only the region which is crystallized and does not include the crystal grain boundary in this recrystallized portion is used as the channel region. According to a second aspect of the present invention, by covering the polysilicon thin film with a mask having a predetermined shape and implanting silicon ions, only the polysilicon thin film other than the mask corresponding portion is made amorphous, and this is made amorphous. The portion is annealed to be recrystallized, and only a region of the recrystallized portion which does not include a crystal grain boundary is used as a channel region.

[0005]

According to the present invention, a portion of the polysilicon thin film is made amorphous and then recrystallized, and only the region of the recrystallized portion which does not include the grain boundaries is used as the channel region. Therefore, it is possible to prevent crystal grain boundaries from existing in the channel region.

[0006]

1 to 8 show respective steps of manufacturing a polysilicon thin film transistor according to an embodiment of the present invention. Therefore, a method of manufacturing a polysilicon thin film transistor in this embodiment will be described with reference to these drawings in order.

First, as shown in FIG. 1, a polysilicon thin film 12 is deposited on the upper surface of an insulating substrate 11 made of glass or the like, a gate insulating film forming film 13 is deposited on the upper surface thereof, and a metal or metal film is further deposited on the upper surface thereof. Heavily doped n
A gate electrode forming film 14 made of a polysilicon film is deposited. In this state, many crystal grain boundaries 15 are randomly present in the polysilicon thin film 12.

Next, as shown in FIG. 2, the gate electrode forming film 1 of the portion corresponding to the outside of both the gate electrode forming region 16 and the continuous region 17 continuous to the right of this region 16.
4 and the gate insulating film forming film 13 are removed by photolithography to obtain a gate electrode forming region 16
And the temporary gate electrode 14 in the portion corresponding to the continuous region 17.
While forming a, the temporary gate insulating film 13a is formed under the temporary gate electrode 14a. In this case, continuous area 1
The length of 7 is longer than the length of the gate electrode formation region 16.

Next, as shown in FIG. 3, silicon ions are implanted by an ion implanter. In this case, by adjusting the accelerating voltage at the time of implanting silicon ions, silicon ions are concentrated in the polysilicon thin film 12 below the temporary gate electrode 14a, and the silicon ions penetrate into the other polysilicon thin films 12 other than that. Then, only the polysilicon thin film 12 under the temporary gate electrode 14a is made amorphous by the implanted silicon ions, and the amorphized portion 18 is formed. In this state, a grain boundary 1 is formed in the amorphized portion 18.
5 does not exist.

Next, when thermal annealing is performed, as shown by the arrow in FIG. 4, the amorphized portion 18 is uniformly solid-phase grown (recrystallized) from both sides toward the central portion. In this case, if the temperature of the thermal annealing is set as low as possible within a range sufficient for the crystal to grow, for example, about 600 ° C., generation of crystal growth nuclei from the amorphized portion 18 is suppressed, and the amorphous portion 18 is suppressed. The qualitative portion 18 recrystallizes substantially uniformly from both sides toward the central portion. Then, when the recrystallization is completed, as shown in FIG. 5, the crystals that have grown substantially uniformly from both sides meet under the substantially central portion of the temporary gate electrode 14a, and the crystal grain boundary 15a is formed again at the portion where the crystals meet. .

Next, as shown in FIG. 6, a portion of the temporary gate electrode 14a corresponding to the outside of the gate electrode forming region 16 is formed.
By removing the temporary gate insulating film 13a by photolithography, the gate electrode 14b is formed in the portion corresponding to the gate electrode forming region 16, and the gate insulating film 13b is formed under the gate electrode 14b.
In this state, since the length of the continuous region 17 is larger than the length of the gate electrode formation region 16, the crystal grain boundary 1
5a protrudes to the right of the gate electrode 14b.

Next, as shown in FIG.
When phosphorus ions are implanted by an ion implantation device using b as a mask, the polysilicon thin film 12 under the gate electrode 14b is formed.
Is a channel region 12a, and left and right sides thereof are source / drain regions 12b.

Next, as shown in FIG. 8, the polysilicon thin film 12 is patterned, and then the interlayer insulating film 1 is formed on the entire upper surface.
9 is deposited, then a contact hole 20 is formed in the interlayer insulating film 19 in a portion corresponding to the source / drain region 12b, and then a source / drain electrode 21 is formed in the portion of the contact hole 20. Thus, the polysilicon thin film transistor of this embodiment is manufactured.

In the polysilicon thin film transistor manufactured in this manner, as shown in FIG. 5, under the temporary gate electrode 14a, the crystal grain boundary 1 is formed only just below the central portion thereof.
5a is formed, and as shown in FIG. 7, the crystal grain boundary 15a is projected to the right side of the gate electrode 14b, that is, after a portion of the polysilicon thin film 12 is made amorphous. Only the region of the recrystallized portion that does not include the crystal grain boundary 15a is re-crystallized and the channel region 12a is formed.
Therefore, it is possible to prevent the crystal grain boundaries from existing in the channel region 12a, and it is possible to improve the transistor characteristics.

Next, a method of manufacturing a polysilicon thin film transistor in another embodiment of the present invention will be described with reference to FIG. First, as shown in FIG. 9A, a polysilicon thin film 32 is deposited on the upper surface of an insulating substrate 31, and then a gate electrode formation region 33 is included and the length is twice or more the length of the gate electrode formation region 33. Area 34
Polysilicon thin film 3 in the portion other than the portion corresponding to
A resist film 35 is patterned on the upper surface of 2. next,
As shown in FIG. 9B, by implanting silicon ions using the resist film 35 as a mask, the resist film 3 is formed.
Only the portion of the polysilicon thin film 32 which is not covered with 5 is the amorphized portion 36. After that, the resist film 35 is peeled off. Next, when thermal annealing is performed, as shown by an arrow in FIG. 9C, the amorphized portion 36 is uniformly solid-phase grown (recrystallized) from both sides toward the central portion. Then, when the recrystallization is completed, as shown in FIG. 9D, the crystals that have grown uniformly from both sides meet at the central portion of the amorphized portion 36, and the grain boundary 37 is formed at the portion where the crystals meet.
Is formed. The crystal grain boundary 37 protrudes to the right of the portion corresponding to the gate electrode formation region 33. Next, FIG.
As shown in (E), the gate insulating film 3 is formed on the upper surface of the polysilicon thin film 32 in a portion corresponding to the gate electrode formation region 33.
8 is formed, and then the gate electrode 39 is formed on the upper surface of the gate insulating film 38. Thereafter, the steps similar to those shown in FIGS. 7 and 8 are followed to manufacture the polysilicon thin film transistor of this embodiment.

As described above, also in this embodiment, a part of the polysilicon thin film 32 is made amorphous and then recrystallized, and only the region of the recrystallized portion which does not include the crystal grain boundary 37 is recrystallized. Since the channel region is used, it is possible to prevent the crystal grain boundaries from existing in the channel region, and thus improve the transistor characteristics.

Although the source / drain regions are formed in the regions where the crystal grain boundaries are formed using the crystal grain boundary non-formation region as the channel region in the above-mentioned embodiment, the entire device including the source / drain regions is the crystal grain boundaries. You may make it form in a non-formation area | region.

[0018]

As described above, according to the present invention, a portion of a polysilicon thin film is made amorphous and then recrystallized, and only the region of the recrystallized portion that does not include a grain boundary. Since it is used as the channel region, it is possible to prevent the crystal grain boundaries from existing in the channel region, and it is possible to improve the transistor characteristics.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a state in which a polysilicon thin film, a gate insulating film forming film, and a gate electrode forming film are deposited on an upper surface of an insulating substrate when manufacturing a polysilicon thin film transistor according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a state in which a temporary gate electrode and a temporary gate insulating film are formed in manufacturing the same polysilicon thin film transistor.

FIG. 3 is a cross-sectional view showing a state where an amorphized portion is formed by implanting silicon ions in manufacturing the same polysilicon thin film transistor.

FIG. 4 is a cross-sectional view showing a state in which the amorphized portion is being recrystallized during manufacturing of the same polysilicon thin film transistor.

FIG. 5 is a cross-sectional view showing a state in which an amorphized portion is recrystallized in manufacturing the same polysilicon thin film transistor.

FIG. 6 is a cross-sectional view showing a state in which a gate electrode and a gate insulating film are formed in manufacturing the same polysilicon thin film transistor.

FIG. 7 is a cross-sectional view showing a state in which phosphorus ions are implanted to form source / drain regions in manufacturing the same polysilicon thin film transistor.

FIG. 8 is a cross-sectional view showing a state in which an interlayer insulating film, contact holes, and source / drain electrodes are formed in manufacturing the same polysilicon thin film transistor.

9A to 9E are cross-sectional views showing respective manufacturing steps of a polysilicon thin film transistor according to another embodiment of the present invention.

FIG. 10 is a sectional view of an example of a conventional polysilicon thin film transistor.

[Explanation of symbols]

 11 Insulating Substrate 12 Polysilicon Thin Film 12a Channel Region 13a Temporary Gate Insulating Film 13b Gate Insulating Film 14a Temporary Gate Electrode 14b Gate Electrodes 15 and 15a Crystal Grain Boundary 18 Amorphized Part

Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI Technical indication location H01L 21/324 Z 21/336 H01L 21/265 H Q 9056-4M 29/78 311 H

Claims (2)

[Claims] 1. An insulating film having a predetermined shape is formed on a polysilicon thin film, and by implanting silicon ions, only the polysilicon thin film under the insulating film is made amorphous, and the amorphous portion is formed. Recrystallize by annealing,
A method of manufacturing a polysilicon thin film transistor, characterized in that only a region of the recrystallized portion that does not include a grain boundary is used as a channel region. 2. The polysilicon thin film is covered with a mask having a predetermined shape, and silicon ions are implanted to amorphize only the polysilicon thin film except the mask corresponding portion, and the amorphized portion is annealed. Re-crystallizing by doing so, the method for manufacturing a polysilicon thin film transistor, characterized in that only a region of this re-crystallized portion that does not include a grain boundary is used as a channel region.