JPH077273A - 多層回路におけるバイアホールの形成方法 - Google Patents

多層回路におけるバイアホールの形成方法

Info

Publication number
JPH077273A
JPH077273A JP5354493A JP35449393A JPH077273A JP H077273 A JPH077273 A JP H077273A JP 5354493 A JP5354493 A JP 5354493A JP 35449393 A JP35449393 A JP 35449393A JP H077273 A JPH077273 A JP H077273A
Authority
JP
Japan
Prior art keywords
layer
dielectric
via holes
forming
array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5354493A
Other languages
English (en)
Japanese (ja)
Inventor
Jay R Dorfman
ロバート ドーフマン ジェイ
Richard R Draudt
レイモンド ドラウト リチャード
Thomas D Lantzer
デイヴィッド ランツァー トーマス
Arthur H Mones
ハーベイ モーンズ アーサー
David L Sutton
レロイ サットン デイヴィッド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EIDP Inc
Original Assignee
EI Du Pont de Nemours and Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EI Du Pont de Nemours and Co filed Critical EI Du Pont de Nemours and Co
Publication of JPH077273A publication Critical patent/JPH077273A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0029—Etching of the substrate by chemical or physical means by laser ablation of inorganic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/069—Green sheets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/093—Laser beam treatment in general
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/94—Laser ablative material removal

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laser Beam Processing (AREA)
JP5354493A 1993-01-08 1993-12-30 多層回路におけるバイアホールの形成方法 Pending JPH077273A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/002,247 US5294567A (en) 1993-01-08 1993-01-08 Method for forming via holes in multilayer circuits
US002247 1993-01-08

Publications (1)

Publication Number Publication Date
JPH077273A true JPH077273A (ja) 1995-01-10

Family

ID=21699895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5354493A Pending JPH077273A (ja) 1993-01-08 1993-12-30 多層回路におけるバイアホールの形成方法

Country Status (6)

Country Link
US (1) US5294567A (enExample)
EP (1) EP0606645A1 (enExample)
JP (1) JPH077273A (enExample)
KR (1) KR970006230B1 (enExample)
CN (1) CN1091233A (enExample)
TW (1) TW230863B (enExample)

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CN1044762C (zh) 1993-09-22 1999-08-18 松下电器产业株式会社 印刷电路板及其制造方法
US5714404A (en) * 1993-11-18 1998-02-03 Regents Of The University Of California Fabrication of polycrystalline thin films by pulsed laser processing
US6130009A (en) * 1994-01-03 2000-10-10 Litel Instruments Apparatus and process for nozzle production utilizing computer generated holograms
US5539175A (en) * 1994-03-21 1996-07-23 Litel Instruments Apparatus and process for optically ablated openings having designed profile
US5759331A (en) * 1994-07-15 1998-06-02 Paul J. Dostart Method of ensuring conductivity in the manufacturing of a multi-layer ceramic component containing interlayer conductive-filled via holes
US5645673A (en) * 1995-06-02 1997-07-08 International Business Machines Corporation Lamination process for producing non-planar substrates
US5953629A (en) * 1995-06-09 1999-09-14 Vacuum Metallurgical Co., Ltd. Method of thin film forming on semiconductor substrate
US6373026B1 (en) * 1996-07-31 2002-04-16 Mitsubishi Denki Kabushiki Kaisha Laser beam machining method for wiring board, laser beam machining apparatus for wiring board, and carbonic acid gas laser oscillator for machining wiring board
US5683758A (en) * 1995-12-18 1997-11-04 Lucent Technologies Inc. Method of forming vias
TW342365B (en) * 1995-12-21 1998-10-11 Ricoh Microelectronics Kk A printing mask with a plastic printing plate and process for producing the same
US5948200A (en) * 1996-07-26 1999-09-07 Taiyo Yuden Co., Ltd. Method of manufacturing laminated ceramic electronic parts
US6037103A (en) 1996-12-11 2000-03-14 Nitto Denko Corporation Method for forming hole in printed board
US6054760A (en) * 1996-12-23 2000-04-25 Scb Technologies Inc. Surface-connectable semiconductor bridge elements and devices including the same
US6146743A (en) * 1997-02-21 2000-11-14 Medtronic, Inc. Barrier metallization in ceramic substrate for implantable medical devices
US5855995A (en) * 1997-02-21 1999-01-05 Medtronic, Inc. Ceramic substrate for implantable medical devices
US6277740B1 (en) * 1998-08-14 2001-08-21 Avery N. Goldstein Integrated circuit trenched features and method of producing same
US6780765B2 (en) 1998-08-14 2004-08-24 Avery N. Goldstein Integrated circuit trenched features and method of producing same
US6144007A (en) * 1998-10-26 2000-11-07 Levin; Theodore L. Method and apparatus for forming a perforated non-planar object using a pulsed energy beam
US6270601B1 (en) * 1998-11-02 2001-08-07 Coorstek, Inc. Method for producing filled vias in electronic components
US7723642B2 (en) 1999-12-28 2010-05-25 Gsi Group Corporation Laser-based system for memory link processing with picosecond lasers
US7838794B2 (en) * 1999-12-28 2010-11-23 Gsi Group Corporation Laser-based method and system for removing one or more target link structures
US7671295B2 (en) * 2000-01-10 2010-03-02 Electro Scientific Industries, Inc. Processing a memory link with a set of at least two laser pulses
US20030222324A1 (en) * 2000-01-10 2003-12-04 Yunlong Sun Laser systems for passivation or link processing with a set of laser pulses
US20060141681A1 (en) * 2000-01-10 2006-06-29 Yunlong Sun Processing a memory link with a set of at least two laser pulses
US6689985B2 (en) 2001-01-17 2004-02-10 Orbotech, Ltd. Laser drill for use in electrical circuit fabrication
US7018418B2 (en) * 2001-01-25 2006-03-28 Tecomet, Inc. Textured surface having undercut micro recesses in a surface
US20070173075A1 (en) * 2001-03-29 2007-07-26 Joohan Lee Laser-based method and system for processing a multi-material device having conductive link structures
US7027155B2 (en) * 2001-03-29 2006-04-11 Gsi Lumonics Corporation Methods and systems for precisely relatively positioning a waist of a pulsed laser beam and method and system for controlling energy delivered to a target structure
US6890619B2 (en) * 2001-11-13 2005-05-10 Agilent Technologies, Inc. Optical systems and refractive index-matching compositions
US6951995B2 (en) 2002-03-27 2005-10-04 Gsi Lumonics Corp. Method and system for high-speed, precise micromachining an array of devices
US20090085011A1 (en) * 2003-12-18 2009-04-02 Lichtenhan Joseph D Neutron shielding composition
SG149034A1 (en) * 2003-12-18 2009-01-29 Hybrid Plastics Inc Polyhedral oligomeric silsesquioxanes and metallized polyhedral oligomeric silsesquioxanes as coatings, composites and additives
US7088000B2 (en) * 2004-11-10 2006-08-08 International Business Machines Corporation Method and structure to wire electronic devices
US20060191884A1 (en) * 2005-01-21 2006-08-31 Johnson Shepard D High-speed, precise, laser-based material processing method and system
CN100536046C (zh) * 2005-02-25 2009-09-02 京瓷株式会社 复合生片的加工方法
US8250254B2 (en) 2007-07-31 2012-08-21 Intel Corporation Offloading input/output (I/O) virtualization operations to a processor
KR101352731B1 (ko) * 2010-04-12 2014-01-17 미쓰비시덴키 가부시키가이샤 레이저 가공기, 레이저 가공방법 및 레이저 가공 제어장치
KR101982887B1 (ko) 2011-07-13 2019-05-27 누보트로닉스, 인크. 전자 및 기계 구조체들을 제조하는 방법들
CN103187316B (zh) * 2013-03-12 2016-04-20 江苏省宜兴电子器件总厂 一种陶瓷外壳生产中的孔壁金属化工艺
DE102013007703A1 (de) * 2013-05-03 2014-11-06 Forschungszentrum Jülich GmbH Verfahren zur Herstellung einer Glaslot-Gründichtung
CN106793535A (zh) * 2015-11-20 2017-05-31 富泰华工业（深圳）有限公司 电路板丝网印刷方法
CN106793534A (zh) * 2015-11-20 2017-05-31 富泰华工业（深圳）有限公司 电路板钢网印刷方法
CN106695136B (zh) * 2017-01-12 2017-09-29 广东工业大学 一种多层印刷电路板的激光打孔方法及使用其的系统
CN110340520A (zh) * 2019-06-27 2019-10-18 武汉铱科赛科技有限公司 一种脉冲错位激光加工方法、装置和系统

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4806188A (en) * 1988-03-04 1989-02-21 E. I. Du Pont De Nemours And Company Method for fabricating multilayer circuits
US4965702A (en) * 1989-06-19 1990-10-23 E. I. Du Pont De Nemours And Company Chip carrier package and method of manufacture
US5066357A (en) * 1990-01-11 1991-11-19 Hewlett-Packard Company Method for making flexible circuit card with laser-contoured vias and machined capacitors
US5213876A (en) * 1990-01-11 1993-05-25 Hewlett-Packard Company Flexible circuit card with laser-contoured VIAs and machined capacitors
US5194713A (en) * 1991-10-17 1993-03-16 International Business Machines Corporation Removal of excimer laser debris using carbon dioxide laser

Also Published As

Publication number Publication date
KR940019199A (ko) 1994-08-19
TW230863B (enExample) 1994-09-21
US5294567A (en) 1994-03-15
EP0606645A1 (en) 1994-07-20
CN1091233A (zh) 1994-08-24
KR970006230B1 (en) 1997-04-24

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