JPH0737757A - Capacitor array - Google Patents

Abstract

PURPOSE:To obtain a ceramic capacitor array capable of high density packaging which can miniaturize an element and cope with bump bonding. CONSTITUTION:Inner electrodes of the respective capacitor units 33A-33I are alternately exposed in trenches or on the end surfaces of sintered bodies which stretch from one surface of the sintered body to the thickness direction, on both sides of the respective capacitor units 33A-33I, and the following are formed; connection electrodes 34-39 arranged on the inner surfaces of the trenches and on the end surfaces of the sintered bodies so as to be electrically connected with the inner electrodes, electrodes 25, 26, 40-42 for external connection formed on the surfaces of sintered bodies of the respective capacitor unit 33A-33I, and leading-out electrodes which connect the connection electrodes 34-39 with the electrodes 25, 26, 40-42 for external connection. The adjacent electrodes of the respective capacitor units 33A-33I are isolated by insulating layers 29, 30.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitor array in which a plurality of capacitor units are integrally formed by using one ceramic sintered body.

[0002]

2. Description of the Related Art With the miniaturization of electronic equipment, miniaturization and high-density mounting of electronic components are being promoted. For example, as capacitors, ultra-small monolithic ceramic capacitors have been developed, and circuits in which a large number of these ultra-small monolithic ceramic capacitors are mounted on a printed circuit board have been realized.

Further, in order to achieve high density mounting of electronic parts, a capacitor array in which a plurality of capacitors are integrated is also used. In a conventional multilayer ceramic capacitor array, common electrodes and individual electrodes are alternately arranged, or electrodes that are continuous only in the row direction and electrodes that are continuous only in the column direction are alternately stacked, and the electrodes are taken out at the outer edge of the element. There is known a monolithic ceramic capacitor to be performed, and a monolithic ceramic capacitor array in which internal electrodes formed so as to overlap each other through a ceramic layer are taken out by a through hole electrode provided inside the element.

[0004]

However, when a conventional monolithic ceramic capacitor is mounted on a printed circuit board or the like, it is necessary to provide a land, which is slightly larger than the capacitor element, on the board. However, if a large number of lands are to be mounted, a larger number of larger lands are required, and there is a problem that high-density mounting cannot be realized.

Further, even in the multilayer ceramic capacitor array in which the electrodes are taken out at the outer edge portion of the element, there is a problem that a land larger than the array element is required and high-density mounting cannot be realized.

Further, in the multilayer ceramic capacitor array in which the electrodes are taken out by the through-hole electrodes, as the elements are downsized, the ratio of the cross-sectional area of the through-hole electrodes to the area of the internal electrodes increases, and the size is sufficiently reduced. There was a problem that could not be achieved.

An object of the present invention is to solve the above problems of the prior art, to provide a ceramic capacitor array capable of reducing the size of an element and enabling high-density mounting.

[0008]

In the capacitor array of the present invention, a plurality of capacitor units are formed by forming a plurality of internal electrodes in a ceramic sintered body so as to overlap each other in the thickness direction through a ceramic layer. A multilayer capacitor array arranged in parallel in a matrix in a matrix of m rows × n columns (where m and n are integers of 2 or more), in which internal electrodes of each capacitor unit are sintered bodies on both sides of each capacitor unit. From one surface is alternately exposed to the groove or the sintered body end surface extending in the thickness direction, and a connecting electrode formed on the inner surface of the groove and the sintered body end surface so as to be electrically connected to the internal electrode, An external connection electrode provided on one surface of the sintered body of each capacitor unit, and a lead electrode connecting between the connection electrode and the external connection electrode,
It is characterized in that the adjacent connecting electrodes of each capacitor unit are separated by an insulating layer.

[0009]

In the capacitor array according to the present invention, a plurality of capacitor units are arranged side by side in a matrix of m rows × n columns, and the connection electrodes are electrically connected to the internal electrodes on both sides of each capacitor unit. This connecting electrode is connected to the external connection electrode provided on one surface of the sintered body of each capacitor unit by the extraction electrode. Therefore, the capacitor array of the present invention can be mounted on the printed circuit board by using the external connection electrodes provided on one surface of the sintered body, and can be surface-mounted by bump bonding or the like. Therefore, high-density mounting can be performed, and the mounting cost can be reduced.

A connecting electrode for each capacitor unit,
Since the extraction electrode and the external connection electrode are provided,
The capacity of each capacitor unit can be taken out independently.

Further, since no through-hole electrode or the like is used, each capacitor unit can be downsized. Further, the capacitor array of the present invention can be surface-mounted on a printed circuit board by bump bonding, and the shape of the external connection electrode has a ratio of the shortest diameter to the longest diameter of 0.1.
The above is preferable from the viewpoint of mounting strength.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be clarified by describing capacitor arrays of embodiments according to the present invention with reference to the drawings. In the following description, the structure of the capacitor array will be clarified by first describing the method of manufacturing the capacitor array of each embodiment.

First Embodiment First, rectangular ceramic green sheets 1 to 4 as shown in FIGS. 1 to 4 are prepared. The ceramic green sheet is formed by kneading a dielectric ceramic powder such as a barium titanate-based ceramic powder with a known and commonly used binder and an organic solvent to form a slurry by an appropriate sheet forming method such as a doctor blade method. , Obtained by punching.

Referring to FIG. 1, rectangular internal electrodes 5 to 10 of pattern A are formed on the upper surface of ceramic green sheet 1 by printing a conductive paste. Referring to FIG. 2, rectangular internal electrodes 11 to 11 are formed so as to form pattern B on the upper surface of ceramic green sheet 2.
16 is formed by printing a conductive paste.

Referring to FIG. 3, on the upper surface of the ceramic green sheet 3, the extraction electrode 1 is formed as a pattern C.
7 are formed. Referring to FIG. 4, in the ceramic green sheet 4, the openings 18 are formed as the pattern D.
Are formed in a predetermined pattern, and the openings 18 are filled with a filler containing carbon as a main component.

1 to 4, aa line and bb line
The lines indicate the portions where grooves are formed, which will be described later, and the portions surrounded by the lines correspond to capacitor units.

As the conductive paste, a conductive paste containing a conductive powder such as Ag or Ag-Pd is used. However, in addition to printing the conductive paste, the internal electrodes 5 to 5 may be formed by another conductive film forming method such as vapor deposition or plating.
The electrodes 10, 11 to 16 and the extraction electrode 17 may be formed.

Next, a predetermined number of these ceramic green sheets 1 to 4 and a plain ceramic green sheet 19 are prepared, laminated in the orientation shown in FIGS. 1 to 4, and schematically shown in FIG. Laminate as shown and press-bond in the thickness direction. By press-bonding in this way, a laminated body is obtained, and by firing this laminated body, the sintered body 20 shown in FIG. 6 is obtained.

As shown in FIG. 1 and FIG. 2, the internal electrodes 6, 14, 10 are exposed on one end face 20a of the laminated body 20 thus obtained with reference to FIG. In addition, the extraction electrode 17 shown in FIG. 3 is exposed. Similarly, on the other end face 20b side, although not shown, the internal electrodes 11, 7, 15 and the extraction electrode 17 are exposed. In addition, on the upper surface 20c of the sintered body 20, the openings 18 of the pattern D shown in FIG. 4 are formed. Since carbon and the like in the opening 18 are removed during firing, the opening 18
Remains with holes.

FIG. 7 is a sectional view taken along the line AA shown in FIG. 6, and FIG. 8 is a sectional view taken along the line BB shown in FIG. Note that hatching is omitted in FIGS. 7 and 8 for easy understanding of the illustration of the internal electrodes. Further, hatching is omitted also in the following similar drawings.

FIG. 9 shows a ceramic sintered body 20 as shown in FIGS.
It is a perspective view which shows the state after forming the groove | channel along the aa line shown in FIG. Referring to FIG. 9, upper surface 20 of sintered body 20
Grooves 21 and 22 are formed in the thickness direction from c. FIG. 10A is a sectional view taken along the line AA of FIG. 9. With reference to FIG. 10A, the extraction electrode 17 is divided by forming the groove 22, and the extraction electrodes 17 a and 17 b are configured to be exposed in the groove 22.
Is divided and the internal electrodes 12a and 12b are exposed in the groove 22. Further, by forming the groove 21, the extraction electrode is similarly divided, and the internal electrode 5 is also divided to become internal electrodes 5a and 5b which are exposed in the groove 21. Similarly, the internal electrode 8 shown in FIG. 1 and the internal electrode 1 shown in FIG.
6, and the other extraction electrode 17 shown in FIG. 3 is divided by the formation of the groove 22 and is exposed in the groove 22. Similarly, regarding the groove 21, the internal electrode 9 shown in FIG. 1, the internal electrode 13 shown in FIG. 2, and the other extraction electrode 17 shown in FIG. 3 are divided and exposed in the groove 21.

The grooves 21 and 22 can be processed by using a diamond cutter, a dicing machine or the like. The widths of the grooves 21 and 22 are, as is clear from FIG. 10A, the internal electrodes 11 and 12 in the grooves 21 and 22,
The width is selected so that the internal electrodes 5 and 6 are not exposed in the groove 22. Further, the depths of the grooves 21 and 22 are selected so as to extend below the inner electrodes located at the lowermost part of the overlapping inner electrodes.

Next, referring to FIG. 10B, the grooves 21,
22 is filled with Ag or Ag—Pd paste by using, for example, a micro dispenser, and is baked at a temperature of 850 ° C. to form the conductive layers 23 and 24. As a result, the conductive layer 24 becomes
Lead-out electrodes 17a, 17b and internal electrodes 12a, 12b
It contacts with and is electrically connected. Similarly, the conductive layer 23 is also in contact with and electrically connected to the extraction electrode and the internal electrodes 5a and 5b. Further, at this time, the opening portion 18 is also filled with the conductive paste and baked to form the external connection electrodes 25 and 26.

Next, referring to FIG. 10C, the conductive layer 2
3 and 24 have grooves 27 narrower in width and deeper than the conductive layer,
28 is formed. As a result, the conductive layer is divided and part of the conductive layer remains, so that the connecting electrodes 23a and 23b and the connecting electrodes 24a and 24b are formed. The connection electrode 24a is electrically connected to the extraction electrode 17a and the internal electrode 12a, and the connection electrode 24b is electrically connected to the extraction electrode 17b and the internal electrode 12b. In addition, the extraction electrode 17a
Is electrically connected to the external connection electrode 25, and the extraction electrode 17b is electrically connected to the external connection electrode 26.

Similarly, the connecting electrode 23a is the internal electrode 5
In addition to being electrically connected to a, it is electrically connected to one of the extraction electrodes and the external connection electrode. Connection electrode 23b
Similarly, it is electrically connected to the internal electrode 5b, and is also electrically connected to the other extraction electrode and the external connection electrode. Therefore, the connecting electrodes 24a, 24b and 23a, 23
b is configured to be electrically connected to the internal electrodes in the sintered body 20 every other layer in the thickness direction.

Next, the grooves 27 and 28 are filled with, for example, a Pd-Al-Si-based glass paste by using, for example, a micro dispenser, and after filling, for example, 800
Baking is performed at a temperature of ° C to form insulating layers 29 and 30 as shown in Fig. 11. Accordingly, the connection electrode 23
Insulating layer 2 between a and 24a and connecting electrodes 23b and 24b
It is configured such that 9 and 30 are interposed. The material forming the insulating layers 29 and 30 is not limited to the glass paste, and any material such as ceramic having an insulating property can be used.

Further, the connecting electrodes 23a, 23b and 24
Since a and 24b are not formed up to the upper surface of the sintered body 20, insulating layers 29 and 30 are formed on these connecting electrodes.
Can be covered by.

Next, referring to FIG. 12, a groove 31 and a groove 32 are formed along the line bb shown in FIGS. Figure 1
3 is a sectional view taken along the line AA of FIG. 12, and FIG. 14 is a sectional view taken along the line BB of FIG. As is clear from FIG. 14, the grooves 31 and 32 are formed in a width such that the internal electrodes arranged on both sides of the grooves 31 and 32 are not exposed on the inner walls of the grooves 31 and 32. Further, as shown in FIG. 12, the connecting electrodes 34 to 3 are formed on the outer end surface of each capacitor unit.
9 is formed, and the connecting electrodes 34 to 39 electrically connect the internal electrodes exposed on the outer end surface of each capacitor unit. The connection electrodes 34 to 39 can be formed by a known electrode forming method such as coating and baking a conductive paste.

As shown in FIG. 13, the internal electrodes 6 are connected layer by layer by the connecting electrodes 36 formed on the outer end face, and are electrically connected to the external connecting electrodes 40 via the extraction electrodes. Similarly, the internal electrodes 11 are electrically connected layer by layer by the connecting electrodes 39, and the external connection electrodes 4
1 is electrically connected to the connecting electrode 39 via the extraction electrode.

As described above, the multilayer capacitor array 33 of this embodiment shown in FIG. 12 is obtained. The multilayer capacitor array 33 of this embodiment is composed of nine capacitor units. That is, a matrix-shaped capacitor array of m = 3 and n = 3 is configured, and capacitor units 33A to 33I are configured. Referring to FIG. 13, connecting electrode 39 and connecting electrode 23a are connected to capacitor unit 33A, and connecting electrode 23b and connecting electrode 24a are connected to capacitor unit 33B.
However, for the capacitor unit 33C, the connecting electrode 24
b and the connecting electrode 36 serve as a pair of electrodes for taking out the capacitance. Since the insulating layer 29 or the insulating layer 30 and the grooves 31 and 32 are interposed between the capacitor units, the structure is such that adverse effects due to stray capacitance between the capacitor units can be reduced.

Referring to FIG. 12, the multilayer capacitor array 33 of this embodiment has, for example, reference numerals 25, 26 and 40.
Electrodes for external connection are formed as indicated by 42 to 42.
These external connection electrodes are electrically connected to the internal electrodes of each capacitor unit via the extraction electrode and the connecting electrode. Therefore, they can be mounted on the printed circuit board by bump bonding or the like to these external connection electrodes. For example, as shown in FIG. 15, external connection electrodes 25 and 42 are provided for the capacitor unit 33B, and prints are provided so as to face these parts downward and correspond to these external connection electrodes. It can be surface-mounted on the land of the circuit board by bump bonding or the like. Therefore, it is possible to perform high-density mounting without requiring a land larger than the capacitor element as in the conventional case.

Next, concrete experimental results will be described.
As the ceramic green sheets 1 to 4, slurries composed mainly of barium titanate-based dielectric ceramic powder were used, and the green sheets were molded to a thickness of 10 μm. The internal electrodes were formed by applying a conductive paste containing silver and palladium as main components. The size of the opening 18 shown in FIG. 4 was 40 μm in diameter. These ceramic green sheets are laminated and pressure-bonded and fired at 1350 ° C. to obtain a sintered body 20.
And Grooves 21 and 22 (see FIG. 9) having a width of 150 μm were formed, and a silver paste mixed with a ceramic powder was filled in the grooves 21 and 22 as a conductive paste for forming a connecting electrode, and then baked at a temperature of 850 ° C. . Then width 1
Grooves 27 and 28 of 00 μm (see FIG. 10C) are formed and filled with Pb—Al—Si based glass.
Baked at ° C. Next, grooves 31 and 32 (see FIG. 12) having a width of 300 μm are formed, connecting electrodes are formed on the outer end surface of the sintered body, and finally, three rows having a planar shape of 2.5 mm × 2.5 mm Three rows of capacitor arrays 33 (see FIG. 12) were obtained.

In comparison with the capacitor array 33 of the present embodiment, a comparative multilayer capacitor (Comparative Example 1) in which electrodes are taken out at the outer edge portion of the element and the internal electrodes are taken out using the same material with the same conditions such as the number of laminated layers. A capacitor array (Comparative Example 2) in which a plurality of capacitor functions performed by through-holes provided inside the element are continuously formed in a matrix shape is mounted on a test board of 10 mm x 10 mm for the highest density mounting. And the mounting capacity density was compared. As a result, in this embodiment, 7.3 μF / cm
While a ^2, a comparative example 1, 6.5μF / cm ^2, was 5.0μF / cm ² in Comparative Example 2.

Further, a temperature cycle test and a vibration test were conducted on these Examples and Comparative Examples 1 and 2. In the temperature cycle test, the temperature change between -25 ° C and 125 ° C is 1
After applying 000 cycles, measure the insulation resistance value and measure 10%
The samples with the above changes were considered as failures. In vibration test, 10 → 2000 → 10Hz in x, y, z directions
After each (1.55 mm) vibration was applied for 1 hour, the insulation resistance value was measured, and a sample having a change of 10% or more was regarded as a failure. As a result, the failure rate was 0% in each of the examples and the comparative examples 1 and 2.

As is clear from these results, the capacitor array of the embodiment according to the present invention is a capacitor array which has the same reliability as the conventional capacitor element and enables high-density mounting. I understand.

Second Embodiment A ceramic array of the second embodiment is manufactured by using the ceramic green sheets 1 and 2 having the internal electrodes shown in FIGS. 1 and 2 and the ceramic green sheet 50 shown in FIG. . With reference to FIG. 16, in this ceramic green sheet 50, an extraction electrode 51 is formed in a region corresponding to each capacitor unit, and an external connection electrode 52 is formed at its tip. The extraction electrode 51 and the external connection electrode 52 are similar to the internal electrodes in the ceramic green sheets 1 and 2 shown in FIGS. 1 and 2, and are printed with a conductive paste containing a conductive powder such as Ag or Ag-Pd. Alternatively, it can be formed by another conductive film forming method such as vapor deposition or plating.

As shown in FIG. 17, a plurality of plain ceramic green sheets 19 are laminated under the ceramic green sheet 50, and a predetermined number of ceramic green sheets 1 and 2 shown in FIGS. 1 and 2 are alternately laminated. Then, a plurality of plain ceramic green sheets 19 are further laminated under the pressure bonding in the thickness direction. By firing the laminated body thus obtained, a sintered body 53 shown in FIG. 18 is obtained.

Referring to FIG. 18, internal electrodes 6, 14, 10 are exposed on one end surface 53a of sintered body 53, and the other side surface 53b is not shown, but similarly FIG.
The internal electrodes 11, 7, and 15 of are exposed. Sintered body 5
On the upper surface 53c of 3, the ceramic green sheet 50
The extraction electrode 51 and the external connection electrodes 52 provided at both ends thereof are formed.

FIG. 19 is a sectional view taken along the line AA of FIG. 18, and FIG. 20 is a sectional view taken along the line BB of FIG. As is apparent from FIGS. 19 and 20, the ceramic green sheets 1 shown in FIG. 1 and the ceramic green sheets 2 shown in FIG. 2 are alternately stacked to form a structure in which internal electrodes are overlapped.

Next, referring to FIG. 21, grooves 54, 5 are formed in the sintered body 53 along the line aa shown in FIGS. 1, 2 and 16.
5 is formed. As shown in FIG. 21, the grooves 54,
By 55, the extraction electrode 51 formed on the upper surface 53c of the sintered body 53 is divided into the extraction electrodes 51a and 51b.

FIG. 22A is a sectional view taken along the line AA of FIG. As shown in FIG. 22A, the groove 5
By forming 4, 55, the extraction electrode 51 is divided into extraction electrodes 51a, 51b, and the extraction electrodes 51a, 51b are exposed in the grooves 54, 55. The internal electrode 5 is divided by the groove 54 to become internal electrodes 5a and 5b, which are exposed in the groove 54. Similarly, the internal electrode 12 is divided by the groove 55 to become internal electrodes 12 a and 12 b, which are exposed in the groove 55.

Next, referring to FIG. 22B, the grooves 54,
55 was filled with a silver paste mixed with ceramic powder using a micro dispenser as in the first embodiment, and then baked at 850 ° C. to form the conductive layer 5.
6, 57 are formed. Such conductive layers 56 and 57 are
Extraction electrodes 51a, 51b and internal electrodes 5a,
5b or the internal electrodes 12a, 12b are brought into contact with and electrically connected to each other.

Next, referring to FIG. 22C, the conductive layer 5
6 and 57, grooves 58 and 5 narrower and deeper than these widths
9 is formed. By forming the grooves 58 and 59, the conductive layer 56 is divided into connection electrodes 56a and 56b, and similarly, the conductive layer 57 is divided into connection electrodes 57a and 57b.
The connecting electrode 56a is electrically connected to the extraction electrode 51a and the internal electrode 5a, and the connecting electrode 56b is the extraction electrode 51b.
And the internal electrode 5b and the connecting electrode 57a.
Is electrically connected to the extraction electrode 51a and the internal electrode 12a, and the connection electrode 57b is electrically connected to the extraction electrode 51b and the internal electrode 12b.

Next, referring to FIG. 23, the grooves 58 and 59 are formed.
In the same manner as in the first embodiment, the Pb-Al-Si
A glass paste such as a system glass is filled, and after filling, heat treatment is performed at a temperature of, for example, about 800 ° C. to form the insulating layers 60 and 61. The insulating layer 60 insulates the connection electrodes 56a and 56b from each other, and the insulating layer 61 connects the connection electrodes 57a and 57b.
The spaces are insulated.

Next, referring to FIG. 24, grooves 62 and 63 are formed along the line bb shown in FIGS. 1, 2 and 16, and further, a portion of each capacitor unit on the outer end face of the sintered body. Connecting electrodes 65 to 5 by applying and baking conductive paste on the
70 is formed. 25 is a sectional view taken along the line AA of FIG. 24, and FIG. 26 is a sectional view taken along the line BB of FIG. Referring to FIG. 24, the multilayer capacitor array 64 is obtained by thus forming the connecting electrodes on both sides of the sintered body. In this multilayer capacitor array 64, nine capacitor units 64A to 64I are configured.

Referring to FIG. 25, for example, focusing on the capacitor unit 64C, since the internal electrode 6 is exposed on the side surface of the sintered body, the connecting electrode 67 is formed to electrically connect to the connecting electrode 67. This connection electrode 67 is electrically connected to the extraction electrode 51 and the external connection electrode 52 formed on the upper surface of the sintered body.
Also, the other internal electrode 12 in the capacitor unit 64C
b is electrically connected to the connection electrode 57b, and is electrically connected to the external connection electrode 52 via the extraction electrode 51b. Similarly, in the other capacitor units, the alternately laminated internal electrodes are electrically connected to the connection electrodes at both ends, respectively, and for external connection formed on the upper surface of the multilayer capacitor array 64 via the extraction electrodes. It is electrically connected to the electrode 52. Therefore, the external connection electrodes 52 of the respective capacitor units 64A to 64I are formed on one surface of the multilayer ceramic capacitor array 64, and these external connection electrodes 52 are used for bump bonding, for example, on the printed circuit board. It can be surface mounted.

Referring to FIG. 27, in the multilayer capacitor array of this embodiment, insulating layer 61 is formed so as to cover the upper end faces of connecting electrodes 57a and 57b. By forming the insulating layer 61 in this way, the extraction electrodes 51a, 5
It prevents electrical leakage between 1b.

Further, if necessary, as shown in FIG. 28, the covering area of the insulating layer 61 is expanded to extract the extraction electrodes 51a,
The portion 51b may also be covered with the insulating layer 61.
Next, specific experimental results will be described.

Ceramic green sheets 1, 2, 19,
As 50, a slurry containing a barium titanate-based dielectric ceramic powder as a main component and having a thickness of 10 μm was used. The internal electrodes, the extraction electrodes, and the external connection electrodes were formed by applying and baking a conductive paste containing silver as a main component. Such ceramic green sheets were laminated, pressure-bonded, and fired at 1350 ° C. to obtain a sintered body.

Width 15 using diamond cutter
After forming 0 μm grooves 54 and 55 (see FIG. 21) and filling the grooves 54 and 55 with silver paste mixed with ceramic powder as a conductive paste for forming the connecting electrodes,
Baking at a temperature of 850 ° C. Next, the groove 5 having a width of 100 μm
8 and 59 (see FIG. 22 (c)) are formed, and Pb-
It was filled with Al-Si glass and baked at 800 ° C.
Next, grooves 62 and 63 (see FIG. 24) having a width of 300 μm were formed, and finally a capacitor array 64 of 3 rows and 3 columns having a planar shape of 2.0 mm × 3.0 mm was obtained.

In comparison with the capacitor array 64 of this embodiment, a comparative multilayer capacitor (Comparative Example 3) in which the electrodes are taken out at the outer edge of the element and the internal electrodes are taken out using the same material and with the same conditions such as the number of laminated layers. A capacitor array (Comparative Example 4) in which a plurality of capacitor functions performed by through holes provided inside the element were continuously formed in a matrix was prepared. This Example and Comparative Examples 3 and 4
Each of the capacitors was mounted on a 10 mm × 10 mm test board so as to achieve the highest density mounting, and the mounting capacity densities were compared. As a result, in this example, 7.3 μF / cm ²
On the other hand, in Comparative Example 3, it was 6.5 μF / cm ² , and in Comparative Example 4, it was 5.0 μF / cm ² .

Further, a temperature cycle test and a vibration test were conducted on these Examples and Comparative Examples 3 and 4. In the temperature cycle test, the insulation resistance value was measured after 1000 cycles of temperature change between -25 ° C and 125 ° C.
Samples with 0% or more change were considered as failures. In the vibration test, 10 → 2000 → 10 in the x, y, and z directions.
After applying a vibration of Hz (1.55 mm) for 1 hour, the insulation resistance value was measured, and a sample having a change of 10% or more was regarded as a failure. As a result, the failure rate was 0% in all of this example and Comparative examples 3 and 4.

As is clear from these results, the capacitor array of the embodiment according to the present invention is a capacitor array having the same reliability as the conventional capacitor element and capable of high-density mounting. I understand.

In the first and second embodiments, the grooves 31, 32 (see FIG. 12) and the grooves 62, 63 (see FIG. 24) for forming spaces between the capacitor units are formed.
However, the formation of such a groove is preferable from the viewpoint of reducing the stray capacitance, but it is not always necessary in the present invention. Further, even if a low dielectric layer such as glass is formed in such a groove, it is effective in reducing the stray capacitance.

Further, in the above-mentioned first and second embodiments, the illustrated ceramic green sheets were used and laminated as they were, and the capacitor array of 3 rows × 3 columns was obtained by going through the above respective steps. A large ceramic green sheet may be used to manufacture a capacitor array having m ≧ 4 and n ≧ 4, and then cut in the thickness direction to obtain a capacitor array having a predetermined number of rows and columns.

In the above embodiment, the formation of the groove, the formation of the extraction electrode, the formation of the external connection electrode and the like may be performed before sintering the laminated body. It should be pointed out here that the method of manufacturing the capacitor array of the present invention is not limited to the order and method of the steps of the above embodiment.

[0057]

As described above, according to the present invention, the external connection electrode is provided on one surface of the sintered body of each capacitor unit, and can be mounted on a printed circuit board by bump bonding or the like. it can. Therefore, high-density mounting can be performed, and the mounting cost can be reduced.

Further, since the external connection electrode is provided for each capacitor unit, the capacitance of each capacitor unit can be taken out independently. Further, since no through hole electrode or the like is used, it is possible to reduce the size of the capacitor element.

[Brief description of drawings]

FIG. 1 is a plan view showing a ceramic green sheet used in a first embodiment and a second embodiment of the present invention.

FIG. 2 is a plan view showing a ceramic green sheet used in the first and second embodiments of the present invention.

FIG. 3 is a plan view showing a ceramic green sheet used in the first embodiment of the present invention.

FIG. 4 is a plan view showing a ceramic green sheet used in the first embodiment of the present invention.

FIG. 5 is a perspective view illustrating a state in which ceramic green sheets are laminated in the first embodiment of the present invention.

FIG. 6 is a perspective view showing a sintered body obtained in the first embodiment of the present invention.

7 is a sectional view taken along the line AA of FIG.

8 is a sectional view taken along the line BB of FIG.

FIG. 9 is a perspective view showing a state where grooves along the line aa shown in FIGS. 1 to 4 are formed in the sintered body in the first embodiment of the present invention.

FIG. 10 is a cross-sectional view showing a step of forming a conductive layer in the groove shown in FIG. 9 and then forming a narrow groove in the first embodiment of the present invention.

11 is a cross-sectional view showing a state where an insulating layer is formed in the narrow groove shown in FIG. 10 (c).

FIG. 12 is a perspective view showing a multilayer capacitor array according to a first embodiment of the present invention.

13 is a sectional view taken along the line AA of FIG.

14 is a sectional view taken along the line BB of FIG.

FIG. 15 is an enlarged perspective view showing the vicinity of an external connection electrode in the first embodiment of the present invention.

FIG. 16 is a plan view showing a ceramic green sheet used in the second embodiment of the present invention.

FIG. 17 is a perspective view illustrating a state in which ceramic green sheets are laminated in the second embodiment of the present invention.

FIG. 18 is a perspective view showing a sintered body obtained in the second embodiment of the present invention.

19 is a sectional view taken along the line AA of FIG.

20 is a cross-sectional view taken along the line BB of FIG.

FIG. 21 is a perspective view showing a state in which grooves are formed in the sintered body along the line aa shown in FIGS. 1, 2 and 16 in the second embodiment of the present invention.

FIG. 22 is a cross-sectional view showing a step of forming a conductive layer in the groove shown in FIG. 21 and then forming a narrow groove in the second embodiment of the present invention.

23 is a cross-sectional view showing a state where an insulating layer is formed in the narrow groove shown in FIG. 22 (c).

FIG. 24 is a perspective view showing a multilayer capacitor array according to a second embodiment of the present invention.

25 is a cross-sectional view taken along the line AA of FIG.

26 is a cross-sectional view taken along the line BB of FIG.

FIG. 27 is an enlarged perspective view showing the vicinity of the external connection electrode in the second embodiment of the present invention.

FIG. 28 is an enlarged perspective view showing the vicinity of an external connection electrode when an insulating layer is formed so as to cover the extraction electrode in the second embodiment of the present invention.

[Explanation of symbols]

1-4 ... Ceramic green sheet 5-16 ... Internal electrode 17 ... Extraction electrode 18 ... Opening part 19 ... Plain ceramic green sheet 20 ... Sintered body 21, 22 ... Groove 23, 24 ... Conductive layer 23a, 23b, 24a , 24b, 34 to 39 ... Connection electrodes 17, 17a, 17b ... Extraction electrodes 25, 26, 40 to 42 ... External connection electrodes 29, 30 ... Insulating layer 33 ... Multilayer ceramic capacitor array 33A to 33I ... Capacitor unit 50 ... Ceramic Green sheets 51, 51a, 51b ... Lead-out electrodes 52 ... External connection electrodes 54, 55 ... Grooves 56, 57 ... Conductive layers 56a, 56b, 57a, 57b, 65-70 ... Connecting electrodes 60, 61 ... Insulating layers 64 ... Lamination Capacitor array 64A to 64I ... Capacitor unit

Claims (1)

[Claims] 1. A plurality of capacitor units formed by forming a plurality of internal electrodes in a ceramic sintered body so as to overlap each other in a thickness direction with a ceramic layer interposed therebetween, wherein m rows × n columns (however, provided). (m and n are integers of 2 or more) arranged side by side in a matrix, wherein the internal electrodes of each capacitor unit have grooves extending from one surface of the sintered body in the thickness direction on both sides of each capacitor unit, or Connecting electrodes formed on the inner surface of the groove and on the end surface of the sintered body alternately exposed to the end surface of the sintered body and electrically connected to the internal electrode; An external connection electrode provided on the one surface and an extraction electrode connecting the connection electrode and the external connection electrode are provided, and the external connection electrode is connected to each of the capacitor units. A capacitor array, wherein the connecting electrodes are separated by an insulating layer.