JPH0737321Y2 - 表面実装用半導体装置 - Google Patents

表面実装用半導体装置

Info

Publication number
JPH0737321Y2
JPH0737321Y2 JP1988120561U JP12056188U JPH0737321Y2 JP H0737321 Y2 JPH0737321 Y2 JP H0737321Y2 JP 1988120561 U JP1988120561 U JP 1988120561U JP 12056188 U JP12056188 U JP 12056188U JP H0737321 Y2 JPH0737321 Y2 JP H0737321Y2
Authority
JP
Japan
Prior art keywords
semiconductor device
lead
soldering
solder
surface mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1988120561U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0241454U (en:Method
Inventor
秀明 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1988120561U priority Critical patent/JPH0737321Y2/ja
Publication of JPH0241454U publication Critical patent/JPH0241454U/ja
Application granted granted Critical
Publication of JPH0737321Y2 publication Critical patent/JPH0737321Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP1988120561U 1988-09-14 1988-09-14 表面実装用半導体装置 Expired - Lifetime JPH0737321Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988120561U JPH0737321Y2 (ja) 1988-09-14 1988-09-14 表面実装用半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988120561U JPH0737321Y2 (ja) 1988-09-14 1988-09-14 表面実装用半導体装置

Publications (2)

Publication Number Publication Date
JPH0241454U JPH0241454U (en:Method) 1990-03-22
JPH0737321Y2 true JPH0737321Y2 (ja) 1995-08-23

Family

ID=31366782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988120561U Expired - Lifetime JPH0737321Y2 (ja) 1988-09-14 1988-09-14 表面実装用半導体装置

Country Status (1)

Country Link
JP (1) JPH0737321Y2 (en:Method)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61214546A (ja) * 1985-03-20 1986-09-24 Hitachi Tobu Semiconductor Ltd リ−ド切断成型装置
JPS62171148A (ja) * 1986-01-23 1987-07-28 Oki Electric Ind Co Ltd チツプキヤリア型ｉｃの製造方法

Also Published As

Publication number Publication date
JPH0241454U (en:Method) 1990-03-22

Similar Documents

Publication Publication Date Title
JPH0737321Y2 (ja) 表面実装用半導体装置
US5406458A (en) Printed circuit board having tapered contact pads for surface mounted electrical components
JP2000261131A (ja) 分割フットパターン
JPS6342416B2 (en:Method)
JPH04237155A (ja) 電子部品
JP2523512Y2 (ja) フラットパッケ−ジ型ｉｃ
JPH0625017Y2 (ja) Ｌｓｉパッケ−ジのリ−ド構造
JPH05343593A (ja) 接続端子
JPH0157991B2 (en:Method)
JPH03298Y2 (en:Method)
JPH0419798Y2 (en:Method)
JPH04171855A (ja) 半導体装置用リードフレーム
JPH0550141B2 (en:Method)
JPH0321096B2 (en:Method)
JP2991174B2 (ja) 半導体装置用リードフレームおよびその半導体装置の製造方法
JPS6225900Y2 (en:Method)
JPH0195589A (ja) リードレス部品の取付構造
JP2002239719A (ja) はんだこて
JPH0334919Y2 (en:Method)
JPH03220792A (ja) Ｐｇａ型集積回路の実装構造
JPH0416421Y2 (en:Method)
JPH0416423Y2 (en:Method)
JPH0817983A (ja) 半田めっき装置
JPH0577948U (ja) 表面実装部品のリード構造
JPH0349397Y2 (en:Method)