JPH0733468Y2 - Frequency synthesizer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of use) The present invention relates to a frequency synthesizer for optimizing the loop characteristics of a PLL loop by switching the cutoff frequency of a loop filter.

(Prior Art) Conventionally, a frequency synthesizer using a phase-locked loop (hereinafter referred to as "PLL circuit") as a local oscillation source or a transmission wave oscillation source of a wireless transceiver that performs multiple channel switching has been put to practical use. ing.

With this frequency synthesizer as the transmission wave oscillation source, and
When a voltage-controlled oscillator is used as a modulator by adding a modulation signal, there is a problem that the cut-off frequency characteristic of the PLL loop affects the modulation frequency characteristic.

In recent years, the number of wireless devices that handle data transmission has increased, and low-speed data transmission is performed, so this modulation frequency characteristic, particularly the DC cutoff characteristic, becomes a problem. As a method for solving this, the modulation frequency characteristic can be extended to a low frequency by lowering the cutoff frequency of the loop filter. However, this method has a drawback that the response time of the PLL loop, that is, the channel switching time becomes long when it is operated as a frequency synthesizer.

As a method of compensating for the above-mentioned drawbacks, there is a method of increasing the cutoff frequency of the loop filter at the time of switching the channel and then switching the loop filter to lower the cutoff frequency after a certain period of time, that is, after the PLL loop becomes stable. However, when using this method, a control signal for switching the loop filter is required.

(Problems to be solved by the invention) Therefore, the conventional frequency synthesizer requires a dedicated control line for switching, which causes a problem that the interface of the channel switching signal increases by one. This is important for small-sized machines, especially handy transceivers, where it is indispensable to reduce the size of even one interface.

By the way, in recent years, PLL ICs for frequency synthesizers that are generally commercially available and used for the above-mentioned handy transceivers, etc.
For example, a μPD2833CNEC data book or the like uses about 17 bits of serial data as a frequency switching designation, that is, a channel switching signal of a variable frequency divider.

A conventional example of the above frequency synthesizer will be described below with reference to FIGS.
It will be described with reference to the drawings. The output of the voltage controlled oscillator 3 is input to the variable frequency divider 4. The output of the variable frequency divider 4 is phase-compared with the output of the reference frequency oscillator 1 by the phase comparator 2, passes through a loop filter 15 composed of resistors 11, 12, 13 and a capacitor 14 and is fed back to the voltage controlled oscillator 3. .

The data signal input terminal 22 is a serial data input terminal for specifying the frequency division number, and the clock signal input terminal 23 is a terminal for inputting a synchronization clock at the time of serial data input. The shift register 6 converts the serial data input from the data signal input terminal 22 into parallel data and inputs the parallel data to the data latch circuit 5. The data latch circuit 5 detects the rising edge of the strobe signal input from the strobe signal terminal 21 and inputs the parallel data in the shift register 6 to the variable frequency divider 4. By this, the frequency division number is designated.

On the other hand, a modulation signal is applied to the modulation terminal 24 to change the frequency of the voltage controlled oscillator 3 to apply FM modulation. The switch 7 is a switch for switching the cut-off frequency of the loop filter 15. The switch 7 is turned on by a signal applied to the loop filter switching terminal 25 when the frequency division number is designated or the channel is designated, and the resistor 12 is shorted. A loop filter with a resistor 12 short
Cutoff frequency of 15 becomes high and channel switching time becomes short.

FIG. 3 is a waveform diagram showing the timing of channel designation. D is serial data, C is a clock signal, ST is a strobe signal, and SW is a control signal for the switch 7.

The serial data and the clock signal are simultaneously transmitted and input to the shift register 6. After that, the strobe signal rises, the frequency division number designating data is latched by the data latch circuit 5, and is supplied to the variable frequency divider 4. After the frequency division number is designated, the switch 7 for switching the cut-off frequency of the loop filter 15 is operated to be on for a predetermined time t.

As is clear from FIG. 2 and the explanation of its operation,
An interface line for operating the switch 7 is provided.

SUMMARY OF THE INVENTION An object of the present invention is to provide a frequency synthesizer using a PLL, in which the number of interface lines is reduced to facilitate miniaturization of a small machine such as a handy transceiver.

(Means for Solving the Problems) In order to achieve the above-mentioned object, a frequency synthesizer according to the present invention comprises a reference frequency oscillator, a phase comparator for comparing the phases of a reference frequency and a feedback frequency of the reference frequency oscillator, A loop filter configured by a resistor and a capacitor, which suppresses an unnecessary component of the phase comparator output, and a switch for changing the cut frequency of the loop filter,
A voltage-controlled oscillator that receives the output of the phase comparator that has passed through the loop filter, a shift register that converts serial data for specifying the frequency division number into parallel data, and data that captures the data in the shift register by a strobe signal. A frequency synthesizer comprising a latch circuit and a variable frequency divider that divides the voltage controlled oscillator output based on the data latched by the data latch circuit and supplies the divided frequency as the feedback frequency to the phase comparator. A signal is used to operate the switch and the strobe signal is sent for a certain period of time to raise the cutoff frequency of the loop filter for a certain period of time.

(Example) Hereinafter, the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of a frequency synthesizer according to the present invention. In FIG. 1, the control line for controlling the switch 7 is shared with the strobe signal terminal 21 for designating the frequency division number. The other parts are the same as in FIG. The strobe signal input to the strobe signal terminal 21 is added for a certain period of time after the channel is designated, that is, for the response time of the PLL loop, and the switch 7 is turned on during that period to shorten the switching time. When the strobe signal is stopped after a fixed time, the switch 7 is turned off and the cutoff frequency of the loop filter 15 becomes low.

FIG. 4 is a waveform diagram for explaining the timing of channel designation in the present invention. Each symbol in FIG. 4 is the same as that in FIG. In FIG. 4, after the serial data D and the clock signal C have been transmitted, the frequency division number is designated to the variable frequency divider 4 at the rising edge of the strobe signal ST, and the strobe signal is transmitted for a fixed time t to cause the switch. Turn 7 on.

(Effects of the Invention) As described in detail above, the present invention makes the strobe signal line for specifying the frequency division number of the variable frequency divider and the control line for switching the cutoff frequency of the loop filter common, so that the strobe signal rises. By specifying the frequency division number of the variable frequency divider and switching the loop filter while sending the strobe signal for a certain period of time, the channel switching time is fast, the modulation frequency characteristic is good, and the interface line is There is an effect that a frequency synthesizer with less noise can be obtained.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a frequency synthesizer according to the present invention, FIG. 2 is a circuit diagram of a conventional frequency synthesizer, FIG. 3 is a timing chart when a channel of a conventional circuit is designated, and FIG. 4 is a book. This is a timing chart when designating a channel of a devised circuit. 1 ... Reference frequency oscillator, 2 ... Phase comparator, 3 ... Voltage controlled oscillator, 4 ... Variable frequency divider, 5 ... Data latch circuit, 6 ... Shift register, 7 ... Switch, 11 to 13 ... Resistor, 14 …… Capacitor 15 …… Loop filter 21 …… Strobe signal terminal 22 …… Data signal input terminal 23 …… Clock signal input terminal 24 …… Modulation terminal 25 …… Loop filter switching terminal

Claims (2)

[Scope of utility model registration request] 1. A loop comprising a reference frequency oscillator, a phase comparator for comparing the phases of a reference frequency and a feedback frequency of the reference frequency oscillator, a resistor and a capacitor, and suppressing an unnecessary component of the output of the phase comparator. A filter, a switch for changing the cut frequency of the loop filter, a voltage controlled oscillator that receives the output of the phase comparator that has passed through the loop filter, and serial data that specifies the frequency division number into parallel data. A shift register, a data latch circuit for fetching the data of the shift register by a strobe signal, and the frequency comparator output frequency divider based on the data latched by the data latch circuit, and the phase comparator as the feedback frequency. A frequency synthesizer comprising a variable frequency divider for supplying the The frequency synthesizer is characterized in that the cutoff frequency of the loop filter is raised for a certain period of time by operating the switch with a probe signal and sending out the strobe signal for a certain period of time. 2. The frequency synthesizer according to claim 1, wherein the voltage controlled oscillator is a voltage controlled oscillator having a modulation signal input terminal.