JPH07307437A - High density packaging method - Google Patents

Abstract

PURPOSE:To enable bare chips to be three-dimensionally packaged thereby greatly increasing the package density by a method wherein, plural semiconductor chips are overlapped with one another so that the pin array of the plural semiconductor chips may be arranged in the same positions. CONSTITUTION:Two semiconductor chips 11, 12 having the same circuit pattern are provided. At this time, the semiconductor chip 11 is composed of circuits of 13, 14, 15 while the chip 12 is formed according to the mask pattern of the semiconductor chip 11. That is, the semiconductor chip 12 is formed so that the lateral inversion relation may be brought about when the mask pattern of the semiconductor chip 11 is turned over. Thus, the same directions of the pin arrays in the semiconductor chips 11 and 12 will be taken for simplifying the circuit pattern of the printed substrate. Furthermore, when the sizes of semiconductor chips are different, the wire bonding and flip chip packaging can be combined thereby enabling the high density packaging to be made feasible.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC for a micro electronic device.
The present invention relates to a high-density mounting method for mounting a chip, and more particularly, to a high-density mounting method for stacking two ICs in bare chip mounting.

[0002]

2. Description of the Related Art When packaging a semiconductor device, a space for connecting the semiconductor device and a lead frame, a space for molding, and a space for expanding a lead pitch required for soldering are required. The packaged IC becomes large.
Therefore, it becomes impossible to increase the mounting density. For a device for mounting semiconductor chips at high density, see Japanese Patent Laid-Open No. 5-47998. There is also a bare chip mounting technology in which a semiconductor chip incorporated inside a package is barely mounted on a substrate. The bare chip mounting is very effective for ultra-small electronic devices such as calculators, IC cards, and headphone stereos.

[0003]

However, since the bare chip mounting is planar mounting, a significant improvement in mounting density cannot be expected. If the semiconductor chips can be mounted at high density using bare chip mounting, the device can be further downsized. Therefore, high-density mounting of semiconductor chips using bare chip mounting is desired.

The present invention has been made in consideration of the above points, and enables bare chips to be three-dimensionally mounted,
An object of the present invention is to provide a high-density mounting method capable of dramatically improving the mounting density.

[0005]

According to the present invention, in a high-density mounting method for mounting a plurality of semiconductor elements, each wiring of the plurality of semiconductor elements is formed so as to overlap with the wiring of another semiconductor element. When the semiconductor elements of are stacked,
This is a high-density mounting method characterized in that pin arrangements of a plurality of semiconductor elements are arranged at the same position.

[0006]

The semiconductor chip 12 is formed on the basis of the mask pattern used when forming the semiconductor chip 11. As a result, the semiconductor chips 11 and 12 can be mounted at high density, and the circuit pattern on the printed board can be simplified.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. 1 and 2 are views showing a semiconductor chip. 1A and 2A are side views of the semiconductor chip, and FIGS. 1B and 2B are bottom views of the semiconductor chip.
The semiconductor chip shown in FIG. 1 and the semiconductor chip shown in FIG. 2 have almost the same shape. In FIG.
1 is a semiconductor chip. Bumps 2a to 2f connected to the electrodes are provided on the element formation surface (front surface) of the semiconductor chip 1. The bumps 2a to 2f and a conductor pattern on a substrate (described later) are flip-chip mounted. Further, in FIG. 2, 3 is a semiconductor chip. Aluminum electrodes 4a to 4f are provided on the element formation surface of the semiconductor chip 3. The aluminum electrodes 4a to 4f and the conductor pattern on the substrate are wire-bonded. When the semiconductor chip 1 and the semiconductor chip 2 are superposed, referring to FIGS. 1 and 2, the bumps 2a to 2f and the aluminum electrodes 4a to 4f overlap each other. For example, the aluminum electrodes 4a-4
It is also possible to shift f by a half pitch in the arrow direction Y or in the direction opposite to the arrow direction Y.

FIG. 3 is a side view showing a case where the semiconductor chips 1 and 3 are used for high-density mounting. An adhesive layer 5 is provided on the back surface of the semiconductor chip 1, and the back surface of the semiconductor chip 3 is bonded to the adhesive layer 5. The bumps 2a to 2f formed on the semiconductor chip 1 are soldered to the conductor pattern 7 formed on the substrate 8. The aluminum electrodes 4a to 4f provided on the semiconductor chip 3 are wire-bonded to the conductor pattern 7 formed on the substrate 8. In this way, semiconductor chips can be mounted at high density. It is possible to apply this mounting method to, for example, a semiconductor chip for image processing. The semiconductor chip 1 is a color signal (BY) chip and the semiconductor chip 3 is a color signal (RY) chip.
This can be realized by newly mounting a semiconductor chip for the luminance signal Y on the back surface of the substrate 8 on which the components 3 and 3 are mounted.

By the way, when two semiconductor chips (for example, memory chips) having the same circuit are mounted by the above-mentioned method, respective element forming surfaces are mounted in opposite directions to the substrate. Therefore, the left and right pin arrangement is reversed,
The print pattern on the board becomes complicated. In order to deal with such a case, the following method is adopted in the present invention. FIG. 4 is a diagram showing two semiconductor chips having the same circuit pattern. The semiconductor chip 11 is the circuit 1
3, 14, and 15. The semiconductor chip 12 is a chip formed based on the mask pattern of the semiconductor chip 11. That is, the semiconductor chip 12 is formed so that the left and right sides when the mask pattern of the semiconductor chip 11 is turned upside down are in a mirror image relationship. By forming the semiconductor chip 12 in this way, the pin arrangement of the semiconductor chip 11 and the pin arrangement of the semiconductor chip 12 are in the same direction. Therefore, the circuit pattern on the printed circuit board can be simplified, which in turn enables high-density mounting.

Next, the case of mounting semiconductor chips of different sizes such as a microcomputer and a cache memory will be described. 5 and 6 are views showing a semiconductor chip. 5A and 6A are side views of the semiconductor chip, and FIGS. 5B and 6B are bottom views of the semiconductor chip. The semiconductor chip shown in FIG. 5 and the semiconductor chip shown in FIG. 6 have different sizes, and the semiconductor chip 21 is smaller in size than the semiconductor chip 23. Bumps 22 a to 22 f are provided on the element formation surface (front surface) of the semiconductor chip 21. This bump 2
2a to 22f are connected to the element formation surface of the semiconductor chip 23 described later. Aluminum electrodes 24a to 24h are provided on the element formation surface of the semiconductor chip 23. The aluminum electrodes 24a to 24h and the conductor pattern on the substrate are wire-bonded.

FIG. 7 is a side view of high-density mounting using semiconductor chips (semiconductor chips 21 and 23) of different sizes. The back surface of the semiconductor chip 23 is a substrate 27.
It is die-bonded to the conductor pattern 26 formed above. The element formation surface of the semiconductor chip 21 is flip-chip mounted on the element formation surface of the semiconductor chip 23. In addition, the aluminum electrode 2 on the element formation surface of the semiconductor chip 23
4a to 24h are wire-bonded to the conductor pattern 26 formed on the substrate 27. By wire-bonding the semiconductor chip closer to the substrate to the conductor pattern, a shorter wire can be used and a higher speed operation can be performed. In this way, semiconductor chips can be mounted at high density.

[0012]

According to the present invention, high-density mounting becomes possible by bonding semiconductor chips of the same shape. Further, in the case of semiconductor chips having the same circuit, the pin arrangement is made the same by using a mirror surface mask pattern. This enables high-density mounting and simplifies the circuit pattern on the substrate. Further, in the case of semiconductor chips having different sizes, it is possible to perform high-density mounting by combining wire bonding and flip chip mounting.

[Brief description of drawings]

FIG. 1 is a side view and a bottom view of a semiconductor chip.

FIG. 2 is a side view and a bottom view of a semiconductor chip.

FIG. 3 is a side view when high-density mounting is performed using semiconductor chips having the same shape.

FIG. 4 is a diagram showing two semiconductor chips having the same circuit.

FIG. 5 is a side view and a bottom view of a semiconductor chip.

FIG. 6 is a side view and a bottom view of a semiconductor chip.

FIG. 7 is a side view when high-density mounting is performed using semiconductor chips of different sizes.

[Explanation of symbols]

 1, 3, 21, 23 Semiconductor element 5 Adhesive layer

 ─────────────────────────────────────────────────── --- Continuation of the front page (72) Inventor Toshitaka Senuma 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Shigeru Uchida 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Shinji Takada 6-735 Kitashinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Yasumasa Mizushima 6-735 Kitashinagawa, Shinagawa-ku, Tokyo Sony Incorporated (72) Inventor Norio Oga 6-735 Kitashinagawa, Shinagawa-ku, Tokyo Sony Corporation

Claims (2)

[Claims] 1. A high-density mounting method for mounting a plurality of semiconductor elements, wherein each wiring of the plurality of semiconductor elements is formed so as to overlap wiring of another semiconductor element, and the plurality of semiconductor elements are stacked. And a pin arrangement of the plurality of semiconductor elements are arranged at the same position. 2. The high-density mounting method according to claim 1, wherein the plurality of semiconductor elements are on a substrate.