JPH07302911A - Manufacture of thin film semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the number of processes when a thin film transistor, provided with a silicide layer on a source region and a drain region, is manufactured. CONSTITUTION:A thin insulating film, with which silicification can be prevented and ions can be passed through, and a metal film 27, which is as thin as to let ions to pass through and can be silicified, are formed on a semiconductor thin film 25, and ions are implanted into the semiconductor thin film 25 using a photoresist ion-blocking layer 28, formed on the metal film 27, as a mask. At this time, a silicide layer 29 is formed on the surface of the semiconductor thin film 25 in the region other than the ion-blocking layer 28 using ion- implanting energy. In this case, it is unnecessary to perform a surface treatment before formation of the metal film 27, and accordingly, the number of process can be reduced. Also, as the ion-blocking layer 28 is formed by photoresist, the ion-blocking layer 27 can be formed by performing few number of processes.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film semiconductor device.

[0002]

2. Description of the Related Art As a thin film semiconductor device, for example, a thin film transistor used as a switching element of an active matrix type liquid crystal display device is known. Some of such thin film transistors have a silicide layer on the source region and the drain region in order to reduce the sheet resistance and increase the on-current. Next, an example of manufacturing such a conventional thin film transistor will be described with reference to FIGS. First,
As shown in FIGS. 7A and 7B, a gate electrode 2 made of chromium and a gate line 3 are formed on a predetermined portion of the upper surface of a transparent substrate 1 made of glass or the like, and a gate made of silicon nitride is formed on the upper surface. An insulating film 4 is formed, and a semiconductor thin film 5 made of silicon, amorphous silicon, polysilicon or the like is formed on the upper surface of the insulating film 4, and silicon nitride is formed at a predetermined portion on the upper surface of the gate electrode 2. The ion blocking layer 6 is formed. Next, when ions such as phosphorus and boron are implanted, ion implantation regions 5a are formed in the semiconductor thin film 5 in regions other than under the ion blocking layer 6.

Next, as shown in FIGS. 8 (A) and 8 (B),
A silicidable metal film 7 made of chromium or the like is formed on the upper surface by plasma CVD, and a photoresist pattern 8 is formed on a predetermined portion of the upper surface. In this case, the photoresist pattern 8 is formed so that the ion blocking layer 6 and the ion blocking layer 6 form a substantially cross shape. A silicide layer 9 is formed between the metal film 7 and the semiconductor thin film 5. Next, the metal film 7, the silicide layer 9 and the semiconductor thin film 5 are etched by using the photoresist pattern 8 as a mask, as shown in FIGS. 9 (A) and 9 (B). That is, the metal film 7 remains only under the photoresist pattern 8, the silicide layer 9 remains only therebelow, and the semiconductor thin film 5 remains only thereunder and below the ion blocking layer 6. In this state, the metal film 7 is formed so as to cross the ion blocking layer 6 and form a substantially cross shape with the ion blocking layer 6, and the semiconductor thin film 5 having a substantially cross shape under the metal film 7 and under the ion blocking layer 6. Are formed.
A portion of the semiconductor thin film 5 below the ion blocking layer 6 is a channel region 5b made of an intrinsic region, and both sides thereof are a source region 5c and a drain region 5d made of an ion implantation region 5a. After that, the photoresist pattern 8 is removed, and then the metal film 7 is removed.

Next, as shown in FIGS. 10A and 10B, a pixel electrode 10 made of ITO is formed at a predetermined position on the upper surface. Next, the source electrode 11, the drain electrode 12, and the drain line 13 made of an aluminum-titanium alloy are formed at predetermined locations on the upper surface. In this state, the source region 5c of the semiconductor thin film 5 is connected to the pixel electrode 10 via the silicide layer 9 and the source electrode 11, and the drain region 5d is connected to the drain electrode 12 via the silicide layer 9. Thus, a thin film transistor having the silicide layer 9 on the source region 5c and the drain region 5d is manufactured.

[0005]

However, in the conventional method of manufacturing such a thin film transistor, firstly,
Before forming the metal film 7 in the steps shown in FIGS. 8A and 8B, it is necessary to clean the surface of the semiconductor thin film 5. That is, since the natural oxide film is formed on the surface of the semiconductor thin film 5, the silicide layer 9 cannot be formed even if the metal film 7 is formed thereon. Therefore, there is a problem in that it is necessary to perform a surface treatment with ammonium fluoride or the like to remove the natural oxide film, so that the number of steps is increased accordingly. Second, FIG. 7 (A),
In order to prevent ions from being implanted into the semiconductor thin film 5 below the ion shielding layer 6 made of silicon nitride when the ions are implanted in the step shown in FIG.
Has to be relatively thick, for example, about 2000 Å, and therefore it takes time to form a silicon nitride layer which is a source of the ion blocking layer 6, and the formed silicon nitride layer is photolithographically formed. There is a problem in that the patterning is performed by lithography and the number of steps is also increased. Although it is conceivable to form the ion blocking layer 6 with a photoresist, in this case, the photoresist is directly formed on the semiconductor thin film 5,
As a result, there is another problem that it becomes difficult to remove the photoresist in an unnecessary portion. An object of the present invention is to provide a method for manufacturing a thin film semiconductor device having a silicide layer, which can reduce the number of steps.

[0006]

The invention according to claim 1 is
After forming a semiconductor thin film on the substrate, a thin insulating film and a silicidable metal film are formed on the semiconductor thin film,
An ion blocking layer is formed at a predetermined location on the metal film, ions are implanted into the semiconductor thin film using the ion blocking layer as a mask, and the ion implantation energy at this time causes the semiconductor thin film in a region other than under the ion blocking layer. A silicide layer is formed on the surface of the. According to a third aspect of the present invention, the ion blocking layer is formed of a photoresist.

[0007]

According to the first aspect of the invention, even if the insulating film is formed between the semiconductor thin film and the metal film, the silicide layer is formed on the surface of the semiconductor thin film in the region other than under the ion blocking layer due to the ion implantation energy. Since it is possible to form, it is not necessary to perform surface treatment before forming a metal film,
Therefore, the number of steps can be reduced accordingly. According to the third aspect of the present invention, even if the ion blocking layer is formed of a photoresist, the photoresist is formed on the metal film, so that the photoresist in unnecessary portions can be easily removed. Therefore, the ion barrier layer can be formed in a short time and with a small number of steps.

[0008]

1 to 6 show respective manufacturing steps of a thin film transistor to which an embodiment of the present invention is applied. Therefore, a method of manufacturing the thin film transistor of this embodiment will be described with reference to these drawings in order.

First, as shown in FIGS. 1 (A) and 1 (B),
A gate electrode 22 and a gate line 23 made of chrome or the like are provided at predetermined places on the upper surface of a transparent substrate 21 made of glass or the like.
Is formed to a film thickness of about 1000Å. Next, a gate insulating film 24 made of silicon nitride is formed on the upper surface of the film with a thickness of 4000 Å.
And a semiconductor thin film 25 made of single crystal silicon, amorphous silicon, polysilicon, or the like is formed on the upper surface to a film thickness of about 500 Å. Next, the surface of the semiconductor thin film 25 is oxidized by O ₂ plasma treatment or the like to form the insulating film 26 made of a silicon oxide film. Next, a silicidable metal film 27 made of chromium or the like is formed on the upper surface by plasma CVD.

By the way, the film thickness of the insulating film 26 is normally thin enough to prevent silicidation and allow ions to pass therethrough, and is about 10 to 50 Å. Therefore, in this state, the metal film 27 and the semiconductor thin film 25 are
The formation of a silicide layer due to is prevented. The film thickness of the metal film 27 is thin enough to allow the passage of ions, and thin enough to ensure a transmittance sufficient to expose the photoresist to the back surface exposure described later. , 50 to 200Å.

Next, as shown in FIGS. 2 (A) and 2 (B),
An ion blocking layer 28 made of photoresist is formed at a predetermined position on the upper surface. In this case, since the ion blocking layer 28 is formed by back surface exposure (exposure from the lower surface side of the transparent substrate 21) using the gate electrode 22 and the gate line 23 as a mask, the gate electrode 22 and the gate line 2 are formed.
3 is formed over the entire area. Therefore, the length L of the ion blocking layer 28 on the gate electrode 22 in the channel length direction is the same as the width of the gate electrode 22. As described above, even if the ion blocking layer 28 is formed by the photoresist, since the photoresist is formed on the metal film 27, it is possible to easily remove the unnecessary portion of the photoresist, and thus the ion blocking layer is formed. The layer 27 can be formed in a short time and with a small number of steps.

Next, as shown in FIGS. 3 (A) and 3 (B),
Using the ion blocking layer 28 as a mask, ions containing phosphorus or boron that make the semiconductor thin film 25 n-type or p-type are implanted.
The implanted ions pass through the metal film 27 and the insulating film 26 and are injected into the semiconductor thin film 25 in a region other than below the ion blocking layer 28 to form an ion-implanted region 25a. Further, due to the ion implantation energy at this time, the metal (chromium) from the metal film 27 penetrates the insulating film 26 in the region other than under the ion blocking layer 28 and enters the semiconductor thin film 25 in the region other than under the ion blocking layer 28. Injected,
Silicide layers 29 and 30 are formed on the surface of the semiconductor thin film 25 and the lower surface of the metal film 27. After that, the ion blocking layer 28 is removed.

Here, as an example, phosphorus 1%, hydrogen 99
% Ion for power 100 W, acceleration voltage 1 kV,
After implanting at a dose of 1 × 10 ¹⁶ / cm ² , the ion blocking layer 28, the metal film 27, the upper silicide layer 30 and the insulating film 26 are removed, and the ion blocking layer 28 is absent in this state. The following results were obtained when the sheet resistance was measured at each of the following locations. That is, the sheet resistance without the ion blocking layer 28 is 140 Ω / □.
While the sheet resistance was extremely small, the sheet resistance at the place where it was was extremely high at 10 ¹⁰ Ω / □ or more. As is clear from this measurement result, the low-resistance silicide layer 29 is formed on the surface of the semiconductor thin film 25 in the region other than under the ion blocking layer 28 due to the ion implantation energy, and the portion which becomes the channel region under the ion blocking layer 28 is formed. It is understood that this is a high resistance region.

Next, as shown in FIGS. 4 (A) and 4 (B),
A photoresist pattern 31 is formed at a predetermined position on the upper surface. In this case, the photoresist pattern 31 is formed so that the gate electrode 22 is formed in a crotch shape and forms a substantially cross shape with the gate electrode 22, and the width D thereof is the same as the desired channel width. Next, photoresist pattern 3
1 as a mask, the metal film 27, the upper silicide layer 3
0, the insulating film 26, the lower silicide layer 29, and the semiconductor thin film 25 are etched, as shown in FIGS. 5 (A) and 5 (B).

That is, the metal film 27, the silicide layer 30 on the upper side, the insulating film 2 only under the photoresist pattern 31.
6, the lower silicide layer 29 and the semiconductor thin film 25 remain. Therefore, in this state, the semiconductor thin film 25
Is formed so that the gate electrode 22 is crotch-shaped and forms a substantially cross shape with the gate electrode 22. In addition, the insulating film 26
Semiconductor thin film 2 on the lower side of the non-chromium-implanted portion of
Reference numeral 5 is a channel region 25b made of an intrinsic region, and both sides thereof are a source region 25c and a drain region 25d made of an ion implantation region 25a. As a result, the semiconductor thin film 25 has the channel region 25b formed to have the same length L as the width of the gate electrode 22, and is formed on both sides of the channel region 25b to have the same width D as the channel region 25b. The structure has the source region 25c and the drain region 25d. After this,
The photoresist pattern 31 is removed, and then the metal film 2 is removed.
Remove 7. In this case, when the metal film 27 is etched with cerium ammonium nitrate (SIS, TW solution), the upper silicide layer 30 and the insulating film 27 having chromium intruded therein.
Are simultaneously etched and removed (see FIG. 6B).

Next, as shown in FIGS. 6 (A) and 6 (B),
The pixel electrode 32 made of ITO is formed at a predetermined position on the upper surface so as to have a film thickness of about 500 Å. Next, a source electrode 33, a drain electrode 34, and a drain line 35 made of an aluminum-titanium alloy are formed in a predetermined thickness on the upper surface with a film thickness of 3000.
Å Form to about. In this state, the silicide layer 29 and the source electrode 3 are formed in the source region 25c of the semiconductor thin film 25.
3 is connected to the pixel electrode 32 through the drain region 25.
The drain electrode 33 is connected to d via the silicide layer 29. Thus, the thin film transistor of this embodiment is manufactured.

As described above, in the manufacturing method of this embodiment,
Even if the insulating film 26 is formed between the semiconductor thin film 25 and the metal film 27, the silicide layer 29 can be formed on the surface of the semiconductor thin film 25 in the region other than under the ion blocking layer 28 by the ion implantation energy. , Metal film 2
It is not necessary to perform a surface treatment before depositing 7 and therefore the number of steps can be reduced accordingly. Also,
As described above, even if the ion blocking layer 28 is formed by the photoresist, this photoresist is used as the metal film 2.
Since it is formed on the photoresist 7, the unnecessary portion of the photoresist can be easily removed, so that the ion blocking layer 27 can be formed in a short time and with a small number of steps. Furthermore, since the film thickness of the metal film 27 is as thin as about 50 to 200Å and the film thickness of the insulating film 26 is as thin as about 10 to 50Å, the etching accuracy, that is, the state remaining in the state shown in FIGS. The processing accuracy of the insulating film 26 with respect to the gate electrode 22 can be improved.

Further, in the manufacturing method of this embodiment, since the ion blocking layer 28 is formed of photoresist, the following effects are obtained as compared with the conventional case. That is, first, in the conventional case, since the silicon nitride layer that is the source of the ion blocking layer is formed by CVD to a relatively large thickness of about 2000 Å, the amount of the film-forming material deposited on the inner wall of the CVD apparatus is small. There is a problem that the number of cleaning chambers becomes considerably large, and therefore it takes time to clean the inner wall of the CVD apparatus. The manufacturing method of this embodiment does not have such a problem. Secondly, in the conventional case, since etching with hydrofluoric acid is performed when patterning the ion blocking layer made of silicon nitride,
There is a problem that the gate insulating film is largely damaged by hydrofluoric acid and the breakdown voltage of the gate insulating film is lowered. The manufacturing method of this embodiment does not have such a problem.

Further, the semiconductor thin film 25 of the thin film transistor obtained by the manufacturing method of this embodiment has a channel region 25b formed in the same length L as the width of the gate electrode 22.
And the source region 25c and the drain region 25d are formed on both sides of the channel region 25b and have the same width D as the width D of the channel region 25b, and the width D of the channel region 25b is the desired width. Has become. Therefore, the effective channel width does not increase, the substantial C _GS (capacitance between the gate electrode and the source electrode) can be reduced, and the off current I
_{The off} can also be reduced, and the display characteristics of the liquid crystal display device can be improved. By the way, Figure 10
In the case of the conventional thin film transistor shown in (A) and (B), the metal film 7 extends across the ion blocking layer 6 and the ion blocking layer 6 is formed.
Are formed so as to form a substantially cross shape, and the substantially cross-shaped semiconductor thin film 5 is formed under the metal film 7 and the ion blocking layer 6, so that the effective channel width of the semiconductor thin film 5 increases. In addition, the C _GS substantially increases and the off current I _off also increases, which causes deterioration of display characteristics of the liquid crystal display device.

In the above embodiment, the insulating film 26 is formed of the silicon oxide film formed by oxidizing the surface of the semiconductor thin film 25.
It may be formed by a silicon nitride layer formed by CVD on the above. In this case, the film thickness of the silicon nitride layer is about several tens to several hundreds Å, preferably about 100Å. As described above, when the film thickness is thin, it is possible to form the film in a short time, and the labor for cleaning the inner wall of the CVD apparatus can be reduced. In addition, in this case, even when etching with hydrofluoric acid is performed when patterning the ion blocking layer made of silicon nitride, the etching time can be shortened, and therefore, the gate insulating film is less damaged by hydrofluoric acid, so that The breakdown voltage of the film can be improved.

Although the ion blocking layer 28 is formed by backside exposure in the above embodiment, it may be formed by frontside exposure. Further, although the ion blocking layer 28 is formed of a photoresist in the above-mentioned embodiments, it may be formed of a metal that does not become silicidized, such as an aluminum-titanium alloy. In this case, after forming a metal layer such as an aluminum-titanium alloy that does not form a silicide,
A photoresist pattern is formed thereon, and the photoresist pattern is used as a mask for etching to form an ion blocking layer made of a metal that is not silicidized.

[0022]

As described above, according to the first aspect of the present invention, even if the insulating film is formed between the semiconductor thin film and the metal film, the region other than the region below the ion blocking layer is caused by the ion implantation energy. Since the silicide layer can be formed on the surface of the semiconductor thin film in, there is no need to perform surface treatment before forming the metal film, and therefore the number of steps can be reduced accordingly. According to the third aspect of the present invention, even if the ion blocking layer is formed of a photoresist, the photoresist is formed on the metal film, so that the photoresist in unnecessary portions can be easily removed. Therefore, the ion barrier layer can be formed in a short time and with a small number of steps.

[Brief description of drawings]

FIG. 1A is a plan view showing a state in which a gate electrode, a gate insulating film, a semiconductor thin film, an insulating film, and a metal film are formed on a transparent substrate in manufacturing a thin film transistor to which an embodiment of the present invention is applied, B) is a sectional view taken along the line BB.

FIG. 2A is a plan view showing a state in which an ion blocking layer is formed in the same manufacturing process, and FIG. 2B is a sectional view taken along the line BB.

FIG. 3A is a plan view of a state in which ions are implanted using the ion blocking layer as a mask and a silicide layer is formed by the ion implantation energy at this time in the manufacturing,
(B) is sectional drawing which follows the BB line.

FIG. 4A is a plan view showing a state where a photoresist pattern is formed after removing the ion blocking layer in the same manufacturing process;
(B) is sectional drawing which follows the BB line.

FIG. 5A is a plan view showing a state in which an element is formed in the same manufacturing process, and FIG. 5B is a sectional view taken along line BB thereof.

FIG. 6A is a plan view showing a state where a source electrode, a drain electrode and the like are formed in the same manufacturing process, and FIG.
Sectional drawing which follows the B line.

FIG. 7A is a plan view showing a state in which a gate electrode, a gate insulating film, a semiconductor thin film, and an ion blocking layer are formed on a transparent substrate in manufacturing a conventional thin film transistor;
Is a sectional view taken along the line BB.

FIG. 8A is a plan view showing a state where a metal film and a photoresist pattern are formed in the same manufacturing process, and FIG. 8B is a sectional view taken along the line BB.

FIG. 9A is a plan view showing a state in which an element is formed in the same manufacturing process, and FIG. 9B is a sectional view taken along the line BB.

FIG. 10A is a plan view showing a state where a source electrode, a drain electrode, and the like are formed in the same manufacturing process, and FIG.
-A sectional view taken along line B.

[Explanation of symbols]

 21 transparent substrate 25 semiconductor thin film 26 insulating film 27 metal film 28 ion blocking layer 29 silicide layer

[Procedure amendment]

[Submission date] July 1, 1994

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0009

[Correction method] Change

[Correction content]

First, as shown in FIGS. 1 (A) and 1 (B),
A gate electrode 22 and a gate line 23 made of chrome or the like are provided at predetermined places on the upper surface of a transparent substrate 21 made of glass or the like.
Is formed to a film thickness of about 1000Å, and then a gate insulating film 24 made of silicon nitride is formed on the upper surface thereof to a film thickness of 4000Å.
And a semiconductor thin film 25 made of single crystal silicon, amorphous silicon, polysilicon, or the like is formed on the upper surface to a film thickness of about 500 Å. Next, the surface of the semiconductor thin film 25 is oxidized by O ₂ plasma treatment or the like to form the insulating film 26 made of a silicon oxide film. Next, a silicidable metal film 27 made of chromium or the like is formed on the upper surface by plasma CVD or sputtering.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H01L 21/316 X 29/40 A

Claims (6)

[Claims] 1. A semiconductor thin film is formed on a substrate, a thin insulating film and a silicidable metal film are formed on the semiconductor thin film, and an ion blocking layer is formed at a predetermined position on the metal film. Ions are implanted into the semiconductor thin film using the ion blocking layer as a mask, and a silicide layer is formed on the surface of the semiconductor thin film in a region other than under the ion blocking layer by ion implantation energy at this time. Manufacturing method. 2. The method of manufacturing a thin film semiconductor device according to claim 1, wherein the ions implanted into the semiconductor thin film include ions that make the semiconductor thin film n-type or p-type. 3. The method of manufacturing a thin film semiconductor device according to claim 1, wherein the ion blocking layer is made of photoresist. 4. The ion blocking layer is formed by backside exposure, wherein the film thickness of the metal film is thin enough to ensure a transmittance enough to expose a photoresist to light. Of manufacturing a thin film semiconductor device of. 5. The method of manufacturing a thin film semiconductor device according to claim 1, wherein the insulating film is a silicon oxide film formed by oxidizing the surface of the semiconductor thin film. 6. The method of manufacturing a thin film semiconductor device according to claim 1, wherein the insulating film is made of silicon nitride formed on the semiconductor thin film.