JPH07161902A - Semiconductor device and lead frame used for its manufacture - Google Patents

Abstract

PURPOSE:To increase the number of pins and narrow a lead pitch in a semiconductor device. CONSTITUTION:A semiconductor device 1 comprises a package 2 made of a resin, a lead 3 extending over inside and outside the package 2, a semiconductor chip located inside the package 2. An inner lead 6 extending over inside the package is alternately sectioned up and down with one sheet of insulating film 12, and also the inner end of respective inner leads and the electrode of a semiconductor chip 9 are interconnected with a conductive wire 13. The tip of the inner lead 6 is alternately made long and short. The tip of short lead 11 extends on the insulating film 12, and the tip of a long lead 10 projects beyond the lower surface side of the insulating film 12, and the wire 13 is connected with the projection part. As a result, a wire-bonding position becomes zigzag-like arrangement, and since there is a a difference in level, it can be achieved that the inner lead 6 is made narrow. that is, an outer lead 7 is made narrow (the increase of the number of pins).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a lead frame used for manufacturing the same, and more particularly to a semiconductor device and a lead frame capable of achieving a large number of pins.

[0002]

2. Description of the Related Art Electronic devices are required to have high-density mounting in terms of functions, and to be lightweight, compact, and thin in terms of mounting. As a result, the terminals (leads,
The pin) pitch is becoming narrower and the number of terminals is increasing, and the number of pins tends to increase. Further, in order to reduce the manufacturing cost of electronic components, as a package form, a resin-encapsulated (resin package) type semiconductor device, which is cheap in material and good in productivity, is often used. As the resin package type semiconductor device, one using a metal lead frame and one using an insulating film having leads formed on its surface (TC
P: Tape Carrier Package) and the like are known.

Regarding semiconductor packages, for example,
December 1989 issue of "Electronic Materials" published by the Industrial Research Board, December 1 of the same year
It is described in "Issue of Diversification of Semiconductor Packages and Assembly Systems" in P37-P43 issued daily. This document describes increasing the number of pins (increasing the number of leads) and narrowing the pin pitch. Also, in this document, wire bonding is described as one of the technical problems for increasing the number of pins, increasing the chip size, and reducing the size and thickness. In the section corresponding to the reduction of the lead pitch in wire bonding, “The lead pitch is 42 NiFe alloy of t0.15 mm t.
It seems that about 2 mm pitch is the limit. With this plate thickness,
The lead width is about 0.1 mm, which is a half of this, and in order to bond it into this, the lead bonding width must also be made stable and small. For this purpose, it is important to improve the lead frame fixing state, especially in the case of the ultrasonic combined use method. Although methods such as fixing the leads by taping have been used, the lead position accuracy varies widely, and it is necessary to recognize all pin positions. ...
In addition, the shape of the joint is affected by the shape of the capillary tip,
In order to reduce the lead joint width, the face diameter must be reduced. FIG. 8 shows an example of the shape for micro joining. Is stated. " FIG. 8 shows a conventional capillary in the case where the tip of the Au wire (wire) has a spherical diameter of 80 μm, and a capillary for micro-joining in the case where the tip of the Au wire has a spherical diameter of 60 μm. Is described as 160 μm in the former case and 120 μm in the latter case. In addition, in this document,
Various pin insertion type and surface mounting type semiconductor devices have been disclosed. For example, QFP (Quad Fla
t Package) is disclosed.

On the other hand, Japanese Patent Laid-Open No. 2-209760 describes a multiple lead frame. In this lead frame, only the inner lead side is vertically stacked to achieve a large number of pins. However, the upper and lower inner leads are not separated by an insulator.

Further, JP-A-2-156661 discloses a lead frame. In this publication, "When stacking a plurality of lead frames, some of the inner leads are fixed via an insulating layer, and the outer leads are arranged so that they are at least on the same plane from the ends of the package. This prevents short circuits between leads and short circuits of bonding wires. ” In this lead frame, the tips of the inner leads extend to substantially the same line.

On the other hand, "Nikkei Micro Device", June 1989, issued by Nikkei BP, June 1, 1989, P103 to P109, and "Nikkei Micro Device," 1991, 2 issued by Nikkei BP.
Monthly issue, issued February 1, the same year, P68 to P70 discloses a QFP (Quad Flat Package) having a lead frame having a multilayer structure. The multilayer lead frame according to the above-mentioned document has a three-layer structure in which the inner lead is divided into three frames for signal, power supply, and ground, and each frame is bonded with a double-sided adhesive tape. The lead patterns of the three frames are patterns that respectively take part of the unit lead patterns that form the inner leads. Then, the unit lead pattern is formed by stacking the three frames. Further, in this document, the multi-layered lead frame is QFP, PLCC (Pl
astic Leaded Chip Carrier), DIP (Dual Inline
Package)). The latter document also describes a structure in which a metal frame serving as an outer lead and a metal frame for a power source are adhered with a tape having adhesive on both sides.

In addition, the "Electronic Materials" issued by the Industrial Research Committee, February 1993 issue, issued on February 1, 1993, the page 51 and the cover of the UV curable resin are straight, curved, square, polygonal, etc. A device for connecting each lead by arbitrarily drawing is disclosed.

[0008]

In the case of one flat lead frame due to the increase in the number of pins of the QFP, the bonding space width of the inner lead becomes smaller, and the semiconductor chip and the inner chip in which LSI (Large Scale Integrated Circuit Device) is incorporated It will be difficult to connect to the leads. For example, the distance between the inner leads may be too short even if a space where bonding can be realized is created, and crosstalk or short circuits between wires may occur.

An object of the present invention is to provide a semiconductor device which can achieve a large number of pins.

Another object of the present invention is to provide a lead frame capable of achieving a large number of pins. The above and other objects and novel features of the present invention will be apparent from the description of the present specification and the accompanying drawings.

[0011]

The outline of the representative ones of the inventions disclosed in the present application will be briefly described as follows. That is, the semiconductor device of the present invention is
A resin package, leads extending inside and outside the resin package, semiconductor chips located in the package, and inner leads extending in the package are alternately divided into upper and lower parts by a single insulating film. ,
Further, the inner end of each inner lead is connected to the electrode of the semiconductor chip by a conductive wire, and the tip of the inner lead is alternately long and short. The tip of the short lead extends on the insulating film, and the tip of the long lead projects from the lower surface side of the insulating film, and a wire is connected to the projecting portion.

A lead frame for manufacturing such a semiconductor device has a rectangular frame-shaped first frame body, a tab provided at the center of the first frame body, and the first frame body. A first frame (a lower lead frame portion) including a tab suspension lead extending and supporting the tab, and a plurality of first leads extending from the first frame toward the tab; Second frame (upper lead frame), which is composed of a rectangular frame-shaped second frame body having substantially the same size as the frame body and a plurality of second leads extending from the second frame body toward the tab. Part), and the lower lead frame part and the upper lead frame part are overlapped and bonded with a resin body. In addition, between the leads (first leads) of the upper lead frame portion, the leads (second lead) of the lower lead frame portion
Lead) is located. The first lead is lowered one step at the inner lead portion, is attached to the lower surface side of the insulating film, and protrudes beyond the insulating film (long lead). The inner end of the second lead is located on the insulating film (short lead).
Therefore, the insulating film is arranged so as to penetrate the step portion of the first lead and the second lead.

[0013]

In the semiconductor device of the present invention, the leads extending toward the tab to which the semiconductor chip is fixed are alternately attached to the insulating film at the portions corresponding to the sides of the tab, and the length is short. Since the wire bonding positions are in a staggered arrangement, the capillaries holding the wires do not interfere with the wires connected to the adjacent leads during wire bonding, and the lead pitch can be narrowed.

In the lead frame of the present invention, the wire bonding positions are in a staggered arrangement, so that the capillaries holding the wires do not interfere with the wires connected to the adjacent leads during wire bonding, and the lead pitch is narrowed. Can be achieved.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of another cross-section, FIG. 3 is a plan view showing a lead frame according to the present invention, and FIG. 5 is a plan view showing the lower lead frame part, FIG. 5 is a plan view showing the upper lead frame part which also constitutes the upper part of the lead frame, and FIG. 6 is a partial cross section showing the connected state part of the upper and lower lead frame parts. FIG. 7 is a perspective view showing a part of the lead frame on which the lead frame of the present invention is chip-bonded and wire-bonded, and FIG. 8 is a cutaway part of the lead frame of the present invention which is transfer-molded. FIG. 8 is a plan view of the same lead frame, and FIG. 8 is a sectional view of the same lead frame that is transfer molded.

The semiconductor device 1 of the present invention is shown in FIGS.
As shown in FIG. 2, the package 2 has a rectangular shape and a plurality of leads 3 extending inside and outside the package 2. The semiconductor device 1 of this example has a QFP structure in which the leads 3 project from the four sides of the package 2. The shape of the lead 3 (outer lead 7) protruding from the package 2 is a gull wing type, and the tip is a flat lead foot portion 4 as shown in FIG. A support (tab) 5 is provided inside the package 2.
Is provided. A semiconductor chip (chip) 9 is fixed to the upper surface of the tab 5 via a bonding material (not shown).

On the other hand, this is one of the features of the present invention. The inner lead 6 located inside the package 2 is
As shown in FIGS. 1, 2, and 7, the long lead 10 and the short lead 11 are alternately arranged. The long lead 10
As shown in the figure, it is bent one step in the middle in the middle, and the insulating film 12 crosses this step portion.
The insulating film 12 is formed of, for example, a polyimide resin having a thickness of 50 μm, has a single frame shape, and is arranged so as to surround the periphery of the lead foot portion 4, the lead 3 and the tab 5. An adhesive agent (not shown) is applied to both surfaces of the insulating film 12 so that the long lead 10 is adhered to the lower surface and the short lead 11 is adhered to the upper surface. Short lead 11
The wire bonding area at the tip of the insulating film 1
2, the long lead 10 is located on the insulating film 12
The wire bonding region at the tip of the long lead 10 is located away from the insulating film 12 because it protrudes beyond. And these long lead 10 and short lead 1
1 and the wire bonding area at the tip of the semiconductor chip 9
The electrode 8 (see FIG. 7) is connected with a wire 13, which is conductive, for example, an Au wire.

The difference between the long lead 10 and the short lead 11 is 0.5 mm, for example. The pitch of the outer leads 7 of the leads 3 is, for example, 0.5 mm, and the lead width of the outer lead portion is 120 μm. Further, the pitch of the tips of the inner leads 6 is 190 μm, and the width of the inner leads is 80 to 9 μm.
It is about 0 μm. Therefore, at the time of wire bonding, even if the thickness of the tip of the Au wire is 80 μm, even if the wire is connected to the wire bonding region at the tip of the inner lead, the lead 3 fixed to the adjacent lead 3 comes into contact. Interference will not occur. And
By arranging the wire bonding positions in the inner leads in a staggered arrangement in this manner, the lead pitch can be further narrowed, and the outer leads 7 can be formed.
It is also possible to make the pitch of 0.3 mm.

In the semiconductor device 1 of the present invention, two lead frames are superposed, and the outer leads 7 project from a certain height of the package 2.
Therefore, the resin body 14 for keeping the two lead frames together during assembly remains on the horizontal projection 15 of the outer lead 7. Long lead 10, short lead 11
The connection relationship between the resin body 14 and the resin body 14 is as shown in FIG. That is, the long lead 10 and the short lead 11 are embedded in the resin body 14 so as to be located on the same plane and are connected to each other.

Next, a method of manufacturing the semiconductor device of the present invention will be described. In manufacturing the semiconductor device 1, FIG.
A lead frame 20 as shown in is prepared. The lead frame 20 includes a first frame (lower lead frame portion) 21 and a second frame (upper lead frame portion) 31.
And a structure in which the and are overlapped with each other, and a metal dam for connecting the leads 3 is not provided. Then, the lead 3 (short lead 11) of the lower lead frame portion 21 is sandwiched in the center and extends between the leads 3 (long lead 10) of the upper lead frame portion 31. The long lead 10 and the short lead 11 are connected by a resin body 14. In the resin body 14, the adjacent leads 3 (long lead 10 and short lead 11) are located on substantially the same plane even when the two lead frames are stacked.
It serves as a dam that connects the leads 3 and suppresses the resin from flowing out during transfer molding. The lower lead frame portion 21 and the upper lead frame portion 31 are manufactured by patterning an Fe-Ni alloy plate or a Cu alloy plate having a thickness of 0.1 mm by etching or pressing.
In the resin package, a lead portion that enters the package is referred to as an inner lead 6, and a portion that exits the package is referred to as an outer lead 7.

As shown in FIG. 4, the lower lead frame portion 21 connects a pair of outer frames 22 extending in parallel with each other, and connects the pair of outer frames 22 and extends in a direction orthogonal to the outer frame 22. It has a frame structure formed by a pair of inner frames 23. A rectangular tab (support) 5 is provided in the center of the frame.
And the tabs 5 are supported by tab suspension leads 25 extending from the wide width portions 24 at the corners of the pair of frames. In addition, a plurality of leads 3 (long lead 1) are provided from the inner frame 23 and the outer frame 22 toward the tab 5.
0) extends substantially parallel. The lead pitch of the long leads 10 is 1.0 mm, and the width on the frame side (outer leads 7) is 120 μm. Long lead 10
The width of the inner lead 6 at the tip (inner end) of the is 80 to 9
It is about 0 μm. In addition, a rectangular frame-shaped insulating film 12 is formed around the tab 5 so as to surround the tab 5.
Is pasted. The insulating film 12 is formed of, for example, a polyimide resin having a thickness of 50 μm, and has an adhesive agent (not shown) applied on both sides. The tips of the long leads 10 are slightly projected and exposed inside the insulating film 12 to form a wire bonding region. The long lead 10 is bent in the shape of one step near the insulating film 12. Since the bent portion of the long lead 10 and the outer edge of the insulating film 12 are substantially aligned with each other, the bent portion of the long lead 10 is omitted in the plan view. Although the outer frame 22 is provided with a circular hole or a long hole for guiding, it is omitted in the drawing.

As shown in FIG. 5, the upper lead frame portion 31 connects a pair of outer frames 32 extending in parallel with each other and connects the pair of outer frames 32 and extends in a direction orthogonal to the outer frame 32. It has a frame structure formed by a pair of inner frames 33. Such a frame structure is formed so as to match the frame structure of the lower lead frame portion 21. In addition, from the inner frame 33 and the outer frame 32 to the lower lead frame portion 21.
The plurality of leads 3 extend substantially parallel to the tab 5 of FIG. The lead 3 is, for example, 0.5 mm larger than the lead 3 (long lead 10) of the lower lead frame portion 21.
Since it is short, it is also called short lead 11. The lead pitch of the short lead 11 on the outer lead 7 side is 1.0 mm, and the width of the outer lead 7 is 120 μm. The width of the inner lead 6 portion at the tip (inner end) of the short lead 11 is about 80 to 90 μm. Further, when the upper lead frame portion 31 is overlapped with the lower lead frame portion 21, the short lead 11 is positioned in the middle of the long lead 10 of the lower lead frame portion 21. Then, the tips of the short leads 11 are positioned on the insulating film 12 attached to the upper lead frame portion 31. The outer frame 22 is provided with a circular hole or a long hole for guiding,
It is omitted in the figure. These circular holes and elongated holes are formed so as to coincide with the circular holes and elongated holes for guiding the lower lead frame portion 21.

In manufacturing the lead frame 20, the lower lead frame portion 21 and the upper lead frame portion 3 are used.
1 is prepared. After that, both are positioned and superposed. After that, as shown in FIG. 3, the resin body 14 is applied and a certain region in the frame is pressed by a press (while the resin body 14 is cured and cured),
The lead frame 20 as shown in FIGS. 3, 6 and 9 is formed.

Next, as shown in FIG. 7, chip bonding and wire bonding are performed on the lead frame 20. That is, the lead frame 20
The semiconductor chip 9 is fixed onto the tab 5 of FIG. After that, the electrodes 8 of the semiconductor chip 9 and the inner ends of the leads 3 (long lead 10, short lead 11) are electrically conductive wires 1
Connected at 3. At the time of this wire bonding, since the wire bonding positions (areas) of the long lead 10 and the short lead 11 are in a staggered arrangement, the capillaries for wire bonding do not cause contact with adjacent wires and the wire bonding can be performed without any trouble. Can be done. In addition, the wire 13 that electrically connects the electrode 8 of the semiconductor chip 9 and the lead 3 changes its position on the lead 3 side in a staggered arrangement, so that the leads do not come into contact with each other and crosstalk does not occur. . As a result, the pitch of the outer leads 7 can be narrowed. That is, the pitch of the outer leads 7 can be 0.3 mm or less.

Next, the assembled lead frame 2
As shown in FIG. 9, 0 is clamped to the upper and lower molds 35 and 36 of the transfer molding device, and the resin 37
To form the package 2.

Next, the lead frame 20 is removed from the upper and lower molds 35, 36, the unnecessary lead frame portions are cut and removed, and lead molding is performed, for example, as shown in FIGS. 1 and 2. The gull wing type semiconductor device 1 is manufactured.

[0027]

(1) In the semiconductor device of the present invention, the inner leads are alternately made long and short, and the inner leads lined up with the insulating film alternately arranged in two steps, so that the wire bonding positions are staggered. When a wire is connected to one of the inner lead portions, the capillaries holding the wire do not come into contact with the adjacent wires, and the wire bonding can be performed accurately even if the inner lead pitch is narrowed. The effect is obtained.

(2) In the semiconductor device of the present invention, since the inner leads are alternately long and short, the wire bonding positions are in a zigzag arrangement, so that crosstalk in the wires can be prevented.

(3) According to the above (1) and (2), in the semiconductor device of the present invention, the inner leads are alternately made long and short, and the inner leads lined up with the insulating film are alternately arranged in two steps up and down. Therefore, the wire bonding positions are arranged in a staggered arrangement, and the synergistic effect that the pitch of the outer leads can be narrowed can be obtained.

(4) Due to the above (3), according to the present invention, it is possible to provide a semiconductor device capable of achieving a large number of pins.

(5) According to the present invention, it is possible to provide a lead frame capable of achieving a large number of pins.

(6) Due to the above (1) to (5), the present invention provides a lead frame and a semiconductor device which are compact and can achieve high density and high integration by increasing the number of pins and narrowing the lead pitch. It is possible to obtain the synergistic effect.

The invention made by the present inventor has been specifically described based on the embodiments, but the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say, for example,
In the above-described embodiment, two lead frames are laminated and bonded together, but a plurality of lead frames may be bonded together. And one of them may be used as a ground frame.

FIG. 10 shows a semiconductor device 1 according to another embodiment of the present invention. In this embodiment, the long lead is partially used as the ground lead 40.

In the above description, the invention made mainly by the present inventor is the application field which is the background of the invention.
However, the present invention is not limited to this. For example, it can be applied to a hybrid integrated circuit device (semiconductor device) in which a ceramic wiring substrate having a semiconductor chip mounted on a tab is fixed, a TCP manufacturing technique, or the like. INDUSTRIAL APPLICABILITY The present invention can be applied at least to the manufacture of a semiconductor device in which the lead pitch needs to be narrowed.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view of another section of the semiconductor device according to the embodiment of the present invention.

FIG. 3 is a plan view showing a lead frame according to an exemplary embodiment of the present invention.

FIG. 4 is a plan view showing a lower lead frame portion forming a lower portion of a lead frame according to an exemplary embodiment of the present invention.

FIG. 5 is a plan view showing an upper lead frame portion constituting an upper portion of a lead frame according to an exemplary embodiment of the present invention.

FIG. 6 is a partial cross-sectional view showing a connected state portion of upper and lower lead frame parts in a lead frame according to an exemplary embodiment of the present invention.

FIG. 7 is a perspective view showing a part of a lead frame in which chip bonding and wire bonding are performed on the lead frame according to the embodiment of the present invention.

FIG. 8 is a plan view of a lead frame according to an embodiment of the present invention, in which a transfer mold is applied to the lead frame and a part of the lead frame is cut away.

FIG. 9 is a cross-sectional view showing a lead frame transfer-molded in a lead frame according to an embodiment of the present invention.

FIG. 10 is a sectional view of a semiconductor device according to another embodiment of the present invention.

[Explanation of symbols]

1 ... Semiconductor device, 2 ... Package, 3 ... Lead, 4 ... Lead foot part, 5 ... Tab, 6 ... Inner lead, 7 ... Outer lead, 8 ... Electrode, 9 ... Semiconductor chip, 10 ... Long lead, 11 ... Short Lead, 12 ... Insulating film, 13 ...
Wires, 14 ... Resin body, 15 ... Horizontal protrusions, 20 ... Lead frame, 21 ... First frame (lower lead frame section), 22 ... Outer frame, 23 ... Inner frame, 24 ... Wide part, 25 ...
Tab suspension leads, 31 ... Second frame (upper lead frame portion), 32 ... Outer frame, 33 ... Inner frame, 35 ... Mold upper mold, 36 ... Mold lower mold, 37 ... Resin, 40 ... Ground lead.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takayuki Okinaga 5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Inside Hitate Cho El SII Engineering Co., Ltd. (72) Inventor Takashi Emata Tokyo 5-20-1 Kamimizuhoncho, Kodaira-shi Hitate Super L.S.I Engineering Co., Ltd. (72) Inventor Sei Horiuchi 5-20-1 Kamimizuhoncho, Kodaira-shi, Tokyo Hitate Cho-LS・ Inside I Engineering Co., Ltd. (72) Inventor Makoto Omata 5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Inside Hiritsu Cho-LS Engineering Co., Ltd. (72) Inventor Atsushi Honda 2326 Imai, Ome-shi, Hitachi Ltd. Device Development Center (72) Inventor Hiromichi Suzuki 5-chome, Josuihonmachi, Kodaira-shi, Tokyo No. 20-1 Incorporated company Hitachi Ltd. Semiconductor Division

Claims (3)

[Claims] 1. A resin package, a lead extending inside and outside the resin package, a semiconductor chip located in the package, and an inner lead extending in the package are alternately arranged above and below an insulating film. A semiconductor device which is divided and in which the inner end of each inner lead and the electrode of the semiconductor chip are connected by a conductive wire, and the tip of the inner lead is alternately long and short. Semiconductor device. 2. The semiconductor device according to claim 1, wherein the tips of the inner leads extend on the insulating film. 3. A rectangular frame-shaped first frame body, a tab provided at the center of the first frame body, and a tab suspension lead extending from the first frame body and supporting the tab. And a first frame composed of a plurality of first leads extending from the first frame toward the tab, and a rectangular frame-shaped second frame having substantially the same size as the first frame. A second frame comprising a body and a plurality of second leads extending from the second frame toward the tab, and the first frame and the second frame are laminated and bonded together, and A lead frame in which the second lead or the first lead is located between the leads or between the second leads, wherein one of the first lead or the second lead is lowered one step at the inner lead portion and 2 leads are attached to the insulation film that penetrates the step Further, one of the first lead and the second lead is a short lead whose tip is positioned on the insulating film, and the other extending on the lower surface side of the insulating film is a long lead extending beyond the insulating film. Lead frame characterized by being a lead.