JPH0697129A - Fabrication of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a method for fabricating a semiconductor device in which adverse effect due to level difference is prevented by making a gentle slope at the level difference part. CONSTITUTION:The method for fabricating a semiconductor device comprises a step for applying a positive resist thickly on the entire surface of an underlying film 101 having level difference and then exposing the positive resist, a step for removing the underlying film 101 through anisotropic etching using the partially left positive resist 103 as a mask, and step for removing the residual positive resist 103.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device.

[0002]

2. Description of the Related Art In a conventional method of manufacturing a semiconductor device, a semiconductor device is manufactured by repeating a process of laminating and patterning various films.

[0003]

However, in the above manufacturing method, a step is formed on the surface of the substrate, which interferes with the subsequent patterning process and etching process, and the necessary wiring is cut, and conversely, unrelated wiring is short-circuited. Had a problem. The adverse effect of this step becomes more remarkable as miniaturization progresses, and some flattening techniques have been adopted as measures for preventing it, but there has been a problem that it cannot be said to be sufficient yet.

Further, due to miniaturization, in MOS transistors, a structure called LDD having source and drain regions of low impurity concentration is essential.
There has been a problem that the LDD region length cannot be formed long with good controllability in a range suitable for miniaturization.

It is an object of the present invention to provide a manufacturing method for obtaining a semiconductor device which solves the above-mentioned problems by providing a gentle inclination to the step portion.

[0006]

The main means adopted by the semiconductor device of the present invention in order to achieve the above object is that a positive resist is applied over the entire surface of a base film having a step on the surface and then exposed and developed. And a step of removing the underlying film by anisotropic etching using the partially remaining positive resist as a mask, and a step of removing the remaining positive resist.

[0007]

In the semiconductor device of the present invention, the positive resist is intentionally left on the step portion and is used as a mask for anisotropic etching, so that the step portion can be gently inclined. As a result, it is possible to provide a manufacturing method for obtaining a semiconductor device that solves the above problems.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. 1A to 1D are cross-sectional views in order of the steps of an embodiment of the method for manufacturing a semiconductor device according to the present invention.

As shown in FIG. 1A, the step portion 102 is formed on the base film 101 by the IC process.
Next, as shown in FIG. 1B, a thick positive resist is applied over the entire surface of the base film 101 so as to sufficiently cover the step portion 102, and then exposed. At this time, when the exposure amount is set to expose the positive resist thickness of the flat portion, the positive resist is thicker in the step portion 102 than in the flat portion, so that the positive resist side wall 103 is formed after the development. Remain.

Next, as shown in FIG. 1C, the base film 101 is anisotropically etched by using the positive resist side wall 103 as a mask. Next, as shown in FIG. 1D, the positive resist side wall 103 is removed. By the above, a gentle slope can be given to the step portion, and the flattening effect is great.

2A to 2D are cross-sectional views in order of the steps of another embodiment of the method for manufacturing a semiconductor device according to the present invention. Figure 2
As shown in (a), the gate electrode 204 made of polysilicon or the like is formed on the gate insulating film 205 on the silicon substrate 201 by the IC process.

Next, as shown in FIG. 2B, an insulating film 206 is formed, a positive resist is thickly coated on the insulating film 206 and then exposed. At this time, if the exposure amount is set to expose the positive resist thickness of the flat portion, the positive resist is thicker in the step portion 202 than in the flat portion, so that the positive resist side wall 203 is formed after the development. Remain.

Next, as shown in FIG. 2C, the insulating film 206 is removed by anisotropic etching using the positive resist side wall 203 as a mask. Next, as shown in FIG. 2D, when the positive resist side wall 203 is removed, the insulating film 2 is removed.
The side spacer 207 made of 06 can be formed. The side spacer 207 can have a wider width than the conventional side spacer even when the thickness of the insulating film 206 cannot be increased. Therefore, the side spacer 207 is used to form the source and drain regions having a low impurity concentration called LDD. In this case, the LDD region length can be formed long with good controllability in a range suitable for miniaturization. Therefore, the breakdown voltage can be improved as compared with the conventional MOS transistor.

FIGS. 3A to 3D are sectional views in order of the steps of another embodiment of the method for manufacturing a semiconductor device according to the present invention. Figure 3
As shown in (a), the base film 30 is formed by the IC process.
A stepped portion 302 is formed at 1.

Next, as shown in FIG. 3B, after a polysilicon layer 306 is formed on the entire surface by a CVD method or the like, a positive resist is formed on the polysilicon layer 306 so as to sufficiently cover the step portion 302. Lightly coat the entire surface and then expose. At this time, if the exposure amount is set so as to expose the positive resist thickness of the flat portion, in the step portion 302,
Since the positive resist is thicker than the flat portion, the positive resist side wall 303 remains after development.

Next, as shown in FIG. 3C, the polysilicon layer 306 is etched by anisotropic etching using the positive resist side wall 303 as a mask. Next, FIG.
As shown in (d), after removing the positive resist side wall 303, the polysilicon layer 306 left in a side spacer shape.
Is thermally oxidized to form a silicon oxide film 307. When polysilicon is oxidized into a silicon oxide film, it takes about 2
There is a double volume increase. Therefore, the step portion can be more gently inclined than in the case of the embodiment shown in FIG. 1, and the effect of flattening is further increased.

FIGS. 4A to 4D are cross-sectional views in order of the steps of another embodiment of the method for manufacturing a semiconductor device according to the present invention. Figure 4
As shown in (a), a resist is shaped into a predetermined pattern by an IC process, and then a hole is formed halfway through the intermediate insulating film 401 by etching to form a hole 402.

Next, as shown in FIG. 4B, a thick positive resist is applied over the entire surface of the intermediate insulating film 401 so as to sufficiently cover the depth of the opening portion 402, and then exposed. At this time, if the exposure amount is set so that the positive resist thickness of the flat portion is exposed, the positive resist is thicker at the edge portion of the opening portion 402 than the flat portion. The resist sidewall 403 remains.

Next, as shown in FIG. 4C, the intermediate insulating film 401 is etched by anisotropic etching using the positive resist side wall 403 as a mask. Next, FIG. 4 (d)
As shown in FIG. 5, the contact hole 403 having a gentle slope can be formed by removing the side wall 403 of the positive resist. This inclination can be made constant regardless of the size of the contact hole 403.
Since it can be formed in a self-aligning manner, it is suitable for miniaturization.

[0020]

As described above, according to the present invention, the step of exposing after applying a thick positive resist over the entire surface of the underlying film having a step on the surface and exposing the underlying film with the partially remaining positive resist as a mask. With the technique characterized by having a step of removing by anisotropic etching and a step of removing the remaining positive resist, it is possible to give a gentle slope to the step portion. The main steps to be added are positive resist coating and exposure, and complicated steps such as mask alignment are not involved. This allows you to cut the necessary wiring,
On the contrary, it is possible to effectively prevent the occurrence of defects such as irrelevant wiring short-circuits, and if this technique is used for forming the side spacers of the LDD structure, which is essential in a fine MOS transistor, it is possible to achieve a range suitable for miniaturization. The LDD region length can be formed long with good controllability. Further, this technique can be used for forming contact holes, and it is possible to form fine contact holes having gentle side walls.

[Brief description of drawings]

1A to 1D are cross-sectional views in order of the steps of an embodiment of a method for manufacturing a semiconductor device of the present invention.

2A to 2D are cross-sectional views in order of the steps of another embodiment of the method for manufacturing a semiconductor device of the present invention.

3A to 3D are cross-sectional views in order of the processes, of another embodiment of the method for manufacturing a semiconductor device of the present invention.

4A to 4D are cross-sectional views in order of the steps of a semiconductor device manufacturing method according to another embodiment of the present invention.

[Explanation of symbols]

 101, 301 Base film 102, 202, 302 Stepped portion 103, 203, 303, 403 Positive resist sidewall 201 Silicon substrate 204 Gate electrode 205 Gate insulating film 206 Insulating film 207 Side spacer 306 Polysilicon layer 307 Silicon oxide film 401 Intermediate insulating film 402 Opening 403 Contact hole

Claims (4)

[Claims] 1. A step of applying a thick positive resist over the entire surface of a base film having a step on the surface and then exposing and developing, and anisotropically forming the base film using the residual positive resist as a mask. A method for manufacturing a semiconductor device, comprising a step of etching by positive etching and a step of removing the remaining positive resist. 2. A step of forming an insulating film on a gate electrode of a MOS transistor, applying a positive resist thickly on the entire surface of the insulating film, and then exposing and developing the film, and using the partially remaining positive resist as a mask. A method of manufacturing a semiconductor device, comprising: a step of removing an insulating film by anisotropic etching; and a step of removing the remaining positive resist. 3. A step of forming a polysilicon film on a base film on a semiconductor substrate having a step on the surface, applying a positive resist thickly on the whole surface of the polysilicon film, and then exposing and developing the film, and partly remaining. The step of removing the polysilicon film by anisotropic etching using the positive resist as a mask, the step of removing the remaining positive resist, and the step of converting the polysilicon film into a silicon oxide film by thermal oxidation. Manufacturing method of semiconductor device. 4. A step of forming a thick intermediate insulating film, shaping the resist into a predetermined pattern, and then opening a hole in the intermediate insulating film by etching, and a step of forming a positive resist on the intermediate insulating film over the entire surface. A semiconductor device comprising a step of exposing and developing after coating, a step of removing the intermediate insulating film by anisotropic etching using the partially remaining positive resist as a mask, and a step of removing the remaining positive resist. Production method.