JP2009147215A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form a resist pattern with a width of not more than 1 μm and a column type structure or a wall type structure with a width of not more than 1 μm on a semiconductor substrate or the like employing an equal-magnification exposure type exposure device. <P>SOLUTION: A resist pattern forming process includes a level difference forming process which forms a minute level difference at a position corresponding to the resist pattern, a photoresist applying process for applying the photoresist on the surface and an exposure/development process for carrying out the perfect removal of the photoresist in the exposure region except the vicinity of the side surface part of the minute level difference, covering the minute level difference part as the exposure region and carrying out the exposure to the photoresist and the development of the photoresist under a condition that the photoresist is made to remain only in the vicinity of the side surface part of the minute level difference. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a fine processing technique for manufacturing a semiconductor device such as a MEMS (Micro Electro Mechanical Systems) product such as an acceleration sensor or a gyro sensor.

Photolithography is used for forming a fine pattern when manufacturing a semiconductor device such as an IC or LSI. In order to increase the degree of integration of semiconductor devices and increase the operation speed, pattern miniaturization is indispensable, and photolithography is an indispensable technology. Currently, in the manufacture of VLSI, a pattern having a width of 0.1 μm or less is realized by a reduction projection type exposure method. In the reduction projection type exposure method, a mask pattern is reduced and projected by a lens system to refine the pattern, and a reduction projection type exposure apparatus (stepper) is used.
On the other hand, in MEMS products having a device size equal to or greater than the wavelength of light, photolithography technology with an accuracy of the order of several μm can be used sufficiently, so the same size exposure that projects the mask pattern onto the substrate as it is is used. A type exposure apparatus (mask aligner) is used. However, considering that further miniaturization will continue from now on, it is necessary to make the pattern finer (line width of 1 μm or less).
As a 1 × exposure type exposure apparatus, for example, it is difficult to process a pattern having a width of 1 μm or less by photolithography using a mask aligner using an g-line of an ultrahigh pressure mercury lamp having a wavelength of 435.8 nm as an exposure light source. At present, the processing width of plasma etching is limited, and the limit is about 1 μm.

In addition to the g-line of an ultra-high pressure mercury lamp, the exposure light source includes an i-line of an ultra-high pressure mercury lamp with a wavelength of 365 nm (ultraviolet), a KrF excimer laser with a wavelength of 248 nm, an ArF excimer laser with a wavelength of 193 nm, etc. Yes, the shorter the wavelength of the light source, the smaller the pattern width.
After actually applying a photoresist on a silicon wafer using a spin coater and pre-baking, the photoresist film is subjected to a line-and-space (L & S) with a line width of 1 μm to 2000 μm by the mask aligner using the g-line. After the pattern is exposed and developed, it is post-baked to form an etching resist pattern, etched by dry etching with a RIE (Reactive Ion Etching) device to form a wall-like structure, and the resist is removed after etching The shape was observed by SEM. FIG. 5 shows the result.
As shown in FIG. 5, in the region where the pattern width is 2 μm or more, the pattern is etched independently and the wall-like structure is separated into four lines, but in the region of 1 μm, the wall-like structure is separated. A partial omission has occurred (shown as “pattern connecting portion 6” in FIG. 5), and it is confirmed that the pattern state is not good.
As a method for improving the pattern accuracy in photolithography, for example, there are methods described in “Patent Document 1” and “Patent Document 2”.

FIG. 4 is a cross-sectional view showing the steps of the semiconductor device manufacturing method disclosed in Patent Document 1.
A positive photoresist film 2 is spin-coated on the surface of the semiconductor substrate 1 (FIG. 4A) on which the thin film 7 is formed, and then pre-baked (FIG. 4B). The resist film 2 is selectively irradiated with ultraviolet rays 4 and then post-baked [FIG. 4C], and the photoresist film 2 in the exposed region is removed by a development process [FIG. 4D]. In this state, the unexposed portion remains as the resist pattern 2a. Subsequently, the semiconductor substrate is put in a vacuum container to be in a depressurized state, and the surface on which the resist pattern 2a is formed is irradiated with ultraviolet rays 5 having such an intensity that resist scatter does not occur [FIG. 4 (e). ]. Next, the thin film 7 is etched by plasma etching to form a thin film pattern 7a [FIG. 4 (f)], and finally the resist pattern 2a is removed.
In Patent Document 1, a stepper is used as the exposure apparatus, but the manufacturing process is the same as that shown in FIG.
The manufacturing method of Patent Document 1 is obtained by adding a degassing step to a conventional general method, and eliminates a decrease in accuracy due to the gas generated in the etching step in the conventional general method.

Patent Document 2 relates to a method for forming a highly accurate resist pattern on a substrate having a step.
JP-A-8-22946 JP 63-316854 A

As described above, when a resist pattern is formed by a method of transferring a photomask pattern using a 1 × exposure apparatus (mask aligner), a resist pattern having a width of 1 μm or less and a columnar structure having a width of 1 μm or less or It is difficult to realize a wall-like structure. On the other hand, a reduction projection type exposure apparatus (stepper) used for a reduction projection type exposure method capable of processing with a width of 1 μm or less is about one digit higher than a 1 × exposure type exposure apparatus, and this method is adopted. In order to do so, a large capital investment is required.
An object of the present invention is to form a resist pattern having a width of 1 μm or less and a columnar structure or a wall-like structure having a width of 1 μm or less by using an equal-exposure exposure apparatus that does not require as much capital investment as a reduction projection exposure apparatus. It is possible to.

In this invention, in the resist pattern formation process of photolithography, there is a step of forming a minute step of μm order at a position where a minute width resist pattern is formed, and the photoresist is left in the vicinity of the side surface of the step, A very narrow resist pattern is formed. The width and thickness of the resist pattern can be controlled by the step size, the viscosity of the photoresist to be applied, the photoresist application conditions, the photoresist exposure conditions, the photoresist development conditions, and the like. The invention of claim 1 relates to a basic process, the invention of claim 2 relates to control of the width and thickness of a resist pattern, and claim 3 relates to formation of a columnar structure or a wall-like structure. It is.
The invention of claim 1 is a method of manufacturing a semiconductor device in which a semiconductor substrate or a substrate with a semiconductor layer is finely processed by a photolithography technique and a dry etching technique, and in the resist pattern formation process of photolithography, A step forming process for forming a minute step at a position corresponding to the width resist pattern, a photoresist coating process for applying a positive photoresist on the substrate surface on which the minute step is formed, and In the exposure area to the photoresist, including the resist pattern corresponding to the minute step, the photoresist in the exposure region other than the vicinity of the side surface of the minute step is completely removed and the vicinity of the side surface of the minute step Only the exposure of the photoresist under conditions that leave the photoresist and the current exposure of the photoresist. Having an exposure-development step to perform.

Since the resist pattern with a very small width of the resist pattern is formed by the photoresist left in the vicinity of the side surface of the minute step, its width and thickness are not affected by the accuracy of the photomask or the wavelength of the light source, It is determined by the shape of the photoresist formed on the side surface of the minute step at the time of applying the resist, and the ratio between the width and the thickness can be controlled.
The invention of claim 2 is the invention of claim 1, wherein the width and thickness of the photoresist remaining in the vicinity of the side surface portion of the minute step, the size of the minute step, the viscosity of the photoresist to be applied, and the application of the photoresist Control is performed according to conditions, exposure conditions for photoresist, and development conditions for photoresist.
The width and thickness of the photoresist remaining in the vicinity of the side surface of the minute step becomes wider and thicker as the size of the minute step is increased, and becomes thinner and thinner as the size of the minute step is increased. It becomes wider and thicker, lowering it becomes narrower and thinner, increasing the amount of exposure to the photoresist makes it narrower and thinner, and increasing the photoresist development time makes it narrower and thinner. Furthermore, since the width and thickness and the ratio of the width and thickness can be controlled also by the coating conditions of the photoresist, the width and thickness of the resist pattern can be controlled by combining the above conditions and the coating conditions. The control range becomes wider.

The invention of claim 3 uses the resist pattern formed by the resist pattern formation process according to claim 1 as an etching mask, and by column etching and wall-like structure on the semiconductor layer of the semiconductor substrate or the substrate with the semiconductor layer by dry etching processing Either or both.
According to the invention of claim 1, since it is possible to control the ratio of the width and thickness of the minute width resist pattern formed on the side surface portion of the minute step, even in the case of a narrow width resist pattern, A thickness that can withstand a dry etching process for deep etching such as a columnar structure or a wall-like structure can be secured.

In the first aspect of the present invention, the resist pattern having a minute width in the resist pattern is formed by the photoresist left in the vicinity of the side surface portion of the minute step. It is determined by the shape of the photoresist formed on the side surface of the minute step when the photoresist is applied, and the width / thickness ratio can be controlled.
Therefore, according to the present invention, it is possible to form a resist pattern having a very small width that cannot be realized by a method of transferring a photomask pattern using a unit-size exposure type exposure apparatus. A resist pattern can be formed.
The width and thickness of the photoresist remaining in the vicinity of the side surface of the minute step becomes wider and thicker as the size of the minute step is increased, and becomes thinner and thinner as the size of the minute step is increased. It becomes wider and thicker, lowering it becomes narrower and thinner, increasing the amount of exposure to the photoresist makes it narrower and thinner, and increasing the photoresist development time makes it narrower and thinner. Furthermore, the width and thickness, and the ratio of the width and thickness can be controlled also by the coating conditions of the photoresist. The control range becomes wider.
Therefore, according to the second aspect of the present invention, it is possible to reliably form a resist pattern having a very small width that cannot be realized by a method of transferring a pattern of a photomask using a 1 × -exposure exposure apparatus. It is possible to more reliably form a resist pattern having a certain width of 1 μm or less.

According to the invention of claim 1, since it is possible to control the ratio of the width and the thickness of the minute width resist pattern formed on the side surface portion of the minute step, even in the case of a narrow width resist pattern, the columnar shape It is possible to secure a thickness that can withstand a dry etching process for deep drilling such as a structure or a wall-like structure.
Therefore, according to the invention of claim 3, it is possible to form a columnar structure or a wall-like structure having a width of 1 μm or less, which is the subject of the present invention.

In the present invention, as described above, a resist pattern having a minute width of 1 μm or less is formed by the photoresist left on the side surface of the step, regardless of the pattern transfer of the photomask. The resist pattern is hardly affected by the accuracy of the photomask and the wavelength of the light source.
FIG. 1 is a cross-sectional view showing steps for explaining an embodiment of a method for manufacturing a semiconductor device according to the present invention, and FIG. 2 is a cross-sectional view for explaining the main points of the present invention.
In the present invention, a minute step 11 is formed at a predetermined position on a semiconductor substrate 1 on which a resist pattern having a minute width is formed by a conventional general-purpose technique [FIG. A photoresist film 2 is applied to the surface of the substrate 1b [FIG. 1 (c)], and a photoresist film 2 is formed using a photomask 3 including a step 11 in an area where the photoresist is removed (exposure area) in the development process. Is irradiated with irradiation light 9 (FIG. 1 (d)), and a resist pattern 2a formed on the flat portion of the substrate and a step resist pattern 2b formed on the side surface of the step 11 are obtained through a development process [FIG. (e)].
Since the resist pattern is formed on the side surface of the step, the cross section of the resist pattern depends on the physical properties such as step size and photoresist viscosity, photoresist coating conditions, photoresist exposure conditions, photoresist development conditions, etc. The shape is determined, and by selecting these conditions, it becomes possible to form a resist pattern having a width of 1 μm or less.

FIG. 2 shows how the shape of the coated photoresist formed on the side surface of the step changes depending on the size of the step and the viscosity of the photoresist. The right side corresponds to the case where the level difference is large, and in the same row, the case corresponds to the case where the viscosity is high from the top, the middle case, and the low case. The width of the photoresist on the side surface of the step becomes narrower when the step becomes smaller, becomes wider when the step becomes larger, and becomes narrower when the viscosity becomes lower, and becomes wider when the viscosity becomes higher. Similarly, the width of the photoresist on the side surface of the step can also be controlled by changing the coating conditions such as the spinner rotation speed and the rotation speed start-up condition. The same applies to the thickness of the photoresist on the side surface of the step.
In FIG. 2, the thickness of the photoresist in the flat portion is shown as being smaller than the step, but the thickness of the photoresist may be larger than the step.
The shape of the photoresist on the side surface portion of the step formed in this way is partly removed from the surface through an exposure / development process, and becomes a step portion resist pattern 2b. The amount of removal depends on the exposure conditions and development conditions, but it should be understood that both conditions are necessary and sufficient to completely remove the photoresist applied to at least a flat portion other than the side surface of the step. Must meet.

With the stepped resist pattern 2b formed in this way as an etching mask, a wall-like structure 12 or a columnar structure having a width of, for example, 1 μm or less is formed by dry etching [FIG. 1 (f)].
This will be specifically described below using examples.

FIG. 3 shows an embodiment in which a wall-like structure is formed using an SOI substrate, (a) is a SEM photograph showing a state after the development step, (b) is a cross-sectional view showing a model of the AA ′ cross section, (C) is a cross-sectional view schematically showing the AA ′ cross section after the etching process, and (d) is an SEM photograph showing a state after the etching process.
3A shows a step of about 1 μm formed on the surface of the silicon layer 81 of the SOI substrate by shallow digging, and the photoresist and the photoresist coating conditions (spin coating conditions) shown in Table 1 are used. 5 is an SEM photograph showing a state where the film is exposed under the conditions shown in Table 1 using a photomask that is applied to the stepped portion and exposed to the stepped portion, and then developed under the conditions shown in Table 1.
By applying a photoresist to the region including the step under the conditions shown in Table 1, and exposing and developing, the photoresist on the flat portion is removed, and the photoresist remains only on the side surface portion of the step. Patterns 2b and 2c could be formed. The width of the step portion resist pattern 2c is about 0.5 μm.
In this case, the thickness of the photoresist applied to the flat portion is 4 μm, and a resist pattern 2a is formed on the flat portion that has not been exposed.

以上で説明した諸条件は、それぞれに容易に設定できるものであるから、前述の段差の大きさと合せてこれらの諸条件を調整すれば、段差部レジストパターンの幅と厚さを所望どおりに得ることができる。

Since the various conditions described above can be easily set for each, the width and thickness of the stepped resist pattern can be obtained as desired by adjusting these various conditions in accordance with the above-described step size. be able to.

  Various conditions of the resist pattern forming process described above are shown in Table 1. Table 2 shows an example of conventional conditions in order to compare these conditions with those of the prior art.

従来条件と比較して実施例の条件が異なる点は、フォトレジストの粘度を大幅に高くしていること、スピンコートの低速側の立上げを急峻にし低速から高速への立上げをゆっくりし且つ高速の保持時間を短くしていること、露光時間および現像時間を長くしていること、である。

The differences in the conditions of the examples compared to the conventional conditions are that the viscosity of the photoresist is greatly increased, the start-up on the low-speed side of the spin coat is steep and the start-up from low speed to high speed is slow, and The high-speed holding time is shortened, and the exposure time and development time are lengthened.

In the case of Table 2, the thickness of the photoresist applied to the flat portion is about 1.2 μm.
The step resist patterns 2b and 2c obtained in this way are used as etching masks and processed by dry etching capable of deep drilling, for example, a Bosch process using a Deep-RIE (Reactive Ion Etching) apparatus. Wall-like structures 12b and 12c as shown in (d) could be obtained. FIG. 3C shows the AA ′ cross section as a model, and shows that the semiconductor layer 81 is etched to form the wall-like structure portion 12c.
As is apparent from the above description of the embodiments, according to the present invention, it is possible to form a resist pattern having a width of 1 μm or less without using expensive equipment as in a reduced projection type exposure apparatus. As an etching mask, a wall-like structure or a columnar structure with a width of 1 μm or less can be formed.

Sectional drawing which shows the process for describing embodiment of the manufacturing method of the semiconductor device by this invention Sectional drawing for demonstrating the principal point of this invention An Example is shown, (a) is the SEM photograph which shows the state after the image development process, (b) is the AA 'sectional drawing, (c) is AA' sectional drawing after an etching process, (d) is after an etching process. SEM photo showing the condition Sectional drawing which shows the process of the manufacturing method of the semiconductor device by a prior art SEM photo to explain the problems of the prior art

Explanation of symbols

1: Semiconductor substrate 1b: Stepped semiconductor substrate
1c: Finished semiconductor substrate
11: Step 12, 12b, 12c: Wall-shaped structure part 2: Photoresist film 2a: Resist pattern
2b, 2c: Stepped resist pattern 3: Photomask 4, 5: Ultraviolet light 6: Pattern connection 7: Thin film 7a: Thin film pattern 8: SOI substrate with step 8c: Finished SOI substrate
81: Silicon layer 9: Irradiation light

Claims (3)

A method for manufacturing a semiconductor device, wherein a semiconductor substrate or a substrate with a semiconductor layer is microfabricated by photolithography technology and dry etching technology,
In the resist pattern formation process of photolithography,
A step forming step for forming a minute step at a position corresponding to a resist pattern having a minute width in the resist pattern;
A photoresist coating step of coating a positive type photoresist on the substrate surface on which the minute steps are formed;
In the exposed area of the applied photoresist, including the resist pattern corresponding to the minute step, the photoresist in the exposed area other than the vicinity of the side surface of the minute step is completely removed, and the minute step Only in the vicinity of the side surface portion, it has an exposure / development process for executing exposure to the photoresist under conditions for leaving the photoresist and development of the photoresist,
A method for manufacturing a semiconductor device. The width and thickness of the photoresist remaining in the vicinity of the side surface of the minute step, the size of the minute step, the viscosity of the photoresist to be applied, the coating condition of the photoresist, the exposure condition to the photoresist, and the photoresist Controlled by development conditions,
2. The method for manufacturing a semiconductor device according to claim 1, wherein: A resist pattern formed by the resist pattern forming process according to claim 1 is used as an etching mask, and either or both of a columnar structure and a wall-like structure are formed in a semiconductor layer of a semiconductor substrate or a substrate with a semiconductor layer by dry etching. To
A method for manufacturing a semiconductor device.

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