JPH0657052B2 - Sync signal remover - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a sync signal removing apparatus for removing a horizontal sync signal included in a video signal or a burst signal which is a color sync signal from the video signal.

<Description of Prior Art> A conventional synchronizing signal removing circuit is shown in FIG. 1 and its waveform is shown in FIG.

The video signal 1 including the input synchronizing signal is controlled by the pedestal clamp circuit by the back porch pulse 3 generated in the back porch of the video signal to have a constant direct current level during the back porch period, that is, the pedestal level. The output of the pedestal clamp circuit 2 is input to the blanking removal circuit 4, and by the control of the blanking pulse 5,
During the blanking period, the same zero level as the pedestal level of the pedestal clamp circuit 2 is output, and during the period other than the blanking period, the pedestal clamp circuit 2 is output.
The output video signal is output. Therefore, the blanking elimination circuit 4 outputs the pedestal level of the video signal during the blanking period, and outputs the video signal during the other periods. It is possible to remove the signal.

However, when the DC component of the video signal is reproduced by clamping, it is difficult to accurately reproduce the DC component from the input video signal because the APL (average luminance level of the video signal) changes. The circuit configuration becomes complicated.
If the clamp is not accurately performed, the clamp output signal changes the pedestal level with the change of APL, and eventually the luminance level of the output signal from which the sync signal is removed fluctuates.

In other words, the circuit characteristics of the clamp circuit greatly affect the output signal. For example, if a clamp circuit that suppresses the fluctuation of the clamp output, such as a feed back clamp circuit, is used, the influence of the fluctuation of the APL can be suppressed a little, but the circuit scale increases and the cost increases.

<Object of the Invention> In view of the drawbacks of the prior art as described above, an object of the present invention is to provide a synchronization signal removing device in which the variation of the DC component of the signal does not affect the synchronization signal removal output regardless of the characteristics of the circuit. There is.

<Description of Embodiments> FIG. 3 shows a synchronizing signal removing circuit according to an embodiment of the present invention.
The signal waveform of each part is shown in FIG.

An input video signal 10 including a sync signal is input to a sample hold circuit (hereinafter S / H circuit) 12, a switch circuit 14, and a sync separation circuit 16. The horizontal sync signal 20 is extracted from the sync separation circuit 16, and the back porch pulse 30 is formed by the mono multivibrators 18 and 19 and the blanking pulse 40 is formed by the mono multivibrators 23 and 24 on the basis of the sync signal 20. The S / H circuit 12 samples and holds the signal level of the back porch by the back porch pulse 30, and outputs it to the switch circuit 14.

The switch circuit 14 selects the output of the S / H circuit 12 when the blanking pulse 40 is at the high level, and selects the input video signal 10 when the blanking pulse 40 is at the low level to obtain the output video signal 50 from which the sync signal is removed.

In this way, the pedestal level is adjusted to the back porch pulse 30.
Since the sample hold is performed, the pedestal level detection error is eliminated even when the APL changes, and the luminance level can be faithfully reproduced.

Figure 5 was obtained by decoding the NTSC video signal (BY).
It is a signal waveform diagram when removing a color burst signal from a signal. Since the circuit diagram can be realized by the circuit configuration almost the same as that of FIG. 3, the details are omitted.

The (BY) signal 10 'comprises the color burst signal 35 and the actual (BY) signal 36, and does not include the sync signal 20'. The sync signal 20 'is obtained from the sync separation circuit 16 of FIG. 3, and the sync timing signal 30' is based on the sync signal 20 '.
Also, the blanking signal 40 'which becomes high level during the burst period is formed. Then, the synchronization timing signal 30 '
(B-Y) signal 10 'is sampled and held at the timing of to extract the color difference OV signal, and the blanking pulse 40'
, The color difference O is used instead of the high-level period input (BY) signal.
Replace V signal.

With this configuration, the color burst signal 35
It is possible to obtain the (BY) signal 50 'with the signal removed.

Also in this embodiment, the color difference OV level can be accurately extracted even if the average level of the input (BY) signal fluctuates, so that the input (BY) signal can be faithfully transmitted.

FIG. 6 shows the S / H circuit 12 and the switch circuit 14 of FIG.
The concrete circuit of is shown.

The capacitor 110, the resistors 111, 112, 114 and the transistor 113 form a buffer, and the input video signal 10
Is a signal converted from the emitter of the transistor 113 into a low impedance.

Resistor 115, inverter 117, analog switch 11
6, the capacitor 118 constitutes the S / H circuit 12. Inverter 117 and analog switch 116 are C
-It constitutes a MOS type analog switch. When the back porch pulse 30 is at a high level, the analog switch 116 is turned on, and the emitter output signal of the transistor 113 passes through the resistor 115 and the analog switch 116 and is held in the capacitor 118. When the back porch pulse 30 is low level, the analog switch 116 is off and the capacitor 118 holds the previous voltage.

The analog switches 119 and 120 and the inverter 121 constitute the switch circuit 14. These switches also have a C-MOS structure.

When the blanking pulse 40 is at high level, the analog switch 120 is turned on and the analog switch 119 is turned off. When the blanking pulse 40 is low level, the analog switch 119 is turned on and 120 is turned off. Therefore, the pedestal level stored in the capacitor 118 is output as the output video signal 50 during the blanking period, and the emitter output of the transistor 113 is output during the other periods. Eventually, the input video signal 50 can be obtained.

Of course, other types of circuits can be used as the S / H circuit 12 and the switch circuit 14.

<Explanation of Effect> As described above, according to the present invention, it is possible to realize a synchronizing signal removing circuit in which the reference level faithfully follows the fluctuation of the average level of the input video signal with an extremely simple circuit configuration.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a conventional sync signal removing circuit, FIG. 2 is a signal waveform diagram of each part of FIG. 1, FIG. 3 is a circuit diagram of the sync signal removing circuit of the present embodiment, and FIG. FIG. 5 is a signal waveform diagram of each part of the figure, FIG. 5 is a signal waveform diagram of another embodiment, and FIG. 6 is a detailed circuit diagram of a part of the circuit of FIG. In the figure, 10 is an input period signal, 12 is a sample and hold circuit, 14 is a switch circuit, 16 is a sync separation circuit, and 2
Reference numeral 0 represents a horizontal synchronizing signal, 30 represents a back porch pulse, 40 represents a blanking pulse, and 50 represents an output video signal.

Claims (1)

[Claims] 1. A sample and hold means for inputting a video signal, sampling the input video signal, and holding and outputting a signal indicating the level of the sampled signal, and sample and hold means for outputting the sample and hold means. Input signal and the input video signal, and selectively outputs any one of the signal output from the sample hold means, the signal output from the sample hold means, and the input video signal. Means for controlling the sample-hold timing in the sample-hold means so as to sample-hold the back porch portion of the horizontal synchronizing signal in the input video signal, and the sample-hold means during the horizontal blanking period in the input video signal. Selects the output signal and outputs it In between, there is provided control means for removing the horizontal synchronizing signal included in the input video signal by controlling the selective output timing in the selective output means so as to selectively output the input video signal. And a synchronization signal removing device.