JPH0528847Y2 - - Google Patents

Description

[Detailed explanation of the invention] <Industrial application field> This invention uses multiple television cameras and sequentially switches the video output of each camera to display the image on a monitor receiver, or to record on a VTR for a long time. The present invention relates to a synchronization separation circuit suitable for use in surveillance CCTV (closed circuit television) equipment.

<Summary of the invention> The present invention provides a synchronization separation circuit that can effectively separate a frame synchronization signal superimposed on a composite video signal in the above-mentioned CCTV equipment, etc.

<Conventional technology> Traditionally, multiple TV cameras are used for monitoring, in which the video output of each camera is sequentially switched and displayed on a monitor receiver, or recorded on a VTR for a long period of time.
In CCTV equipment, in order to match the scanning timing of each television camera, a system has been proposed in which a frame synchronization signal is superimposed on a composite video signal, and a power supply voltage is also superimposed and multiplexed transmitted via a single cable. There is.

FIG. 4 shows an overview of such a multiplex transmission system. Here, 1 is a video signal relay device called a video switcher, and the switch 1 connects a plurality of television cameras 2 ₁ , 2 ₂ , 2 _{3 .} . . 2n with one coaxial cable 3 ₁ , 3 _{2 ,} respectively. , 3 ₃ ...3n, and these cables 3 ₁ , 3 ₂ , 3 ₃
...from the switcher via 3n to each camera 2 ₁ ,
A power supply voltage and a frame synchronization signal are sent to 2 ₂ , 2 ₃ . . . 2n. Each TV camera 2 ₁ , 2 ₂ , 2 ₃ ...
2n, an imaging operation is performed in synchronization with a frame synchronization signal, and at this time each television camera 2 ₁ , 2 ₂ , 2
The composite video signals obtained from the cameras ₃ ...2n are sent to the video switcher 1 via the coaxial cables ₃₁ , ₃₂ , ₃₃ ...3n, and the switcher 1 switches and monitors the composite video signals from each of these cameras as appropriate. The signal is supplied to the receiver 4 and the long-term VTR 5.

Here, on the coaxial cables 3 ₁ , 3 ₂ , 3 3 ... 3n connecting the video switcher 1 and each television camera 2 ₁ , 2 ₂ , _{2 3 ...} 2n, horizontal and vertical It has a multiplexed signal form in which a power supply voltage Vcc and a frame synchronization signal _SF are multiplexed onto a composite video signal including a synchronization signal.

<Problems to be solved by the invention> Therefore, in the multiplex transmission system for surveillance CCTV equipment configured as described above, the above-mentioned frame synchronization signal is added to the leading edge of the composite video signal, especially the vertical synchronization signal. Since it is a multiplexed signal that is superimposed every other time, it is extremely difficult to accurately separate only the frame synchronization signal from such a multiplexed signal.
The circuit configuration of the synchronous separation circuit has become extremely complex.

<Means for solving the problem> The present invention was developed in view of the above points, and as shown in FIG. It consists of a separation circuit.

<Function> That is, the peak hold circuit 6 is set to have a predetermined time constant, and detects the peak levels of the horizontal and vertical synchronizing signals of the composite video signal, in particular, of the multiplexed signal inputted from the input terminal 9. , is held at its DC voltage level. This held level is offset by a predetermined value by the offset circuit 7 and input to the comparison circuit 8. In the comparison circuit 8, this offset DC voltage level and the multiplexed signal supplied from the input terminal 9 are level-compared, and only the frame synchronization signal components lower than the horizontal and vertical synchronization signal levels are separated and derived to the output terminal 10. Ru.

<Examples> The present invention will be described below with reference to specific examples. FIG. 2 shows a circuit diagram of one embodiment of the present invention,
Here, the same numbers are given to parts that correspond to the numbers of each part in FIG.

Here, the peak hold circuit 6 is comprised of a transistor 6 ₁ , a capacitor 6 ₂ , and resistors 6 ₃ to _{6 7} , and the level comparison circuit 8 is comprised of a transistor 8 ₁ and resistors 8 ₂ and 8 ₃ . Then, from the input terminal 9, a DC blocking capacitor 11 and a resistor ₆₃
A multiplex signal as shown in FIG. 3a is applied to the base of the transistor ₆₁ via the transistor 61.

Here, if the values of the bias resistors 6 ₄ and 6 ₅ are set appropriately, the transistor 6 ₁ becomes conductive during each frame synchronization signal period in _the multiplexed signal.
The emitter potential of is maintained close to the peak voltage value V _S of the vertical synchronizing signal in the multiplexed signal. This holding voltage is offset (dropped) by the forward voltage between the emitter and base of the diode ₇₁ via the offset diode ₇₁ , and is applied to the emitter of the transistor ₈₁ . On the other hand, the transistor 8 ₁
A multiplexed signal is supplied to the base of the input terminal 9 via a capacitor _C11 and a resistor ₈₃ , and as a result, the transistor ₈₁ is conductive only during the period of the multiplexed signal, especially the frame synchronization signal, and the collector is supplied with the signal shown in FIG. A frame synchronization signal of positive polarity is obtained as shown in FIG. This frame synchronization signal is further supplied to the base of the amplification transistor 12, amplified to a predetermined level, and a negative polarity frame synchronization signal is outputted to the output terminal 10 as shown in FIG. 3c.

<Effects of the invention> As described above, according to the synchronous separation circuit of the invention,
In a multiplex transmission system where a power supply voltage and a frame synchronization signal are multiplexed on a composite video signal including horizontal and vertical synchronization signals, only the frame synchronization signal can be reliably separated, regardless of voltage fluctuations of the multiplex power supply or the content of the video signal. can be derived.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a synchronization separation circuit according to the present invention, FIG. 2 is a circuit diagram of an embodiment of the present invention, FIG. 3 is a signal waveform diagram for explaining the operation of the embodiment, and FIG.
The figure is a schematic diagram of a multiplex transmission system in which the synchronization separation circuit of the present invention is used, and FIG. 5 is a waveform diagram of multiplexed signals used in the system. 6...Peak hold circuit, 7...Offset circuit, 8...Level comparison circuit.

Claims (1)

[Scope of utility model registration request] Composite video signal including horizontal and vertical synchronization signals, power supply voltage and horizontal and vertical synchronization signal levels,
A circuit that separates a frame synchronization signal from a multiplexed signal in a multiplex transmission system in which lower level frame synchronization signals are multiplexed and transmitted through a single coaxial cable, the circuit separating the frame synchronization signal from the multiplexed signal, the circuit separating the frame synchronization signal from the peaks of the horizontal and vertical synchronization signals of the composite video signal. peak hold means for detecting a level and holding it at the DC voltage level; offset means for offsetting the DC voltage level held by the hold means by a predetermined value; 1. A synchronization separation circuit comprising: level comparison means for comparing the levels of the frame synchronization signal with the frame synchronization signal and extracting only the frame synchronization signal.