JP2528948B2 - Video signal clamp circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to A / D conversion of a television signal.
The present invention relates to a signal clamp method before D / D conversion processing.

[Conventional technology]

In a digital television system, a television signal such as a composite video signal, a luminance signal, a color difference signal (hereinafter abbreviated as a television signal) is A /
When performing D conversion, the clamp level before A / D conversion processing must be set accurately.

For example, in digital signal processing after A / D conversion,
If you do not set the clamp level before A / D conversion to match the black level to be replaced by digital signal processing when you change the black level (blanking period) of the television signal, etc. A clamp level error may occur between the television signal before the D conversion processing and the television signal after the D / A conversion, and the black level and the white balance may change. Further, when there is no signal, an offset occurs between the black level and the video signal even if there is no signal, and the screen may become bright or the screen may be colored.

Conventionally, as a device that solves such a problem, there is, for example, Japanese Patent Laid-Open No. 58-124373. In this device, a clamp circuit is arranged in front of the A / D converter, and the clamp level is controlled according to the output signal level of the A / D converter.

[Problems to be Solved by the Invention]

When using the above conventional technology in a digital television system, when a television signal is input, a pulse synchronized with a sync signal separated from this can be used as a clamp pulse to operate the clamp circuit before A / D conversion processing. Although it is possible, no consideration is given to the state when there is no signal.When there is no signal, the clamp operation stops because the above clamp pulse is omitted. The level of the signal input to the instrument is A / D
It exceeds the dynamic range of the converter. Therefore, after D / A conversion, even though there is no signal, the black level set by digital signal processing becomes a signal with an offset, and there is a problem that subsequent signal processing is not performed correctly.

An object of the present invention is to provide a clamp circuit capable of matching a clamp level with a black level set by digital signal processing even when there is no signal.

[Means for solving the problem]

The above object is achieved by supplying a color killer signal as a timing signal to the clamp level control means when the video signal has no synchronizing signal.

Further, a logical sum of the sync signal of the video signal and the color killer signal may be supplied to the clamp level control means as an output signal.

[Action]

According to the above configuration, the color killer signal is supplied to the clamp level control means as a timing pulse even when there is no synchronizing signal, so that the clamping operation can be continued even if the synchronizing signal is not obtained. Therefore, even when there is no signal, the clamp level can be matched with the black level set by the digital signal processing.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. In FIG. 1, 101 is a composite video signal, 102 is a bandpass filter (BPF), 103 is a chroma signal processing circuit,
104 is a color difference signal (Ry signal, By signal), 105 is a differential amplifier, 106 is an analog-digital converter (A / D converter), 107 is a digital color difference signal, 108 is a digital signal processing circuit, 109 is a digital color-processed digital color difference signal, 110 is a digital black level, 111 is a digital-analog converter (D / A converter), 112 is a differential amplifier, 11
3 is a clamp level control circuit, 114 is a capacitor, 115 is a sync separation circuit 116 is a sync separation output signal, 117 is a clamp timing pulse generation circuit, 118 is a clamp pulse, 119 is a color killer detection signal 120 is an OR circuit, and 121 is a SW. It is a signal.

Next, the operation of the clamp circuit of FIG. 1 will be described. The composite video signal is first band-limited by the BPF 102 and then input to the chroma signal processing circuit 103. The chroma signal is color demodulated here to become the color difference signal 104, and then the differential amplifier 1
The direct current is shifted by 05 by the voltage held by the capacitor 114. Then, the digital color difference signal 107 is A / D converted by the A / D converter 106 and is sent to the digital signal processing circuit 108. After the digital signal processing such as black level change is completed, the digital signal processing circuit output 109
Becomes On the other hand, the digital black level 110, which is replaced by the digital signal processing circuit, is digitally converted by the D / A converter 111.
After analog conversion, it is input to the differential amplifier 112.
The differential amplifier 112 outputs the difference voltage between the output of the operational amplifier 105 and the output of the D / A converter 111. The clamp level control circuit 113 causes the capacitor 114 to hold this difference voltage. This clamp level control circuit is operated by the SW signal 121.

Here, a specific example of means for generating the SW signal 121 will be described. The composite video signal 101 is sync separated by a sync separation circuit 115, and a sync separated output signal 116 is taken out. The sync separation output signal 116 is a signal clamped by the clamp timing pulse generation circuit 117 (color difference signal 104).
A clamp pulse 118 that matches the clamp period of (for example, blanking period) is generated and input to the OR circuit 120. On the other hand, the color killer detection signal 119 from the chroma signal processing circuit 103 is input to the OR circuit 120. When the composite video signal (color signal) is input, the SW signal 121 of the output signal of the OR circuit 120 operates the clamp level control circuit 113 at the timing of the clamp pulse 118.
Since the color killer detection signal is input to the OR circuit 120 when there is no signal, the SW signal 121 operates the clamp level control circuit during the entire video period.

On the other hand, when clamping a composite video signal or a luminance signal, the configuration within the half line of FIG. 1 is changed to the configuration shown in FIG. 201 is an integrator, and 202 is a no-signal detection signal obtained from the integrator. The sync separation output signal 116 is integrated by the integrator 201 and outputs the no-signal detection signal 202. Since this no-signal detection signal has the same function as the color killer detection signal 119 of FIG. 1, its operation description will be omitted.

As another embodiment, it can be achieved by using the structure shown in FIG. 301 is FBT
Pulse, 302 horizontal AFC circuit, 303 32f _H VCO circuit, 304 horizontal down counter.

Hereinafter, the operation will be described. Television signal
When 101 is input, the clamp level control circuit 103 operates by the clamp pulse 118 generated by the clamp timing pulse generation circuit 117. On the other hand, when there is no signal, the 32f _H VCO circuit 303 oscillates in a free run, and the pulse counted down by the horizontal down counter 304 is input to the clamp timing pulse generation circuit 117, and the clamp pulse 118 is constantly generated even when there is no signal. The clamp level control circuit 113 is operated.

〔The invention's effect〕

According to the present invention, the above-mentioned drawbacks of the conventional technology are solved,
There is an effect that the clamp level before A / D conversion processing can be accurately set so as to match the black level set by the digital signal processing circuit, regardless of the presence or absence of an input signal.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention. Second
3 and 4 are block diagrams showing another embodiment of the clamp control circuit. 101 ... Composite video signal, 102 ... BPF, 103 ... Chroma signal processing circuit, 104 ... Color difference signal, 105, 112 ... Differential amplifier,
106 ... A / D converter, 107 ... Digital color difference signal, 108 ... Digital signal processing circuit, 109 ... Digital signal processing circuit output, 110 ... Digital black level, 111 ... D / A converter, 113 ...
Clamp level control circuit, 114 ... Capacitor, 115 ... Sync separation circuit, 116 ... Sync separation output signal, 117 ... Clamp timing pulse generation circuit, 118 ... Clamp pulse, 119 ... Color killer detection signal, 120 ... OR circuit, 121 ... SW signal.

Claims (2)

(57) [Claims] 1. A clamp means for inputting an analog video signal to clamp the analog video signal, and an analog video signal connected to the output side of the clamp means for converting the analog video signal with the dc component clamped into a digital video signal. / D converter and D that converts the output signal of the A / D converter into an analog signal
/ A converter, clamp level control means for controlling the clamp voltage of the clamp means such that the output signal of the D / A converter and the input signal of the A / D converter are input And a clamp timing signal generating means for outputting a clamp timing signal according to a synchronizing signal of the video signal and supplying the clamp timing signal to the clamp level control means, wherein the clamp timing signal generating means comprises: A video signal clamp circuit configured to output a color killer signal as a clamp timing signal when there is no video signal synchronization signal. 2. A clamp means for inputting an analog video signal to clamp the analog video signal, and an analog video signal A connected to the output side of the clamp means for converting the analog video signal clamped for direct current into a digital video signal. / D converter and D that converts the output signal of the A / D converter into an analog signal
/ A converter, clamp level control means for controlling the clamp voltage of the clamp means such that the output signal of the D / A converter and the input signal of the A / D converter are input And a clamp timing signal generating means for outputting a clamp timing signal corresponding to the synchronizing signal of the video signal and supplying the clamp timing signal to the clamp level control means, wherein the clamp timing signal generating means comprises: A video signal clamp circuit configured to supply a logical sum of a sync signal of a video signal and a color killer signal as an output signal to the clamp level control means.