JPH065647A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH065647A JPH065647A JP16521192A JP16521192A JPH065647A JP H065647 A JPH065647 A JP H065647A JP 16521192 A JP16521192 A JP 16521192A JP 16521192 A JP16521192 A JP 16521192A JP H065647 A JPH065647 A JP H065647A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- relay
- electrode
- wires
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4941—Connecting portions the connecting portions being stacked
- H01L2224/49429—Wedge and ball bonds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/85951—Forming additional members, e.g. for reinforcing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明はリードフレームの半導体
素子搭載部に搭載した半導体素子上の電極とリードフレ
ームの内部リードとの間を前記リードフレーム半導体素
子搭載部縁辺の中継部を介して金属細線で接続してなる
半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a metal between an electrode on a semiconductor element mounted on a semiconductor element mounting portion of a lead frame and an internal lead of the lead frame via a relay portion on the edge of the lead frame semiconductor element mounting portion. The present invention relates to a semiconductor device formed by connecting thin wires.
【０００２】[0002]
【従来の技術】従来のこの種の半導体装置は、図４の断
面図に示すように、リードフレームの半導体素子搭載部
１に搭載された半導体素子４上の電極とリードフレーム
の内部リード２との間を、半導体素子搭載部縁辺に設け
た中継部で中継させて金属細線５と６により接続してお
った。中継部はガラスエポキシなどの絶縁体層３上に、
銅などで配線パターン３ｃを形成して成り、この配線パ
ターン３ｃの両端にそれぞれ一端を半導体素子電極に接
続した金属細線５の他端と内部リード２に一端を接続し
た金属細線６の他端をボンディング接続していた。2. Description of the Related Art As shown in the sectional view of FIG. 4, a conventional semiconductor device of this type has electrodes on a semiconductor element 4 mounted on a semiconductor element mounting portion 1 of a lead frame and internal leads 2 of the lead frame. The gaps are relayed by a relay portion provided on the edge of the semiconductor element mounting portion and connected by the thin metal wires 5 and 6. The relay section is on the insulator layer 3 such as glass epoxy,
The wiring pattern 3c is formed of copper or the like, and the other end of the metal thin wire 5 having one end connected to the semiconductor element electrode and the other end of the metal thin wire 6 having one end connected to the internal lead 2 are formed at both ends of the wiring pattern 3c. It was bonded.
【０００３】[0003]
【発明が解決しようとする課題】上記従来の半導体装置
では、中継部の配線パターンへのボンディング接続の
際、配線パターンの下に絶縁体層があるため、ボンディ
ング圧力や超音波振動が十分に加わらず、金属細線の十
分な接続強度を得られなかった。このため樹脂封止時に
金属細線が剥離し、断線するという問題があった。In the above-described conventional semiconductor device, since the insulating layer is provided below the wiring pattern at the time of bonding connection to the wiring pattern of the relay portion, the bonding pressure and ultrasonic vibration are sufficiently applied. As a result, sufficient connection strength of the thin metal wire could not be obtained. For this reason, there has been a problem that the thin metal wire is peeled off during resin sealing and the wire is broken.
【０００４】また絶縁体層に配線パターンを設けた中継
部は多くの工数を要し、リードフレームが高価になり、
かつ、汎用性に欠けるため一層コストアップを来たすと
いう問題もあった。Further, the relay section having the wiring pattern provided on the insulating layer requires a lot of man-hours, and the lead frame becomes expensive.
Moreover, there is a problem that the cost is further increased due to lack of versatility.
【０００５】[0005]
【課題を解決するための手段】上記課題に対して本発明
では、中継部を絶縁体層と簡単なボンディングパッドま
たは導電体細粒で構成し、さらに２本の金属細線の端を
重ねてボンディング接続している。According to the present invention, in order to solve the above-mentioned problems, the relay portion is composed of an insulating layer and a simple bonding pad or conductive fine particles, and the ends of two metal fine wires are overlapped and bonded. Connected.
【０００６】[0006]
【実施例】つぎに図面を参照して本発明を説明する。図
１は本発明の一実施例の金属細線により半導体素子電極
とリードフレーム内部リード間を接続した状態の断面
図、図２は図１の中継部の平面図である。図１と図２に
おいて、リードフレームの半導体素子搭載部１に半導体
素子４が固着され、この半導体素子４の電極とリードフ
レームの内部リード２との間は、半導体素子搭載部１の
縁辺に設けている中継部で一旦中継された金属細線５と
６で接続されている。中継部は絶縁体層３の上にボンデ
ィングパッド３ａを形成して成り、このボンディングパ
ッド３ａの上で一端が半導体素子電極に接続された金属
細線５の他端と、内部リード２に一端が接続された金属
細線６の他端とが重ね合わされてボンディング接続され
ている。The present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a state in which a semiconductor element electrode and an inner lead of a lead frame are connected by a thin metal wire according to an embodiment of the present invention, and FIG. 2 is a plan view of a relay portion of FIG. 1 and 2, a semiconductor element 4 is fixed to a semiconductor element mounting portion 1 of a lead frame, and an electrode between the semiconductor element 4 and an inner lead 2 of the lead frame is provided on an edge of the semiconductor element mounting portion 1. They are connected by thin metal wires 5 and 6 which are once relayed in the relay section. The relay portion is formed by forming a bonding pad 3a on the insulator layer 3, and one end of the metal thin wire 5 whose one end is connected to the semiconductor element electrode is connected to the inner lead 2 on the bonding pad 3a. The other end of the thin metal wire 6 is overlapped and bonded.
【０００７】このような両金属細線５と６を直接接続し
ていることにより、金属細線が中継部から剥離しても半
導体素子から内部リードまでの導通が保たれるので、絶
縁体層３上のボンディングパッド３ａは単なる点状のも
のでもよく、多工数の配線パターンの必要はない。By directly connecting both of the metal thin wires 5 and 6 as described above, even if the metal thin wires are separated from the relay portion, the continuity from the semiconductor element to the internal lead is maintained, so that the insulating layer 3 is kept. The bonding pad 3a may be a mere dot-shaped one and does not require a wiring pattern with many man-hours.
【０００８】図３は本発明の実施例２の中継部の断面図
である。図において、半導体素子搭載部１縁辺の絶縁体
層３上にはＡｕの細粒３ｂが散布され、細粒３ｂの上に
半導体素子および内部リードからの両金属細線５と６と
の他端を重ね合わせてボンディング接続されている。そ
して接続後は接続部以外のＡｕ細粒は取り除かれる。本
例では、絶縁体層３上にボンディングパッドや配線パタ
ーンを設けるのに比べて極めて簡単にできる利点があ
る。FIG. 3 is a sectional view of a relay portion according to the second embodiment of the present invention. In the figure, fine particles 3b of Au are scattered on the insulator layer 3 at the edge of the semiconductor element mounting portion 1, and the other ends of both metal fine wires 5 and 6 from the semiconductor element and the internal lead are placed on the fine particles 3b. Bonding connection is made by overlapping. Then, after the connection, the Au fine particles other than the connection portion are removed. In this example, there is an advantage that it can be made extremely simple as compared with the case where the bonding pad and the wiring pattern are provided on the insulator layer 3.
【０００９】[0009]
【発明の効果】上記のように本発明では、半導体素子の
電極とリードフレームの内部リードとの間を、中間に中
継部を設けて金属細線で接続する際に、この中継部にお
ける半導体素子電極および内部リードからの両金属細線
端を重ねて直接接続することにより、この金属細線が中
継部の導電体より剥離することがあっても、両金属細線
の間の導通が保たれる。また、中継部の導電体として、
Ａｕなどの細粒を散布したものを用いることにより、導
電体形成の工数を大幅に少なくできるという効果があ
る。As described above, according to the present invention, when a relay portion is provided in the middle between the electrode of the semiconductor element and the inner lead of the lead frame to connect with the metal thin wire, the semiconductor element electrode in the relay portion is connected. By overlapping and directly connecting both ends of the metal thin wires from the inner lead, even if the metal thin wires are separated from the conductor of the relay portion, the continuity between the metal thin wires is maintained. Also, as the conductor of the relay section,
By using fine particles such as Au dispersed, there is an effect that the number of steps for forming the conductor can be significantly reduced.
【図１】本発明の実施例１の半導体素子電極とリードフ
レーム内部リードとの間を金属細線により中継部にて中
継接続した状態を示す断面図である。FIG. 1 is a cross-sectional view showing a state in which a semiconductor element electrode according to a first embodiment of the present invention and an inner lead of a lead frame are relay-connected by a metal thin wire at a relay portion.
【図２】図１の中継部の平面図である。FIG. 2 is a plan view of a relay unit of FIG.
【図３】本発明の実施例２の半導体素子電極とリードフ
レーム内部リードとの間を金属細線により中継部にて中
継接続した中継部を示す断面図である。FIG. 3 is a cross-sectional view showing a relay section in which a semiconductor element electrode and a lead frame inner lead according to a second embodiment of the present invention are relay-connected by a relay section with a thin metal wire.
【図４】従来の半導体装置の半導体素子電極とリードフ
レーム内部リードとの間を金属細線により中継部にて中
継接続した状態を示す断面図である。FIG. 4 is a cross-sectional view showing a state in which a semiconductor element electrode and a lead frame inner lead of a conventional semiconductor device are relay-connected by a metal thin wire at a relay portion.
１ 半導体素子搭載部 ２ 内部リード ３ 絶縁体層 ３ａ ボンディングパッド ３ｂ Ａｕ細粒 ３ｃ 配線パターン ４ 半導体素子 ５，６ 金属細線 1 Semiconductor Element Mounting Part 2 Internal Lead 3 Insulator Layer 3a Bonding Pad 3b Au Fine Grain 3c Wiring Pattern 4 Semiconductor Element 5,6 Metal Fine Wire
Claims (2)
導体素子を搭載し、前記半導体素子搭載部の縁辺に設け
た絶縁体層の上に導電体を有する中継部を中継点として
前記半導体素子上の電極と前記リードフレームの内部リ
ードとの間を金属細線で接続し樹脂封止した半導体装置
において、前記中継部において前記半導体素子電極につ
ながる金属細線の他端と内部リードにつながる金属細線
の他端とが重ね合わせ接続されていることを特徴とする
半導体装置。1. A semiconductor element is mounted on a semiconductor element mounting portion of a lead frame, and a relay portion having a conductor on an insulator layer provided on an edge of the semiconductor element mounting portion is used as a relay point on the semiconductor element. In a semiconductor device in which an electrode and an inner lead of the lead frame are connected with a metal thin wire and resin-sealed, the other end of the metal thin wire connected to the semiconductor element electrode and the other end of the metal thin wire connected to the inner lead in the relay section. A semiconductor device in which and are connected in an overlapping manner.
散布された金属細粒からなることを特徴とする請求項１
の半導体装置。2. The conductor of the relay portion is made of fine metal particles dispersed on the insulator layer.
Semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16521192A JPH065647A (en) | 1992-06-24 | 1992-06-24 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16521192A JPH065647A (en) | 1992-06-24 | 1992-06-24 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH065647A true JPH065647A (en) | 1994-01-14 |
Family
ID=15807961
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16521192A Pending JPH065647A (en) | 1992-06-24 | 1992-06-24 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH065647A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10324069B4 (en) * | 2003-05-27 | 2005-06-23 | Infineon Technologies Ag | Circuit arrangement and method for the conductive connection of contact pads in semiconductor chips |
| JP2007525842A (en) * | 2004-02-26 | 2007-09-06 | フリースケール セミコンダクター インコーポレイテッド | Semiconductor package with crossed conductor assembly and method of manufacturing the same |
| DE102004047306B4 (en) * | 2004-09-29 | 2008-02-07 | Infineon Technologies Ag | Power semiconductor device with several component components |
| US7391121B2 (en) | 2005-02-10 | 2008-06-24 | Infineon Technologies Ag | Semiconductor device with a number of bonding leads and method for producing the same |
| JP2011187841A (en) * | 2010-03-10 | 2011-09-22 | Renesas Electronics Corp | Electronic device, relay member, mounting substrate, and method of manufacturing electronic device |
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| JPH02196450A (en) * | 1989-01-25 | 1990-08-03 | Nec Corp | Resin-sealed semiconductor device |
| JPH02303038A (en) * | 1989-05-17 | 1990-12-17 | Seiko Epson Corp | Wire bonding |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02196450A (en) * | 1989-01-25 | 1990-08-03 | Nec Corp | Resin-sealed semiconductor device |
| JPH02303038A (en) * | 1989-05-17 | 1990-12-17 | Seiko Epson Corp | Wire bonding |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10324069B4 (en) * | 2003-05-27 | 2005-06-23 | Infineon Technologies Ag | Circuit arrangement and method for the conductive connection of contact pads in semiconductor chips |
| JP2007525842A (en) * | 2004-02-26 | 2007-09-06 | フリースケール セミコンダクター インコーポレイテッド | Semiconductor package with crossed conductor assembly and method of manufacturing the same |
| DE102004047306B4 (en) * | 2004-09-29 | 2008-02-07 | Infineon Technologies Ag | Power semiconductor device with several component components |
| US7391121B2 (en) | 2005-02-10 | 2008-06-24 | Infineon Technologies Ag | Semiconductor device with a number of bonding leads and method for producing the same |
| JP2011187841A (en) * | 2010-03-10 | 2011-09-22 | Renesas Electronics Corp | Electronic device, relay member, mounting substrate, and method of manufacturing electronic device |
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