JPH0637239A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH0637239A JPH0637239A JP18655892A JP18655892A JPH0637239A JP H0637239 A JPH0637239 A JP H0637239A JP 18655892 A JP18655892 A JP 18655892A JP 18655892 A JP18655892 A JP 18655892A JP H0637239 A JPH0637239 A JP H0637239A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- resin
- lead
- leads
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は樹脂封止型半導体装置に
係り、特に、大型半導体素子の搭載に好適な樹脂封止型
半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device, and more particularly to a resin-sealed semiconductor device suitable for mounting a large semiconductor element.
【０００２】[0002]
【従来の技術】特開平2−246125 号公報に開示されてい
る従来の樹脂封止型半導体装置を図９に示す。2. Description of the Related Art FIG. 9 shows a conventional resin-sealed semiconductor device disclosed in Japanese Patent Laid-Open No. 2-246125.
【０００３】図９において、半導体素子１は信号リード
２にその回路形成面１ａ側で絶縁部材３を介して接合さ
れており、半導体素子１と信号リード２はそれぞれ金属
細線４で電気的に接続されている。これらは樹脂６で封
止されてパッケージ７を形成している。このような半導
体装置の構造はリード・オン・チップ構造と呼ばれてい
る。In FIG. 9, a semiconductor element 1 is joined to a signal lead 2 on its circuit forming surface 1a side via an insulating member 3, and the semiconductor element 1 and the signal lead 2 are electrically connected by a thin metal wire 4, respectively. Has been done. These are sealed with resin 6 to form a package 7. The structure of such a semiconductor device is called a lead-on-chip structure.
【０００４】半導体素子１と信号リード２の接合は、半
導体素子１の回路形成面１ａ中央部分に限定されてお
り、半導体素子１と信号リード２を接合するための絶縁
部材３の面積は小さくなっている。これは日経マイクロ
デバイス、１９８９年９月号，Ｎo.５１，pp．１０９〜
１１４で示されているように、パッケージを基板に実装
する際の加熱によって、パッケージにクラックが発生す
るのを防止するには、半導体素子１と信号リード２の接
合面積を小さくするのが有利なためである。The joining of the semiconductor element 1 and the signal lead 2 is limited to the central portion of the circuit forming surface 1a of the semiconductor element 1, and the area of the insulating member 3 for joining the semiconductor element 1 and the signal lead 2 becomes small. ing. This is Nikkei Microdevice, September 1989 issue, No. 51, pp. 109 ~
As indicated by reference numeral 114, in order to prevent cracks from being generated in the package due to heating when mounting the package on the substrate, it is advantageous to reduce the bonding area between the semiconductor element 1 and the signal lead 2. This is because.
【０００５】[0005]
【発明が解決しようとする課題】半導体素子の寸法は、
その集積度の増加に伴って年々大きくなってきている。
図９のようなリード・オン・チップ構造の半導体装置で
は、半導体素子が信号リードのみによって支持されてい
る。従って、半導体素子と信号リードを接合する絶縁部
材の面積、すなわち、両者の接合面積を小さくしたまま
で大型の半導体素子を搭載すると、半導体素子を信号リ
ードに固定した際の剛性が不足するようになる。The dimensions of semiconductor devices are as follows:
It is increasing year by year with the increase in the degree of accumulation.
In the semiconductor device having the lead-on-chip structure as shown in FIG. 9, the semiconductor element is supported only by the signal leads. Therefore, if a large semiconductor element is mounted while the area of the insulating member that joins the semiconductor element and the signal lead, that is, the joining area between the two is reduced, the rigidity when fixing the semiconductor element to the signal lead may become insufficient. Become.
【０００６】本発明の樹脂封止型半導体装置は、トラン
スファーモールドによってパッケージが形成されてお
り、封止の際に樹脂が高圧で金型内に流入する。そのた
め、信号リードに固定した半導体素子の剛性が不十分で
あるような場合には、樹脂封止の際に半導体素子の傾斜
や位置ずれなどの変動が起こりやすくなる。半導体素子
の変動が起こると、樹脂の充てん性が悪化してパッケー
ジ内にボイドを発生させたり、半導体素子のパッケージ
表面への露出などの不良を引き起こす。従って、大型の
半導体素子を樹脂封止型半導体装置に搭載する場合に
は、樹脂封止時の半導体素子の変動防止を考慮する必要
がある。In the resin-sealed semiconductor device of the present invention, the package is formed by transfer molding, and the resin flows into the mold at a high pressure during the sealing. Therefore, when the rigidity of the semiconductor element fixed to the signal lead is insufficient, variations such as inclination and displacement of the semiconductor element are likely to occur during resin sealing. When the semiconductor element fluctuates, the filling property of the resin deteriorates, which causes voids in the package and causes defects such as exposure of the semiconductor element to the package surface. Therefore, when mounting a large-sized semiconductor element in a resin-sealed semiconductor device, it is necessary to consider prevention of fluctuation of the semiconductor element during resin sealing.
【０００７】本発明の目的は、大型の半導体素子を搭載
してもボイドの発生や半導体素子の露出などの不良が発
生しない樹脂封止型半導体装置を提供することにある。An object of the present invention is to provide a resin-sealed semiconductor device in which defects such as voids and exposure of the semiconductor element do not occur even when a large semiconductor element is mounted.
【０００８】[0008]
【課題を解決するための手段】上記目的は、信号リード
が配設されている半導体素子の回路形成面以外の部分に
半導体素子を支持して位置の変動を防止する支持リード
を設けることにより達成される。The above-mentioned object is achieved by providing a support lead for supporting the semiconductor element and preventing a positional change on a portion other than the circuit forming surface of the semiconductor element on which the signal lead is arranged. To be done.
【０００９】第１の発明は、半導体素子と半導体素子の
回路形成面上に絶縁部材を介して複数の信号リードを配
設し、半導体素子の回路形成面に対して反対側の面に半
導体素子支持用リードを配設してこれらの周囲を樹脂で
封止してパッケージを形成したことを特徴とする。According to a first aspect of the present invention, a semiconductor element and a plurality of signal leads are arranged on the circuit forming surface of the semiconductor element via an insulating member, and the semiconductor element is provided on a surface opposite to the circuit forming surface of the semiconductor element. It is characterized in that a supporting lead is arranged and the periphery thereof is sealed with a resin to form a package.
【００１０】第２の発明は、半導体素子と半導体素子の
回路形成面上に絶縁部材を介して複数の信号リードを配
設し、半導体素子の側面に半導体素子支持用リードを配
設してこれらの周囲を樹脂で封止してパッケージを形成
したことを特徴とする。According to a second aspect of the present invention, a semiconductor element and a plurality of signal leads are provided on a circuit formation surface of the semiconductor element via an insulating member, and a semiconductor element support lead is provided on a side surface of the semiconductor element. The package is formed by sealing the periphery of with a resin.
【００１１】[0011]
【作用】半導体素子の回路形成面に対して反対側の面ま
たは半導体素子の側面に信号リードとは異なる半導体素
子支持用リードを設け、半導体素子をリードへ固定した
際の剛性をあげることによって、樹脂封止の際に半導体
素子の位置が変動するのを防ぐことができる。それによ
って、大型の半導体素子を搭載してもボイドの発生や半
導体素子の露出などの不良が発生しない樹脂封止型半導
体装置を得ることができる。By providing a semiconductor element supporting lead different from the signal lead on the surface opposite to the circuit forming surface of the semiconductor element or on the side surface of the semiconductor element, and increasing the rigidity when fixing the semiconductor element to the lead, It is possible to prevent the position of the semiconductor element from changing during the resin sealing. As a result, it is possible to obtain a resin-sealed semiconductor device in which defects such as generation of voids and exposure of semiconductor elements do not occur even when a large semiconductor element is mounted.
【００１２】[0012]
【実施例】以下、本発明の一実施例を図１及び図２によ
って説明する。図１は本発明の一実施例である樹脂封止
型半導体装置の斜視図、図２は図１のイ−イ線で切った
断面図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a perspective view of a resin-encapsulated semiconductor device which is an embodiment of the present invention, and FIG. 2 is a sectional view taken along the line EE of FIG.
【００１３】半導体素子１は、その回路形成面１ａ側に
おいて絶縁部材３を介して信号リード２に接合されてい
る。半導体素子１と信号リード２は金属細線４によって
電気的に接続されている。また、半導体素子１の回路形
成面の反対側面１ｂには、半導体素子１を支持するため
の支持リード５が回路形成面の反対側面１ｂに接触して
配置されている。支持リード５は半導体素子１の回路形
成面の反対側面１ｂの両端部近傍にそれぞれ１個所ずつ
設けられている。本実施例の半導体装置では、半導体素
子１，信号リード２，絶縁部材３，金属細線４及び支持
リード５を樹脂６で封止してパッケージ７を形成する。
信号リード２はパッケージ７の長辺側側面の２方向から
パッケージ７外部へ引き出されている。さらに、信号リ
ード２はパッケージ７の外側でその先端をパッケージ７
の下面まで曲げたＪベンド型になっている。The semiconductor element 1 is joined to the signal lead 2 via the insulating member 3 on the circuit forming surface 1a side. The semiconductor element 1 and the signal lead 2 are electrically connected by the thin metal wire 4. A support lead 5 for supporting the semiconductor element 1 is disposed on the side surface 1b opposite to the circuit forming surface of the semiconductor element 1 in contact with the side surface 1b opposite to the circuit forming surface. One support lead 5 is provided near each end of the side surface 1b opposite to the circuit formation surface of the semiconductor element 1. In the semiconductor device of this embodiment, the semiconductor element 1, the signal lead 2, the insulating member 3, the thin metal wire 4 and the support lead 5 are sealed with the resin 6 to form the package 7.
The signal lead 2 is drawn out of the package 7 from two directions of the side surface on the long side of the package 7. Further, the signal leads 2 are provided on the outside of the package 7 with the tips thereof
It is a J-bend type that is bent to the bottom surface of.
【００１４】本実施例によれば、半導体素子１の回路形
成面の反対側面１ｂに半導体素子１を支持するための支
持リード５を設けることによって、大型の半導体素子を
搭載しても十分な剛性が得られるので、樹脂封止の際に
半導体素子の位置が変動するのを防止することができ
る。これによって、パッケージ内のボイドの発生や半導
体素子の露出などの不良発生防止を考慮した樹脂封止型
半導体装置を得ることができる。According to this embodiment, by providing the support lead 5 for supporting the semiconductor element 1 on the side surface 1b opposite to the circuit forming surface of the semiconductor element 1, sufficient rigidity is achieved even if a large semiconductor element is mounted. Therefore, it is possible to prevent the position of the semiconductor element from changing during resin sealing. As a result, it is possible to obtain a resin-sealed semiconductor device that takes into consideration the prevention of defects such as the generation of voids in the package and the exposure of semiconductor elements.
【００１５】次に、本実施例に示した樹脂封止型半導体
装置の製造方法について説明する。図３に示す信号リー
ド用リードフレーム８の信号リード２に半導体素子１を
その回路形成面１ａ側で絶縁部材３を介して接合する。
次に、半導体素子１と信号リード２を金属細線４によっ
て電気的に接続する。半導体素子１の回路形成面の反対
側面１ｂ側から図４に示す支持リード用リードフレーム
９を信号リード用リードフレーム８に重ねあわせる。半
導体素子１は信号リード用リードフレーム８と支持リー
ド用リードフレーム９の間にはさまれるようになり、こ
の際、半導体素子１の回路形成面の反対側面１ｂに支持
リード５が接触する。信号リード用リードフレーム８と
支持リード用リードフレーム９を重ねあわせた状態で樹
脂封止を行ってパッケージ７を形成する。その後、信号
リード用リードフレーム８と支持リード用リードフレー
ム９のそれぞれの外枠部分１０を切断し、信号リード２
をパッケージ７の外部で所定の形状に成形して樹脂封止
型半導体装置を得る。なお図３，図４に示した１点鎖線
は半導体素子１を、図３の２点鎖線は絶縁部材３を示
す。Next, a method of manufacturing the resin-encapsulated semiconductor device shown in this embodiment will be described. The semiconductor element 1 is bonded to the signal lead 2 of the lead frame 8 for signal lead shown in FIG. 3 via the insulating member 3 on the circuit forming surface 1a side.
Next, the semiconductor element 1 and the signal lead 2 are electrically connected by the thin metal wire 4. The supporting lead lead frame 9 shown in FIG. 4 is superposed on the signal lead lead frame 8 from the side 1b opposite to the circuit forming surface of the semiconductor element 1. The semiconductor element 1 is sandwiched between the signal lead lead frame 8 and the support lead lead frame 9, and at this time, the support lead 5 contacts the side surface 1b opposite to the circuit forming surface of the semiconductor element 1. The package 7 is formed by resin-sealing the lead frame 8 for signal leads and the lead frame 9 for support leads in an overlapped state. After that, the outer frame portions 10 of the lead frame 8 for signal leads and the lead frame 9 for support leads are cut, and the signal leads 2
Is molded into a predetermined shape outside the package 7 to obtain a resin-sealed semiconductor device. Note that the alternate long and short dash line shown in FIGS. 3 and 4 indicates the semiconductor element 1, and the alternate long and two short dashes line in FIG. 3 indicates the insulating member 3.
【００１６】絶縁部材３には、エポキシ樹脂，フェノー
ル樹脂，ポリイミド樹脂などから選択された一種または
複数の樹脂を主成分とし、これに必要に応じて無機質フ
ィラー、各種添加剤などを加えた材料を使用する。The insulating member 3 is made of a material containing one or a plurality of resins selected from epoxy resin, phenol resin, polyimide resin, etc. as a main component, and inorganic fillers, various additives, etc. added as necessary. use.
【００１７】信号リード２及び支持リード５は、例え
ば、Ｆｅ−Ｎｉ合金（Ｆｅ−４２Ｎｉなど）、Ｃｕ合金
などで形成されている。The signal lead 2 and the support lead 5 are made of, for example, Fe-Ni alloy (Fe-42Ni or the like), Cu alloy, or the like.
【００１８】金属細線４にはアルミニウム（Ａｌ），金
（Ａｕ）あるいは銅（Ｃｕ）などの細線を使用する。As the metal fine wire 4, a fine wire made of aluminum (Al), gold (Au), copper (Cu) or the like is used.
【００１９】樹脂６には、フェノール系硬化剤，シリコ
ンゴムおよびフィラーが添加されたエポキシ樹脂を使用
し、この他に難燃化剤，カップリング剤，着色剤などが
若干量添加されている。The resin 6 is an epoxy resin to which a phenolic curing agent, silicone rubber and a filler are added, and a flame retardant, a coupling agent, a coloring agent and the like are added in a small amount.
【００２０】信号リード２がパッケージの外部に引き出
されている方向は、図１および図２に示したような２方
向に限定するものではなく、１方向あるいは３方向以上
であっても良い。さらに図では信号リード２をパッケー
ジの外部で下方に折り曲げ、その先端をパッケージの下
面まで曲げたＪベンド型を例にとって示してあるが、信
号リード２は任意の方向，形状に折り曲げても良いし、
また折り曲げなくとも良い。The directions in which the signal leads 2 are drawn out of the package are not limited to the two directions shown in FIGS. 1 and 2, and may be one direction or three or more directions. Further, in the drawing, the J-bend type in which the signal lead 2 is bent downward outside the package and the tip is bent to the lower surface of the package is shown as an example, but the signal lead 2 may be bent in any direction and shape. ,
Also, it does not need to be bent.
【００２１】図１及び図２に示した実施例では、半導体
素子１の回路形成面の反対側面１ｂと支持リード２を接
合せず、接触させておくだけの例を示したが、図５に示
すように半導体素子１の回路形成面の反対側面１ｂに支
持リード２を接合部材１１を介して接合させても良い。In the embodiment shown in FIGS. 1 and 2, the side surface 1b opposite to the circuit forming surface of the semiconductor element 1 and the supporting lead 2 are not joined, but only contacted with each other. As shown, the support lead 2 may be bonded to the side surface 1b opposite to the circuit forming surface of the semiconductor element 1 via the bonding member 11.
【００２２】また図１及び図２に示した実施例では、支
持リード５を半導体素子１の回路形成面の反対側面１ｂ
の両端部の２個所に設ける例を示したが、支持リード５
は回路形成面の反対側面１ｂの両端部だけでなく図６に
示すように両端部と中央部のそれぞれ３個所に設けたも
のでも良いし、３個所以上設けたものでも良い。Further, in the embodiment shown in FIGS. 1 and 2, the support lead 5 is provided on the side surface 1b opposite to the circuit forming surface of the semiconductor element 1.
Although an example in which it is provided at two positions on both ends of the
May be provided not only at both ends of the side surface 1b opposite to the circuit forming surface, but also at both ends and at the center as shown in FIG. 6, or at three or more positions.
【００２３】さらに支持リード５は図７に示すように、
半導体素子１の回路形成面の反対側面１ｂ側のコーナ部
に配置し、半導体素子１の回路形成面の反対側面１ｂと
側面１ｃの両方に接するようにしたものでも差し支えな
い。Further, the support lead 5 is, as shown in FIG.
The semiconductor element 1 may be arranged at a corner portion on the side opposite to the side where the circuit is formed on the side of the semiconductor element 1 so as to contact both the side 1b opposite to the side where the circuit is formed on the side of the semiconductor element 1 and the side 1c.
【００２４】支持リード５の幅を大きくしすぎると、支
持リードと樹脂の界面ではく離が発生した場合、支持リ
ード５のコーナが起点となって樹脂６に割れが発生する
可能性がある。従って、支持リード５の幅は、半導体素
子の変動を防止するのに必要最小限の寸法にすることが
望ましい。If the width of the support lead 5 is too large, if peeling occurs at the interface between the support lead and the resin, the corner of the support lead 5 may be a starting point, and the resin 6 may be cracked. Therefore, it is desirable that the width of the support lead 5 is set to the minimum dimension necessary to prevent the fluctuation of the semiconductor element.
【００２５】図８に本発明の第四の実施例である樹脂封
止型半導体装置を示す。FIG. 8 shows a resin-sealed semiconductor device which is a fourth embodiment of the present invention.
【００２６】半導体素子１は、その回路形成面１ａ側に
おいて絶縁部材３を介して信号リード２に接合されてい
る。半導体素子１と信号リード２は金属細線４によって
電気的に接続されている。また、半導体素子１の側面１
ｃには、半導体素子１を支持するための支持リード５が
設けられている。この支持リード５は半導体素子１の側
面１ｃに接合部材１１を介して接合されている。本実施
例の半導体装置では、半導体素子１，信号リード２，絶
縁部材３，金属細線４及び支持リード５を樹脂６で封止
してパッケージ７を形成する。The semiconductor element 1 is joined to the signal lead 2 via the insulating member 3 on the circuit forming surface 1a side. The semiconductor element 1 and the signal lead 2 are electrically connected by the thin metal wire 4. In addition, the side surface 1 of the semiconductor element 1
Support leads 5 for supporting the semiconductor element 1 are provided in c. The support lead 5 is bonded to the side surface 1c of the semiconductor element 1 via a bonding member 11. In the semiconductor device of this embodiment, the semiconductor element 1, the signal lead 2, the insulating member 3, the thin metal wire 4 and the support lead 5 are sealed with the resin 6 to form the package 7.
【００２７】本実施例でも、半導体素子１の側面１ｃに
半導体素子１を支持するための支持リード５を設けるこ
とによって、大型の半導体素子を搭載しても樹脂封止の
際に半導体素子の位置が変動するのを防止することがで
きる。これによって、ボイドの発生や半導体素子の露出
などの不良発生の防止を考慮した樹脂封止型半導体装置
を得ることができる。また、本実施例のような構成にす
ることによって、半導体装置の薄形化にも対応すること
ができる。Also in this embodiment, by providing the support lead 5 for supporting the semiconductor element 1 on the side surface 1c of the semiconductor element 1, even if a large semiconductor element is mounted, the position of the semiconductor element is sealed during resin sealing. Can be prevented from fluctuating. This makes it possible to obtain a resin-encapsulated semiconductor device in which prevention of defects such as generation of voids and exposure of semiconductor elements is taken into consideration. Further, by adopting the configuration of this embodiment, it is possible to cope with the thinning of the semiconductor device.
【００２８】[0028]
【発明の効果】本発明によれば、樹脂封止の際に半導体
素子の位置が変動するのを防ぐことができるので、大型
の半導体素子を搭載してもボイドの発生や半導体素子の
露出などの不良が発生しない樹脂封止型半導体装置を提
供することができる。According to the present invention, it is possible to prevent the position of the semiconductor element from fluctuating during resin encapsulation. Therefore, even if a large semiconductor element is mounted, a void is generated or the semiconductor element is exposed. It is possible to provide a resin-sealed semiconductor device in which the above defects do not occur.
【図１】本発明の樹脂封止型半導体装置の一実施例を示
す斜視図。FIG. 1 is a perspective view showing an embodiment of a resin-sealed semiconductor device of the present invention.
【図２】図１のイ−イ線断面図。FIG. 2 is a sectional view taken along the line EE of FIG.
【図３】信号リード用リードフレームの例を示す平面
図。FIG. 3 is a plan view showing an example of a lead frame for signal lead.
【図４】支持リード用リードフレームの例を示す平面
図。FIG. 4 is a plan view showing an example of a lead frame for supporting leads.
【図５】本発明の第二の実施例の断面図。FIG. 5 is a sectional view of a second embodiment of the present invention.
【図６】本発明の第三の実施例の断面図。FIG. 6 is a sectional view of a third embodiment of the present invention.
【図７】本発明の第四の実施例の断面図。FIG. 7 is a sectional view of a fourth embodiment of the present invention.
【図８】本発明の樹脂封止型半導体装置の他の実施例を
示す断面図。FIG. 8 is a sectional view showing another embodiment of the resin-sealed semiconductor device of the present invention.
【図９】本発明が対象とする従来の樹脂封止型半導体装
置の例を示す斜視図。FIG. 9 is a perspective view showing an example of a conventional resin-sealed semiconductor device targeted by the present invention.
１…半導体素子、１ａ…半導体素子の回路形成面、１ｂ
…半導体素子の回路形成面の反対側面、１ｃ…半導体素
子の側面、２…信号リード、３…絶縁部材、４…金属細
線、５…支持リード、６…樹脂、７…パッケージ。DESCRIPTION OF SYMBOLS 1 ... Semiconductor element, 1a ... Circuit formation surface of semiconductor element, 1b
... Side surface opposite to circuit forming surface of semiconductor element, 1c Side surface of semiconductor element, 2 ... Signal lead, 3 ... Insulating member, 4 ... Metal wire, 5 ... Support lead, 6 ... Resin, 7 ... Package.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 田中 直敬 茨城県土浦市神立町502番地 株式会社日 立製作所機械研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Naotaka Tanaka 502 Kintate-cho, Tsuchiura-shi, Ibaraki Prefecture Hiritsu Seisakusho Co., Ltd.
Claims (2)
面上に前記半導体素子と電気的に絶縁する絶縁部材を介
して接合された複数の信号リードを備え、周囲を樹脂で
封止してパッケージを形成した樹脂封止型半導体装置に
おいて、前記半導体素子の前記回路形成面に対して反対
側の面に前記半導体素子を支持するためのリードを設け
たことを特徴とする樹脂封止型半導体装置。1. A semiconductor element, and a plurality of signal leads joined to the circuit forming surface of the semiconductor element via an insulating member electrically insulating from the semiconductor element, the periphery of which is sealed with resin. In a resin-sealed semiconductor device in which a package is formed, a lead for supporting the semiconductor element is provided on a surface of the semiconductor element opposite to the circuit formation surface, apparatus.
面上に前記半導体素子と電気的に絶縁する絶縁部材を介
して接合された複数の信号リードを備え、周囲を樹脂で
封止してパッケージを形成した樹脂封止型半導体装置に
おいて、前記半導体素子の側面に前記半導体素子を支持
するためのリードを設けたことを特徴とする樹脂封止型
半導体装置。2. A semiconductor element, and a plurality of signal leads joined on a circuit forming surface of the semiconductor element via an insulating member electrically insulating from the semiconductor element, the periphery of which is sealed with resin. A resin-sealed semiconductor device having a package, wherein a lead for supporting the semiconductor element is provided on a side surface of the semiconductor element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18655892A JPH0637239A (en) | 1992-07-14 | 1992-07-14 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18655892A JPH0637239A (en) | 1992-07-14 | 1992-07-14 | Resin-sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0637239A true JPH0637239A (en) | 1994-02-10 |
Family
ID=16190630
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18655892A Pending JPH0637239A (en) | 1992-07-14 | 1992-07-14 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0637239A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0807972A3 (en) * | 1996-05-09 | 2000-05-31 | Oki Electric Industry Co., Ltd. | Semiconductor device and method of its fabrication |
-
1992
- 1992-07-14 JP JP18655892A patent/JPH0637239A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0807972A3 (en) * | 1996-05-09 | 2000-05-31 | Oki Electric Industry Co., Ltd. | Semiconductor device and method of its fabrication |
| US6258621B1 (en) | 1996-05-09 | 2001-07-10 | Oki Electric Industry Co., Ltd. | Method of fabricating a semiconductor device having insulating tape interposed between chip and chip support |
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