JP2756436B2 - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereofInfo
- Publication number
- JP2756436B2 JP2756436B2 JP7342374A JP34237495A JP2756436B2 JP 2756436 B2 JP2756436 B2 JP 2756436B2 JP 7342374 A JP7342374 A JP 7342374A JP 34237495 A JP34237495 A JP 34237495A JP 2756436 B2 JP2756436 B2 JP 2756436B2
- Authority
- JP
- Japan
- Prior art keywords
- leads
- lead
- pellet
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Description
【発明の詳細な説明】
【０００１】〔技術分野〕
本発明は、半導体装置およびその製造方法に関し、特
に、樹脂封止型半導体装置におけるペレットの電気的接
続に適用して有効な技術に関する。
【０００２】〔背景技術〕いわゆる樹脂封止型半導体装
置においては、ペレットの大型化に伴い、パッケージ側
端とペレット取付部であるタブとの間の寸法が一段と狭
くなる傾向にある。これは、ペレットが大きくなってい
るのに、これを収容するパッケージのサイズが規格化さ
れているためパッケージを大きくすることができないこ
とに起因する。
【０００３】その結果、外部端子であるリードのうち、
パッケージを形成する樹脂に埋設される長さがその構造
上短い、いわゆる短リードにおいてはその接着強度が一
段と小さくなるため、パッケージから抜け易く、またリ
ード折曲成形時にリードと樹脂との間の剥がれが生じ易
くなると考えられる。
【０００４】そのため、電気的導通不良または耐湿性低
下等の半導体装置の信頼性低下を来し易くなることが本
発明者により見い出された。
【０００５】なお、樹脂封止型半導体装置については、
１９８０年１月１５日、株式会社工業調査会発行、日本
マイクロエレクトロニクス協会編「ＩＣ化実装技術」Ｐ
１４９〜Ｐ１５０に説明されている。
【０００６】〔発明の目的〕本発明の目的は、樹脂封止
型半導体装置、特に大型ペレットを搭載する半導体装置
であっても、そのパッケージの樹脂とリードとの接着強
度を大幅に増大することができる技術を提供することに
ある。
【０００７】本発明の前記ならびにその他の目的と新規
な特徴は、本明細書の記述および添付図面から明らかに
なるであろう。
【０００８】〔発明の概要〕本願において開示される発
明のうち、代表的なものの概要を簡単に説明すれば、次
の通りである。
【０００９】すなわち、本発明の半導体装置は、半導体
集積回路が形成された回路形成面およびこれに対して反
対側の非回路形成面を有する四角形の半導体ペレット
と、前記回路形成面に列となって配置された複数のボン
ディングパッドと、前記半導体ペレットの一側辺を横切
って前記ボンディングパッドの前記列に臨み前記回路形
成面に接着剤により接着される複数の第１のリードと、
前記半導体ペレットの前記一側辺の延長線を横切って前
記ボンディングパッドの前記列と同一の列に臨む複数の
第２のリードと、前記第１および第２のリードのそれぞ
れの内部リード部と前記複数のボンディングパッドとを
接続する複数のボンディングワイヤと、前記半導体ペレ
ット、前記第１および第２の複数のリードそれぞれの内
部リード部を封止するパッケージ樹脂部とを有すること
を特徴とする。本発明の半導体装置の製造方法は、半導
体集積回路が形成された回路形成面およびこれに対して
反対側の非回路形成面を有し、かつ前記回路形成面に列
となって複数のボンディングパッドが配置された四角形
の半導体ペレットを準備する工程と、複数の第１のリー
ドおよび複数の第２のリードを有するリードフレームを
準備する工程と、前記第１のリードが前記半導体ペレッ
トの一側辺を横切って前記ボンディングパッドの前記列
に望み、さらに前記第２のリードが前記一側辺の延長線
を横切り前記ボンディングパッドの前記列と同一の列に
臨むように、前記第１および第２のリードを前記半導体
ペレットの回路形成面に接着する工程と、前記第１およ
び第２のリードのそれぞれの内部リード部と前記複数の
ボンディングパッドとを電気的に接続する工程と、前記
半導体ペレット、前記第１および第２の複数のリードそ
れぞれの内部リード部を封止する工程とを有することを
特徴とする。
【００１０】このように、半導体ペレットの一側辺を横
切ってボンディングパッドに向かう第１のリードと、一
側辺の延長線を横切ってボンディングパッドに望む第２
のリードとを有しており、第１のリードは半導体ペレッ
トの回路形成面に接着されるので、内部リードとパッケ
ージ形成樹脂との接着力を大幅に向上させることができ
る。
【００１１】〔参考例１〕図１は本発明の参考例１であ
る半導体装置を示す、図２におけるＩ−Ｉ断面図であ
り、図２は参考例１の半導体装置におけるペレットとリ
ードとの関係を示す平面図である。
【００１２】参考例１の半導体装置は、いわゆる樹脂封
止型半導体装置である。すなわち、搭載される半導体ペ
レット（以下、ペレットと言う。）１が、外部端子であ
るリード２の一部である内部リードとともにエポキシ樹
脂等のパッケージ３を形成する樹脂（以下、パッケージ
樹脂とも言う。）４内に埋設され、該リード２のパッケ
ージ外の外部リードはパッケージ３の側端近傍において
下方に折り曲げられてなるものである。
【００１３】ところで、通常樹脂封止型半導体装置にお
いては、ペレットは該ペレットと同程度の大きさの取付
基板であるタブに取り付けられ、そのペレットの電極で
あるボンディングパッドは、該タブの周囲に配列されて
いるリード内端部とワイヤを介して電気的に接続されて
いる。
【００１４】ところが、参考例１の半導体装置では、ペ
レット１が該ペレット１の裏面すなわち半導体集積回路
を形成していない面である非回路形成主面に沿って延在
されたリードに接続されているポリイミド樹脂からなる
絶縁シート５に、接着剤６を介して取り付けられてお
り、ペレット取付部としてのタブは存在しない。
【００１５】そして、前記ペレット１とリード２との位
置関係は、図２に示すように、ボンディングパッドが配
列形成されていないペレット辺（以下、ボンディングパ
ッド非形成辺ともいう。）の側方に外部リードが配列さ
れているリード２ａの内部リードが、ペレット１の非回
路形成主面に沿って延在され、その先端部２ｂがボンデ
ィングパッド７の配列形成されているペレット辺を越え
た位置まで延長されている。これらのリード２ａの上に
は、絶縁シート５が接着され、該絶縁シート５の上面に
ペレット１がその非回路形成主面を下にして取り付けら
れている。
【００１６】ところで、前記リード２ａが埋設されてい
る場所は、通常の樹脂封止型半導体装置にあっては、パ
ッケージ樹脂に埋設されているリード、すなわち内部リ
ードがパッケージ側端からタブ近傍までの極めて限られ
た長さしか確保できない、いわゆる短リードが設けられ
ている場所である。
【００１７】通常短リードは、そのパッケージ樹脂との
接着面積が小さいためその引張強度が弱く、パッケージ
から抜け易いという問題がある。これは、昨今のペレッ
トの大型化に伴い事態は深刻である。
【００１８】ところが、参考例１の半導体装置では、前
記短リードに相当する場所に設けられているリード２ａ
の内部リードは極めて長い形状であるため、パッケージ
樹脂４との接着強度は大幅に向上できるものである。そ
のため、大型ペレットを搭載している場合であっても、
外部リードの折曲成形時等に発生するリード界面におけ
る剥がれを有効に防止でき、半導体装置の耐湿性を向上
することができる。その上、前記リード２ａには絶縁シ
ート５が強固に接着されているため、該リード２ａは極
めて大きな引張強度を有している。
【００１９】また、リード２ａが絶縁シート５を介して
はいるが、ペレット１の非回路形成主面に取り付けられ
ているので、動作時にペレットに生じた熱を該リードを
通して直接パッケージ外へ放散させることが可能であ
る。
【００２０】さらに、ペレット１とリード２ａとの電気
的接続は、ボンディングパッド７ａとこれに近いペレッ
ト辺近傍に延在されている先端部２ｂとをワイヤボンデ
ィングすることにより達成されるため、ワイヤ８を短く
することができる。それ故、ワイヤショートの発生を防
止でき、またワイヤ８の使用量を削減できるのでコスト
低減をも達成できる。
【００２１】なお、参考例１の半導体装置は、所定のリ
ード形状のリードフレームを形成し、その内部リードの
所定部に絶縁シート５を接着し、該絶縁シート５にペレ
ット１を接着剤６を介して取り付け、次いで該ペレット
１のボンディングパッド７とリードのボンディング部と
のワイヤボンディングを行い、その後通常の樹脂封止型
半導体装置と同様の製造工程を経て容易に完成される。
なお、この場合、絶縁シート５はリードフレームを補強
する役割も果たしている。
【００２２】ところで、前記リードのボンディング部
は、リードの一部に、たとえば金を部分めっき法で被着
することによって形成することができる。
【００２３】図３には絶縁シート５が接着されたリード
フレームを、そのタイバー９の付近から内側における部
分平面図で示してある。参考例１の半導体装置の場合に
は、絶縁シート５自体がマスクとして機能するため、図
３において二点鎖線で示す開口部を有するマスクを用い
るだけで、リード２の先端部２ｂのみに選択的に部分め
っきを行うことができるため、ボンディング部を容易に
形成することができる。
【００２４】なお、図３においては、長さ方向にのみ隙
間ができるマスクを示してあるが、タイバー９の方向に
も隙間が生じる開口部のマスクを使用すれば、絶縁シー
ト５の四周囲のリードに容易に部分めっきをすることが
できる。このようにすると、ボンディングパッドがその
四周囲に形成されているペレットを搭載する半導体装置
をも容易に製造できる。
【００２５】〔参考例２〕図４は本発明の参考例２であ
る半導体装置におけるペレットとリードとの関係を示す
平面図である。
【００２６】参考例２の半導体装置は、前記参考例１の
半導体装置とほぼ同一のものである。しかし、絶縁シー
ト５が用いられていないこと、およびペレット１より小
さいタブ１０が存在することが異なっている。
【００２７】すなわち、参考例２の半導体装置は、ペレ
ットのボンディングパッド非形成辺の側方に外部リード
が配列されているリード２ａの内部リードおよびタブ
に、ペレット１が接着剤を介して取り付けられているも
のである。
【００２８】参考例２の場合は、絶縁シート５を間に介
在させていないため、ペレット１からの放熱が直接的で
あり、参考例１に比べて熱抵抗が一段と低く、それだけ
信頼性が高いものである。また、タブ１０が設けてある
ため、ペレット取付強度も確保されている。なお、図５
に図４のＶ−Ｖ切断面におけるペレット１とリード２の
先端部との電気的接続の状態を示す部分断面図を示す
が、リード２ａの先端部２ｂには凹部２ｃが形成されて
いる。
【００２９】すなわち、ペレット１を接着剤１１で取り
付ける際、該接着剤１１が流出してボンディング部１２
の表面を汚すために、ペレット１のボンディングパッド
７と該ボンディング部１２とをワイヤ８でボンディング
できなくなることがある。前記凹部２ｃは、このような
事態が発生することを未然に防止するため、流出する接
着剤１１のダムとして設けたものである。
【００３０】〔実施例〕図６は本発明による実施例であ
る半導体装置を示す断面図であり、図７はその半導体装
置におけるペレットとリードとの関係を示す平面図であ
る。
【００３１】本実施例の半導体装置は、前記参考例１ま
たは２と異なり、内部リードがペレットの回路形成面に
沿って延在されているものである。
【００３２】すなわち、図６に示すように、内部リード
の裏面に接着されたポリイミド樹脂からなる絶縁シート
５に、ペレット１をその回路形成面において接着剤６を
介して取り付けたものである。
【００３３】図７に示すように、ペレット１の回路形成
面に、ボンディングパッドに被らない大きさの絶縁シー
ト５が接着され、該絶縁シート５の上面にはペレットの
ボンディングパッド非形成辺の側方に外部リードを有す
るリード２ａの内部リードが延在されている。それぞれ
のリード２ａの内部リードは、その先端部をボンディン
グパッドの手前に位置させて、前記絶縁シート５ａに接
着されている。
【００３４】そして、図７に示すようにリードは、ペレ
ット１の一側辺１ａ，１ｂを横切ってボンディングパッ
ド７に望む複数のリード２ａと、その一側辺１ａ，１ｂ
の延長線を横切ってボンディングパッド７に望む複数の
リード２ｄとを有している。
【００３５】本実施例の半導体装置では、内部リードが
ペレット１の回路形成面に接着されているため、参考例
１の場合に比べより放熱性に優れている。
【００３６】また、絶縁シート５が耐α線性能に優れた
ポリイミド樹脂であり、それが回路形成面を覆っている
ため、α線に対する信頼性向上も達成されている。
【００３７】なお、本実施例の場合はリード２ａの先端
部がボンディングパッド７の内側に配置されているた
め、前記参考例１の場合とその位置関係が反対であり、
ボンディング方向も逆になっている。しかし、ボンディ
ング距離はほぼ同一である。
【００３８】〔効果〕本願において開示される発明のう
ち、代表的なものによって得られる効果を簡単に説明す
れば、以下の通りである。
【００３９】(1).樹脂封止型半導体装置において、搭載
されるペレットの回路形成面に複数の第１のリードを接
着することにより、この内部リードとパッケージ形成樹
脂との接着力を大幅に向上させることができるので、大
型ペレットを搭載する場合であっても、パッケージ形成
樹脂からのリードの抜けを防止できる。
【００４０】(2).前記(1) と同様の理由により、外部リ
ードの折曲成形時に、該リードとパッケージ形成樹脂と
の接着面に剥がれが発生することを防止できる。
【００４１】(3).前記(1) および(2) により、小型パッ
ケージに大型ペレットを搭載してなる半導体装置であっ
ても耐湿性に優れた信頼性の高い半導体装置を提供でき
る。
【００４２】(4).複数の第１のリードをペレットの回路
形成面に取り付けることにより、動作時に回路に発生し
た熱をリードを通して、より直接的かつ効率的に外部に
放散させることができる。
(5).ペレットの一側辺を横切ってボンディングパッドの
列に臨む第１のリードと、前記一側辺の延長線を横切っ
て前記列と同一の列に臨む第２のリードとを有するの
で、ボンディングパッドの間隔を狭くしてもリードの間
隔は狭くする必要はなく、半導体装置製造上有益であ
る。
【００４３】〔利用分野〕以上、本発明者によってなさ
れた発明を実施例に基づき具体的に説明したが、本発明
は前記実施例に限定されるものではなく、その要旨を逸
脱しない範囲で種々変更可能であることはいうまでもな
い。
【００４４】たとえば、実施例では全てペレットの第１
の主面に絶縁シートを用いて内部リードを取り付けたも
のを示したが、これに限るものではなく、全部または一
部の内部リードを回路形成面の近傍に延在させるもので
あってもよい。
【００４５】それに、実施例ではいわゆる短リードの位
置に相当するペレット側方のリードのみを延在させたも
のを示したが、これに限らず通常の半導体装置において
内部リードが長いリードについても延在させたものであ
ってもよい。また、絶縁シートはポリイミドに限るもの
でなく、シリコーンゴムであってもよく、放熱性を高め
るため接着剤または絶縁シートにシリコンカーバイド
（ＳｉＣ）粉末等の熱伝導性フィラーを含有させること
も当然にできる。
【００４６】以上の説明では主として本発明者によって
なされた発明をその背景となった利用分野である、いわ
ゆるＤＩＰ型半導体装置に適用した場合について説明し
たが、それに限定されるものではなく、たとえば、パッ
ケージが樹脂封止して形成されるものであれば、フラッ
トパッケージ等種々の形式のパッケージ構造の半導体装
置に適用して有効な技術である。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a technique effective when applied to electrical connection of pellets in a resin-sealed semiconductor device. 2. Description of the Related Art In a so-called resin-encapsulated semiconductor device, as the size of a pellet increases, the dimension between a package side end and a tab serving as a pellet mounting portion tends to be further reduced. This is due to the fact that although the size of the pellet is large, the size of the package for accommodating the pellet cannot be enlarged because the size of the package is standardized. As a result, of the leads which are external terminals,
In the case of so-called short leads, in which the length embedded in the resin forming the package is short due to its structure, the adhesive strength is further reduced, so that it is easy to fall out of the package, and the lead is peeled off when the lead is bent. Is likely to occur. [0004] Therefore, the present inventors have found that the reliability of a semiconductor device is liable to be lowered, such as poor electrical conduction or reduced moisture resistance. [0005] As for the resin-encapsulated semiconductor device,
Published by the Japan Industrial Research Association on January 15, 1980, edited by the Japan Microelectronics Association, "IC packaging technology" P
149-P150. An object of the present invention is to significantly increase the bonding strength between a resin and a lead of a resin-encapsulated semiconductor device, especially a semiconductor device on which a large pellet is mounted. It is to provide the technology which can do. [0007] The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings. [Summary of the Invention] Of the inventions disclosed in the present application, the outline of a representative one will be briefly described as follows. That is, a semiconductor device according to the present invention comprises a square semiconductor pellet having a circuit forming surface on which a semiconductor integrated circuit is formed and a non-circuit forming surface opposite thereto, and a row formed on the circuit forming surface. a plurality of bonding pads arranged Te, a plurality of first leads being adhesively bonded to the circuit forming surface faces the column of the bonding pad across one side of the semiconductor pellet,
A plurality of second leads crossing an extension of the one side of the semiconductor pellet and facing the same row as the row of the bonding pads; and respective internal lead portions of the first and second leads; The semiconductor device includes a plurality of bonding wires for connecting to a plurality of bonding pads, and a package resin portion for sealing the internal leads of the semiconductor pellet and the first and second plurality of leads. A method of manufacturing a semiconductor device according to the present invention is directed to a method of manufacturing a semiconductor device, comprising: a circuit forming surface on which a semiconductor integrated circuit is formed; and a non-circuit forming surface opposite to the circuit forming surface. Preparing a rectangular semiconductor pellet on which is disposed a plurality of first leads;
Lead frame having a lead and a plurality of second leads.
Providing a first lead and the semiconductor lead
The row of the bonding pads across one side of the
And the second lead is an extension of the one side.
Across the same row as the row of the bonding pads
Facing the first and second leads with the semiconductor
Adhering to the circuit forming surface of the pellet; electrically connecting the internal lead portions of the first and second leads to the plurality of bonding pads; Sealing the internal leads of each of the plurality of leads. [0010] Thus, the first lead crossing one side of the semiconductor pellet toward the bonding pad and the second lead crossing the extension of the one side to the bonding pad.
Since the first lead is bonded to the circuit forming surface of the semiconductor pellet, the adhesive force between the internal lead and the package forming resin can be greatly improved. FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention, taken along the line II in FIG. 2. FIG. It is a top view showing a relation. The semiconductor device of Reference Example 1 is a so-called resin-sealed type semiconductor device. In other words, a semiconductor pellet (hereinafter, referred to as a pellet) 1 to be mounted is a resin (hereinafter, also referred to as a package resin) such as an epoxy resin which forms a package 3 together with an internal lead which is a part of a lead 2 as an external terminal. 4), the external leads outside the package of the leads 2 are bent downward near the side ends of the package 3. In a resin-encapsulated semiconductor device, a pellet is usually mounted on a tab, which is a mounting substrate having a size similar to that of the pellet, and a bonding pad, which is an electrode of the pellet, is provided around the tab. It is electrically connected to the inner ends of the arranged leads via wires. However, in the semiconductor device of Reference Example 1, the pellet 1 is connected to the lead extending along the back surface of the pellet 1, that is, the non-circuit-forming main surface which is the surface on which the semiconductor integrated circuit is not formed. Is attached to the insulating sheet 5 made of polyimide resin via an adhesive 6, and there is no tab as a pellet attaching portion. As shown in FIG. 2, the positional relationship between the pellets 1 and the leads 2 is on the side of the pellet side where bonding pads are not arranged and formed (hereinafter also referred to as the side where no bonding pads are formed). The internal lead of the lead 2a on which the external lead is arranged extends along the non-circuit-forming main surface of the pellet 1 and its tip 2b extends to a position beyond the pellet side on which the bonding pad 7 is arranged and formed. Has been extended. An insulating sheet 5 is adhered on these leads 2a, and the pellet 1 is attached to the upper surface of the insulating sheet 5 with its non-circuit-forming main surface facing down. Incidentally, the place where the lead 2a is buried is, in a usual resin-sealed semiconductor device, the lead buried in the package resin, that is, the internal lead extends from the package side end to the vicinity of the tab. This is a place where so-called short leads are provided, which can secure only a very limited length. Normally, short leads have a problem that they have a small adhesive area with the package resin and thus have a low tensile strength and are easily detached from the package. This situation is serious with the recent increase in size of pellets. However, in the semiconductor device of Reference Example 1, the leads 2a provided at locations corresponding to the short leads are used.
Since the internal lead has an extremely long shape, the bonding strength with the package resin 4 can be greatly improved. Therefore, even when large pellets are mounted,
It is possible to effectively prevent peeling at the lead interface which occurs at the time of bending and forming an external lead, thereby improving the moisture resistance of the semiconductor device. In addition, since the insulating sheet 5 is firmly adhered to the lead 2a, the lead 2a has an extremely large tensile strength. Although the leads 2a are interposed through the insulating sheet 5, they are attached to the non-circuit-forming main surface of the pellet 1, so that the heat generated in the pellet during operation is dissipated directly to the outside of the package through the leads. It is possible. Further, the electrical connection between the pellet 1 and the lead 2a is achieved by wire bonding between the bonding pad 7a and the tip 2b extending near the pellet side close to the bonding pad 7a. Can be shortened. Therefore, it is possible to prevent the occurrence of the short circuit of the wire, and to reduce the amount of the wire 8 to be used. In the semiconductor device of Reference Example 1, a lead frame having a predetermined lead shape is formed, an insulating sheet 5 is bonded to a predetermined portion of the internal lead, and a pellet 1 is bonded to the insulating sheet 5 with an adhesive 6. Then, wire bonding is performed between the bonding pad 7 of the pellet 1 and the bonding portion of the lead, and thereafter the semiconductor device is easily completed through the same manufacturing process as a normal resin-encapsulated semiconductor device.
In this case, the insulating sheet 5 also plays a role of reinforcing the lead frame. Incidentally, the bonding portion of the lead can be formed by depositing, for example, gold on a part of the lead by a partial plating method. FIG. 3 shows a partial plan view of the lead frame to which the insulating sheet 5 is adhered from the vicinity of the tie bar 9 to the inside thereof. In the case of the semiconductor device of Reference Example 1, since the insulating sheet 5 itself functions as a mask, only a mask having an opening indicated by a two-dot chain line in FIG. Since the partial plating can be performed, the bonding portion can be easily formed. Although FIG. 3 shows a mask in which a gap is formed only in the length direction, a mask having an opening in which a gap is formed in the direction of the tie bar 9 can be used. The leads can be easily partially plated. This makes it easy to manufacture a semiconductor device on which a pellet having bonding pads formed around the four sides thereof is mounted. [Embodiment 2] FIG. 4 is a plan view showing a relationship between a pellet and a lead in a semiconductor device according to Embodiment 2 of the present invention. The semiconductor device of Reference Example 2 is substantially the same as the semiconductor device of Reference Example 1. However, the difference is that the insulating sheet 5 is not used and the tab 10 smaller than the pellet 1 exists. That is, in the semiconductor device of Reference Example 2, the pellet 1 is attached via an adhesive to the internal lead and the tab of the lead 2a in which the external lead is arranged on the side of the pellet where no bonding pad is formed. Is what it is. In the case of the reference example 2, since the insulating sheet 5 is not interposed therebetween, the heat radiation from the pellet 1 is direct, the thermal resistance is much lower than that of the reference example 1, and the reliability is higher accordingly. Things. Further, since the tab 10 is provided, the pellet mounting strength is also ensured. FIG.
FIG. 4 is a partial cross-sectional view showing a state of electrical connection between the pellet 1 and the tip of the lead 2 on the VV cross section in FIG. 4, and a recess 2c is formed in the tip 2b of the lead 2a. That is, when the pellet 1 is attached with the adhesive 11, the adhesive 11 flows out and the bonding portion 12
In some cases, the bonding pad 7 of the pellet 1 and the bonding portion 12 cannot be bonded with the wire 8 because the surface of the bonding pad 7 is soiled. The concave portion 2c is provided as a dam for the adhesive 11 flowing out in order to prevent such a situation from occurring. FIG. 6 is a sectional view showing a semiconductor device according to an embodiment of the present invention, and FIG. 7 is a plan view showing a relationship between a pellet and a lead in the semiconductor device. The semiconductor device of this embodiment differs from the first or second embodiment in that the internal leads extend along the circuit forming surface of the pellet. That is, as shown in FIG. 6, the pellet 1 is attached to the insulating sheet 5 made of a polyimide resin adhered to the back surface of the internal lead via the adhesive 6 on the circuit forming surface. As shown in FIG. 7, an insulating sheet 5 having a size that does not cover the bonding pads is bonded to the circuit forming surface of the pellet 1 and the upper surface of the insulating sheet 5 is formed on the side of the pellet where no bonding pad is formed. The internal lead of the lead 2a having the external lead on the side extends. The internal leads of each of the leads 2a are bonded to the insulating sheet 5a such that the tips thereof are located in front of the bonding pads. Then, as shown in FIG. 7, the leads are a plurality of leads 2a crossing one side 1a, 1b of the pellet 1 and desired from the bonding pad 7, and the one sides 1a, 1b.
And a plurality of leads 2d that are desired for the bonding pad 7 across the extension of. In the semiconductor device of this embodiment, since the internal leads are adhered to the surface of the pellet 1 on which the circuit is formed, the heat dissipation is better than that of the first embodiment. Further, since the insulating sheet 5 is a polyimide resin having excellent α-ray resistance and covers the circuit forming surface, the improvement of the reliability for α-rays is achieved. In this embodiment, since the tip of the lead 2a is located inside the bonding pad 7, the positional relationship is opposite to that of the first embodiment.
The bonding direction is also reversed. However, the bonding distances are almost the same. [Effects] Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows. (1) In a resin-encapsulated semiconductor device, a plurality of first leads are adhered to a circuit forming surface of a pellet to be mounted, so that the adhesive force between the internal leads and the package forming resin is greatly increased. As a result, even when a large pellet is mounted, the lead can be prevented from coming off from the package forming resin. (2) For the same reason as in the above (1), it is possible to prevent the peeling of the bonding surface between the external lead and the package-forming resin during the bending of the external lead. (3) According to the above (1) and (2), a highly reliable semiconductor device excellent in moisture resistance can be provided even in a semiconductor device in which a large pellet is mounted in a small package. (4) By attaching a plurality of first leads to the circuit forming surface of the pellet, heat generated in the circuit during operation can be dissipated more directly and efficiently to the outside through the leads. (5) Since it has a first lead crossing one side of the pellet and facing the row of bonding pads, and a second lead crossing the extension of the one side and facing the same row as the row. Even if the spacing between the bonding pads is reduced, the spacing between the leads does not need to be reduced, which is advantageous in manufacturing a semiconductor device. Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above-described embodiments, and various modifications may be made without departing from the scope of the invention. Needless to say, it can be changed. For example, in the embodiment, the first
Although the inner lead is attached to the main surface using an insulating sheet, the present invention is not limited to this, and all or a part of the inner lead may be extended near the circuit forming surface. . In the embodiment, only the lead on the side of the pellet corresponding to the position of the so-called short lead is shown. However, the present invention is not limited to this. May be used. Further, the insulating sheet is not limited to polyimide, but may be silicone rubber. In order to enhance heat dissipation, an adhesive or an insulating sheet may contain a thermally conductive filler such as silicon carbide (SiC) powder. it can. In the above description, the case where the invention made by the inventor is mainly applied to a so-called DIP type semiconductor device, which is a field of application, has been described. However, the present invention is not limited to this. If the package is formed by resin sealing, it is an effective technique applicable to semiconductor devices having various types of package structures such as a flat package.
【図面の簡単な説明】
【図１】本発明の参考例１である半導体装置を示し、図
２におけるＩ−Ｉ線に沿う断面図である。
【図２】参考例１の半導体装置のペレットとリードとの
関係を示す平面図である。
【図３】参考例１の半導体装置に適用されるリードフレ
ームをめっき工程における状態で示す部分平面図であ
る。
【図４】本発明の参考例２である半導体装置におけるペ
レットとリードとの関係を示す平面図である。
【図５】参考例２の半導体装置の内部構造を示し、図４
におけるＶ−Ｖ線に沿う断面図である。
【図６】本発明による実施例である半導体装置を示し、
図７におけるVI−VI線に沿う断面図である。
【図７】本実施例の半導体装置のペレットとリードとの
関係を示す平面図である。
【符号の説明】
１ 半導体ペレット
２ リード
２ａ リード（第１のリード）
２ｂ 先端部
２ｃ 凹部
２ｄ リード（第２のリード）
３ パッケージ
４ 樹脂
５ 絶縁シート
６ 接着剤
７ ボンディングパッド
８ ワイヤ
９ タイバー
１０ タブ
１１ 接着剤
１２ ボンディング部BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention, taken along line II in FIG. 2; FIG. 2 is a plan view showing a relationship between a pellet and a lead of the semiconductor device of Reference Example 1. FIG. 3 is a partial plan view showing a lead frame applied to the semiconductor device of Reference Example 1 in a plating step. FIG. 4 is a plan view showing a relationship between a pellet and a lead in a semiconductor device which is Embodiment 2 of the present invention. 5 shows the internal structure of the semiconductor device of Reference Example 2, and FIG.
5 is a sectional view taken along line VV in FIG. FIG. 6 shows a semiconductor device according to an embodiment of the present invention;
FIG. 8 is a sectional view taken along line VI-VI in FIG. 7. FIG. 7 is a plan view illustrating a relationship between a pellet and a lead of the semiconductor device of the present embodiment. [Description of Signs] 1 semiconductor pellet 2 lead 2a lead (first lead) 2b tip 2c recess 2d lead (second lead) 3 package 4 resin 5 insulating sheet 6 adhesive 7 bonding pad 8 wire 9 tie bar 10 tab 11 adhesive 12 bonding part
───────────────────────────────────────────────────── フロントページの続き (72)発明者 舘 宏 東京都小平市上水本町５丁目20番１号 日立超エル・エス・アイ・エンジニアリ ング株式会社内 (72)発明者 尾崎 弘 東京都小平市上水本町５丁目20番１号 日立超エル・エス・アイ・エンジニアリ ング株式会社内 (72)発明者 大塚 寛治 東京都小平市上水本町1450番地 株式会 社日立製作所 デバイス開発センタ内 (72)発明者 古川 道明 東京都小平市上水本町1450番地 株式会 社日立製作所 デバイス開発センタ内 (72)発明者 山崎 康行 東京都小平市上水本町1450番地 株式会 社日立製作所 デバイス開発センタ内 ────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Hiroshi Tachi 5-20-1, Josuihoncho, Kodaira-shi, Tokyo Hitachi Cho S.S.E.Engineering Co., Ltd. (72) Inventor Hiroshi Ozaki 5-20-1, Josuihoncho, Kodaira-shi, Tokyo Hitachi Cho S.S.E.Engineering Co., Ltd. (72) Inventor Hiroharu Otsuka 1450 Josui Honcho, Kodaira City, Tokyo Stock Association Hitachi, Ltd. Device Development Center (72) Inventor Michiaki Furukawa 1450 Josui Honcho, Kodaira City, Tokyo Stock Association Hitachi, Ltd. Device Development Center (72) Inventor Yasuyuki Yamazaki 1450 Josui Honcho, Kodaira City, Tokyo Stock Association Hitachi, Ltd. Device Development Center
Claims (1)
に対して反対側の非回路形成面を有する四角形の半導体
ペレットと、 前記回路形成面に列となって配置された複数のボンディ
ングパッドと、 前記半導体ペレットの一側辺を横切って前記ボンディン
グパッドの前記列に臨み前記回路形成面に接着剤により
接着される複数の第１のリードと、 前記半導体ペレットの前記一側辺の延長線を横切って前
記ボンディングパッドの前記列と同一の列に臨む複数の
第２のリードと、 前記第１および第２のリードのそれぞれの内部リード部
と前記複数のボンディングパッドとを接続する複数のボ
ンディングワイヤと、 前記半導体ペレット、前記第１および第２の複数のリー
ドそれぞれの内部リード部を封止するパッケージ樹脂部
とを有することを特徴とする半導体装置。 ２．特許請求の範囲第１項記載の半導体装置であって、
前記パッケージ樹脂部が長方形となっており、前記パッ
ケージの長辺から前記第１と第２のリードが突出してい
ることを特徴とする半導体装置。 ３．半導体集積回路が形成された回路形成面およびこれ
に対して反対側の非回路形成面を有し、かつ前記回路形
成面に列となって複数のボンディングパッドが配置され
た四角形の半導体ペレットを準備する工程と、複数の第１のリードおよび複数の第２のリードを有する
リードフレームを準備する工程と、 前記第１のリードが前記半導体ペレットの一側辺を横切
って前記ボンディングパッドの前記列に望み、さらに前
記第２のリードが前記一側辺の延長線を横切り前記ボン
ディングパッドの前記列と同一の列に臨むように、前記
第１および第２のリードを前記半導体ペレットの回路形
成面に接着する工程と 、 前記第１および第２のリードのそれぞれの内部リード部
と前記複数のボンディングパッドとを電気的に接続する
工程と、 前記半導体ペレット、前記第１および第２の複数のリー
ドそれぞれの内部リード部を封止する工程とを有するこ
とを特徴とする半導体装置の製造方法。(57) [Claims] A square semiconductor pellet having a circuit forming surface on which a semiconductor integrated circuit is formed and a non-circuit forming surface opposite thereto, a plurality of bonding pads arranged in rows on the circuit forming surface, and the semiconductor a plurality of first lead across one side of the pellet is bonded by an adhesive to the circuit formation surface faces the column of the bonding pad, wherein across an extension line of said one side of said semiconductor pellet A plurality of second leads facing the same row as the row of bonding pads; a plurality of bonding wires connecting respective internal lead portions of the first and second leads to the plurality of bonding pads; A semiconductor resin, and a package resin portion for sealing an internal lead portion of each of the first and second plurality of leads. That the semiconductor device. 2. The semiconductor device according to claim 1, wherein:
A semiconductor device, wherein the package resin portion has a rectangular shape, and the first and second leads protrude from a long side of the package. 3. A square semiconductor pellet having a circuit forming surface on which a semiconductor integrated circuit is formed and a non-circuit forming surface opposite thereto and having a plurality of bonding pads arranged in rows on the circuit forming surface is prepared. Having a plurality of first leads and a plurality of second leads
Providing a lead frame, wherein the first lead traverses one side of the semiconductor pellet;
In the row of the bonding pads
A second lead traversing an extension of the one side, and
So as to face the same row as the row of padding pads.
The first and second leads are formed in a circuit shape of the semiconductor pellet.
Bonding the first and second leads to the plurality of bonding pads; and bonding the semiconductor pellet to the first and second leads. Sealing the internal lead portion of each of the leads.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7342374A JP2756436B2 (en) | 1995-12-28 | 1995-12-28 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7342374A JP2756436B2 (en) | 1995-12-28 | 1995-12-28 | Semiconductor device and manufacturing method thereof |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5840785A Division JPH06105721B2 (en) | 1985-03-25 | 1985-03-25 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08227903A JPH08227903A (en) | 1996-09-03 |
| JP2756436B2 true JP2756436B2 (en) | 1998-05-25 |
Family
ID=18353241
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7342374A Expired - Lifetime JP2756436B2 (en) | 1995-12-28 | 1995-12-28 | Semiconductor device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2756436B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007129182A (en) | 2005-05-11 | 2007-05-24 | Toshiba Corp | Semiconductor device |
| JP4970401B2 (en) * | 2007-10-16 | 2012-07-04 | 株式会社東芝 | Semiconductor device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5240062A (en) * | 1975-09-26 | 1977-03-28 | Hitachi Ltd | Process for production of semiconductor devices |
| JPS53105970A (en) * | 1977-02-28 | 1978-09-14 | Hitachi Ltd | Assembling method for semiconductor device |
| JPS5992556A (en) * | 1982-11-19 | 1984-05-28 | Hitachi Ltd | Semiconductor device |
-
1995
- 1995-12-28 JP JP7342374A patent/JP2756436B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5240062A (en) * | 1975-09-26 | 1977-03-28 | Hitachi Ltd | Process for production of semiconductor devices |
| JPS53105970A (en) * | 1977-02-28 | 1978-09-14 | Hitachi Ltd | Assembling method for semiconductor device |
| JPS5992556A (en) * | 1982-11-19 | 1984-05-28 | Hitachi Ltd | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08227903A (en) | 1996-09-03 |
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