JP2905609B2 - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JP2905609B2
JP2905609B2 JP3683291A JP3683291A JP2905609B2 JP 2905609 B2 JP2905609 B2 JP 2905609B2 JP 3683291 A JP3683291 A JP 3683291A JP 3683291 A JP3683291 A JP 3683291A JP 2905609 B2 JP2905609 B2 JP 2905609B2
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
chip
sealed
sealed semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP3683291A
Other languages
Japanese (ja)
Other versions
JPH04249353A (en
Inventor
健一 日下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3683291A priority Critical patent/JP2905609B2/en
Publication of JPH04249353A publication Critical patent/JPH04249353A/en
Application granted granted Critical
Publication of JP2905609B2 publication Critical patent/JP2905609B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、樹脂封止型半導体装置
に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device.

【0002】[0002]

【従来の技術】図4は従来の樹脂封止型半導体装置を示
す平面図、図5は図4のAーA線断面図である。図にお
いて、1は半導体集積回路(以下ICと称する)チッ
プ、2はこのICチップ1を搭載するアイランド、3は
アイランド2を囲むように配置されたインナーリード、
4はアウターリード、5は金属細線、6はモールド樹脂
である。
2. Description of the Related Art FIG. 4 is a plan view showing a conventional resin-encapsulated semiconductor device, and FIG. 5 is a sectional view taken along line AA of FIG. In the figure, 1 is a semiconductor integrated circuit (hereinafter referred to as IC) chip, 2 is an island on which this IC chip 1 is mounted, 3 is an inner lead arranged so as to surround the island 2,
4 is an outer lead, 5 is a thin metal wire, and 6 is a mold resin.

【0003】かかる半導体装置の組立てに際しては、ま
ずICチップ1をフレームのアイランド2に接着剤で固
定し、ICチップ1とインナーリード3の間を金属細線
5で電気的に接合し、次にモールド樹脂6で封止する。
その後、アウターリード4をメッキし、さらにリードカ
ット、ベンドを行う。
When assembling such a semiconductor device, first, the IC chip 1 is fixed to the island 2 of the frame with an adhesive, and the IC chip 1 and the inner leads 3 are electrically connected to each other with the thin metal wires 5. Seal with resin 6.
Thereafter, the outer leads 4 are plated, and lead cutting and bending are performed.

【0004】[0004]

【発明が解決しようとする課題】上記のような従来の樹
脂封止型半導体装置では、ICチップとの膨張率をあわ
せる為、リードフレーム材料が鉄系となり、封止樹脂と
共にその熱伝導率が低く、パッケージ全体に熱が拡がら
ず、放熱性が悪かった。
In the conventional resin-encapsulated semiconductor device as described above, in order to match the expansion coefficient with the IC chip, the lead frame material is made of an iron-based material, and the thermal conductivity of the lead frame material together with the encapsulating resin is reduced. Low, the heat did not spread to the entire package, and the heat dissipation was poor.

【0005】さらに放熱性を改善する為に、高熱伝導材
である銅等のヒートスプレッダーを下面に貼り付ける場
合でも、膨張率の関係から、フレーム材をヒートスプレ
ッダーにあわさねばならなかった。
In order to further improve the heat dissipation, even when a heat spreader such as copper, which is a high heat conductive material, is attached to the lower surface, the frame material has to be attached to the heat spreader due to the expansion coefficient.

【0006】この発明は上記のような問題点を解決する
ためになされたもので、パッケージの熱抵抗を小さくす
ると共に、インナーリード材とヒートスプレッダー材の
熱膨張率が違っていても不具合が生じない樹脂封止型半
導体装置を得ることを目的とする。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is possible to reduce the thermal resistance of a package and to cause a problem even if the thermal expansion coefficients of an inner lead material and a heat spreader material are different. It is an object to obtain a resin-encapsulated semiconductor device that does not have any.

【0007】[0007]

【課題を解決するための手段】この発明に係る樹脂封止
型半導体装置は、信号用のリードフレーム材の上下両側
を絶縁層を介して高熱伝導性の金属板ではさむようにす
ると共に、この金属板は、パッケージ全体に拡がる様に
し、又リードフレームとは絶縁層を介して接している
が、接着剤で固着はしておらず、上下の金属板同士が直
接接着する様にしている。
A resin-encapsulated semiconductor device according to the present invention is arranged such that both upper and lower sides of a signal lead frame material are sandwiched between highly heat conductive metal plates via an insulating layer. The plate is spread over the entire package, and is in contact with the lead frame via an insulating layer, but is not fixed with an adhesive, and the upper and lower metal plates are directly bonded to each other.

【0008】[0008]

【作用】この発明における高熱伝導性の金属板は、パッ
ケージ全体に拡がるように配置されてあるため、熱抵抗
が小さくなり、放熱性が良好となる。更に、金属板はリ
ードフレーム材には直接に固着されていない為、ヒート
スプレッダーとフレーム材料の熱膨張率が違っていても
熱変形等を起こさずにすむ。
The metal plate having high thermal conductivity according to the present invention is arranged so as to spread over the entire package, so that the heat resistance is reduced and the heat dissipation is improved. Furthermore, since the metal plate is not directly fixed to the lead frame material, even if the heat spreader and the frame material have different coefficients of thermal expansion, there is no need to cause thermal deformation or the like.

【0009】[0009]

【実施例】以下、この発明の実施例を図について説明す
る。図1は本発明の実施例による樹脂封止型半導体装置
を示す平面図、図2は図1のBーB線断面図、図3は図
1のCーC線断面図であり、図において、1〜6は従来
装置と同一部分を示すものとする。7はパッケージ内部
全体に拡がるように設けられた高熱伝導体でできた金属
板(ヒートスプレッダー)であり、8はインナーリード
3とヒートスプレッダー7を電気的に絶縁するための絶
縁層、9はこの絶縁層8をヒートスプレッダー7に固着
する接着剤、10は上側と下側の高熱伝導材を接続する
接着剤で、インナーリード3とは接着されないようにし
ている。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIG. 1 is a plan view showing a resin-sealed semiconductor device according to an embodiment of the present invention, FIG. 2 is a sectional view taken along line BB of FIG. 1, and FIG. 3 is a sectional view taken along line CC of FIG. , 1 to 6 indicate the same parts as the conventional device. Reference numeral 7 denotes a metal plate (heat spreader) made of a high thermal conductor provided so as to spread throughout the inside of the package. Reference numeral 8 denotes an insulating layer for electrically insulating the inner leads 3 from the heat spreader 7; An adhesive 10 for fixing the insulating layer 8 to the heat spreader 7 is an adhesive for connecting the upper and lower high heat conductive materials so as not to adhere to the inner leads 3.

【0010】上記のように構成された樹脂封止型半導体
装置の組立てに際しては、フレーム及び高熱伝導性の金
属板7は予め従来通りエッチングあるいはパンチング等
で形成される。次に金属板7に絶縁層8を貼り付け、更
にフレームをはさみこむ様にして、金属板7を接続し、
一体のフレームとして完成させる。
When assembling the resin-encapsulated semiconductor device having the above-described structure, the frame and the metal plate 7 having high thermal conductivity are formed in advance by etching or punching as in the prior art. Next, the insulating layer 8 is attached to the metal plate 7, and further, the frame is sandwiched therebetween so that the metal plate 7 is connected.
Complete as an integral frame.

【0011】[0011]

【発明の効果】以上のようにこの発明によれば、ヒート
スプレッダーの役割を果す様に高熱伝導性の金属板がパ
ッケージ全体に拡がっている為、熱抵抗が小さく、放熱
性が良好となる。又ヒートスプレッダーはインナーリー
ドと直接に固着されていない為、ヒートスプレッダーと
インナーリード材の熱膨張率が異なっていても、フレー
ム変形等の問題が起きない。
As described above, according to the present invention, since the metal plate having high thermal conductivity is spread over the entire package so as to serve as a heat spreader, the heat resistance is small and the heat radiation is good. Further, since the heat spreader is not directly fixed to the inner lead, even if the heat spreader and the inner lead material have different coefficients of thermal expansion, problems such as frame deformation do not occur.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の一実施例による樹脂封止型半導体装
置を示す平面図である。
FIG. 1 is a plan view showing a resin-sealed semiconductor device according to one embodiment of the present invention.

【図2】図1のBーB線断面図である。FIG. 2 is a sectional view taken along line BB of FIG.

【図3】図1のCーC線断面図である。FIG. 3 is a sectional view taken along line CC of FIG. 1;

【図4】従来の樹脂封止型半導体装置を示す平面図であ
る。
FIG. 4 is a plan view showing a conventional resin-encapsulated semiconductor device.

【図5】図4のAーA線断面図である。FIG. 5 is a sectional view taken along line AA of FIG. 4;

【符号の説明】[Explanation of symbols]

1 ICチップ 2 アイランド 3 インナーリード 4 アウターリード 5 金属細線 6 モールド樹脂 7 ヒートスブレッダー 8 絶縁層 9 接着剤 10 接着剤 DESCRIPTION OF SYMBOLS 1 IC chip 2 Island 3 Inner lead 4 Outer lead 5 Fine metal wire 6 Mold resin 7 Heat spreader 8 Insulating layer 9 Adhesive 10 Adhesive

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 アイランド上にICチップを搭載し、I
Cチップとリードフレームを金属細線で接合すると共
に、モールド樹脂で樹脂封止してなる樹脂封止型半導体
装置において、モールド樹脂で樹脂封止される領域内
で、リードフレームの上下両側を、パッケージを構成す
るICチップ,金属細線,インナーリードを囲繞して、
全体に拡がる高熱伝導性の金属板で、絶縁層を介し固着
せずに挾み込んだことを特徴とする樹脂封止型半導体装
置。
An IC chip is mounted on an island.
In a resin-sealed semiconductor device in which a C chip and a lead frame are joined by a thin metal wire and resin-sealed with a mold resin, an area within the resin-sealed area with the mold resin
The package on both the top and bottom sides of the lead frame .
Around the IC chip, metal wires, and inner leads
A resin-encapsulated semiconductor device characterized by being sandwiched by a high thermal conductive metal plate that spreads over the entire surface without being fixed via an insulating layer.
JP3683291A 1991-02-05 1991-02-05 Resin-sealed semiconductor device Expired - Fee Related JP2905609B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3683291A JP2905609B2 (en) 1991-02-05 1991-02-05 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3683291A JP2905609B2 (en) 1991-02-05 1991-02-05 Resin-sealed semiconductor device

Publications (2)

Publication Number Publication Date
JPH04249353A JPH04249353A (en) 1992-09-04
JP2905609B2 true JP2905609B2 (en) 1999-06-14

Family

ID=12480721

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3683291A Expired - Fee Related JP2905609B2 (en) 1991-02-05 1991-02-05 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JP2905609B2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2551349B2 (en) * 1993-08-25 1996-11-06 日本電気株式会社 Resin-sealed semiconductor device
JP2000091485A (en) 1998-07-14 2000-03-31 Denso Corp Semiconductor device
US6072240A (en) 1998-10-16 2000-06-06 Denso Corporation Semiconductor chip package
JP4085536B2 (en) 1998-11-09 2008-05-14 株式会社日本自動車部品総合研究所 ELECTRIC DEVICE, ITS MANUFACTURING METHOD, AND PRESSURE SEMICONDUCTOR DEVICE
US6693350B2 (en) 1999-11-24 2004-02-17 Denso Corporation Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
US6703707B1 (en) 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
JP4479121B2 (en) 2001-04-25 2010-06-09 株式会社デンソー Manufacturing method of semiconductor device
JP4688647B2 (en) * 2005-11-21 2011-05-25 パナソニック株式会社 Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
JPH04249353A (en) 1992-09-04

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