JPH0632384B2 - Method for manufacturing laminated ceramic substrate - Google Patents

Method for manufacturing laminated ceramic substrate

Info

Publication number
JPH0632384B2
JPH0632384B2 JP62324955A JP32495587A JPH0632384B2 JP H0632384 B2 JPH0632384 B2 JP H0632384B2 JP 62324955 A JP62324955 A JP 62324955A JP 32495587 A JP32495587 A JP 32495587A JP H0632384 B2 JPH0632384 B2 JP H0632384B2
Authority
JP
Japan
Prior art keywords
dielectric constant
dielectric
ceramic substrate
temperature
high dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62324955A
Other languages
Japanese (ja)
Other versions
JPH01166599A (en
Inventor
信介 矢野
博文 砂原
俊夫 野々村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel and Sumikin Electronics Devices Inc
Original Assignee
Sumitomo Metal Ceramics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Ceramics Inc filed Critical Sumitomo Metal Ceramics Inc
Priority to JP62324955A priority Critical patent/JPH0632384B2/en
Publication of JPH01166599A publication Critical patent/JPH01166599A/en
Publication of JPH0632384B2 publication Critical patent/JPH0632384B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Description

【発明の詳細な説明】 イ.発明の目的 産業上の利用分野 本発明は誘電率の高い誘電体材料を内蔵したコンデンサ
を有する低温焼成の積層セラミック基板の製造方法に係
り、より詳細には、該積層セラミック基板を形成する誘
電体層と低誘電率絶縁層とを同時焼成する際の該両層の
相互拡散による誘電率材料の誘電率の低下を防止し、大
容量の内蔵コンデンサを得ることができる積層セラミッ
ク基板の製造方法に関する。
Detailed Description of the Invention a. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a low temperature fired laminated ceramic substrate having a capacitor containing a dielectric material having a high dielectric constant, and more particularly to a dielectric for forming the laminated ceramic substrate. TECHNICAL FIELD The present invention relates to a method for manufacturing a laminated ceramic substrate capable of preventing a decrease in the permittivity of a permittivity material due to mutual diffusion of both layers when a layer and a low-dielectric-constant insulating layer are simultaneously fired and obtaining a large-capacity embedded capacitor. .

従来の技術 電気回路基板としてセラミックを多層化しその各層に導
体配線を、又各層を接続するスルーホールやビヤホール
を有する多層回路セラミック基板が使用されている。こ
の回路基板においては、コンデンサ部品は通常チップコ
ンデンサと呼ばれるコンデンサ素子を回路基板の表面に
はんだ付けされ使用される。しかしながら、回路基板の
表面は限られたものであり、表面には半導体素子、抵抗
素子や表面配線導体もあるので、基板が大きくなってし
まう。これらの素子を内蔵できれば、基板は小型化で
き,又高集積化できる。そこで内部に高い誘電率を有す
る誘電体層を使用した高容量コンデンサを内蔵化した積
層基板が報告されている。この場合誘電体層以外の絶縁
体層には誘電率が15以下の低誘電率材料が使用される。
そうしないとクローストークの問題や信号分配部分の信
号の伝播遅延の問題が生ずる為である。
2. Description of the Related Art As an electric circuit board, a multilayer circuit ceramic board is used in which ceramics are multi-layered and conductor wiring is provided in each layer, and through holes and via holes for connecting each layer are provided. In this circuit board, the capacitor component is usually used by soldering a capacitor element called a chip capacitor on the surface of the circuit board. However, the surface of the circuit board is limited, and there are also semiconductor elements, resistance elements, and surface wiring conductors on the surface, which makes the board large. If these elements can be built in, the substrate can be downsized and highly integrated. Therefore, a laminated substrate in which a high-capacity capacitor using a dielectric layer having a high dielectric constant is incorporated is reported. In this case, a low dielectric constant material having a dielectric constant of 15 or less is used for the insulating layers other than the dielectric layer.
Otherwise, the problem of crosstalk and the problem of signal propagation delay in the signal distribution part will occur.

発明が解決しようとする問題点 これ等の基板の誘電体材料としては一般に鉛を含むペロ
ブスカイト構造の材料を使用するが焼成後、内蔵誘電体
材料の誘電率が内蔵化しないで誘電体単独で焼成した場
合よりかなり小さくなってしまう問題があった。これは
同時焼成する際に、誘電体材料中に絶縁材料の成分が拡
散したり、又逆に誘電体材料の成分が絶縁材料中に拡散
する為であるが、さらに焼成過程で誘電体材料に液相が
生ずるのでその拡散が加速されてしまうからである。例
えば米国特許第4,567,542 によれば上記のような絶縁材
料に内蔵された誘電体材料は最も大きもので3,000 程度
であり、これは内蔵せずに誘電体のみで焼成した場合に
得られる10,000〜20,000に比較するとかなり小さくなっ
ていることがわかる。
Problems to be Solved by the Invention Generally, a material having a perovskite structure containing lead is used as a dielectric material for these substrates, but after firing, the dielectric constant of the built-in dielectric material does not become built-in and the dielectric alone is fired. There was a problem that it would be much smaller than if you did. This is because the component of the insulating material diffuses into the dielectric material at the time of co-firing, and vice versa, the component of the dielectric material diffuses into the insulating material. This is because a liquid phase is generated and its diffusion is accelerated. For example, according to U.S. Pat.No. 4,567,542, the dielectric material embedded in the above-mentioned insulating material is about 3,000 at the maximum, which is 10,000 to 20,000 obtained when firing only the dielectric material without incorporating it. You can see that it is much smaller than

ところで、このような問題を解決する方法として、近
年、次のような積層セラミック基板(部品)またはその
製造方法が提案されている。
By the way, in recent years, as a method for solving such a problem, the following laminated ceramic substrate (component) or its manufacturing method has been proposed.

ビアホールを有し、高誘電率材料で形成した高誘電
体層と、表面に電極を有する低誘電率材料で形成された
低誘電体層との間に、耐熱性金属酸化物薄膜層が介挿さ
れた構成(特開昭60−89995号公報参照)。
A heat resistant metal oxide thin film layer is interposed between a high dielectric layer having a via hole and formed of a high dielectric constant material and a low dielectric layer formed of a low dielectric constant material having an electrode on the surface. (See JP-A-60-89995).

誘電体生シートと、絶縁体生シート、および金属体
生シートを形成し、かつ該シート間を接続するスルーホ
ールを設けて積層圧着した後、焼成して製造する構成
(特開昭62−244631号公報参照)。
A structure in which a dielectric green sheet, an insulator green sheet, and a metal green sheet are formed, through holes for connecting the sheets are provided, laminated and pressure-bonded, and then baked to manufacture (Japanese Patent Laid-Open No. 62-244631). (See the official gazette).

800〜1500℃で焼成可能な2種類以上のセラ
ミック絶縁層を積層し、該セラミック絶縁層のうちの一
種類以上が高誘電率材料で形成されていて、かつコンデ
ンサとしての容量をとる電極を有し、他のセラミック絶
縁層との界面に焼成可能な柔らかい金属中間層を設けた
構成(特開昭62−265795号公報参照)。
Two or more kinds of ceramic insulating layers that can be fired at 800 to 1500 ° C. are laminated, one or more kinds of the ceramic insulating layers are formed of a high dielectric constant material, and an electrode that has a capacitance as a capacitor is provided. However, a soft metal intermediate layer that can be fired is provided at the interface with another ceramic insulating layer (see Japanese Patent Laid-Open No. 62-265795).

そして、これらの積層セラミック基板は、層間に耐熱性
金属酸化物薄膜層、金属体生シート、あるいは金属中間
層等のバリアー層を介挿し、該バリアー層により、積層
体を形成する誘電体層(絶縁体層)を同時焼成する際の
該材料の相互拡散による液相の移動を防止し、該材料の
誘電率が低下するのを防止している。
In these laminated ceramic substrates, a barrier layer such as a heat-resistant metal oxide thin film layer, a metal body raw sheet, or a metal intermediate layer is interposed between layers, and the barrier layer forms a dielectric layer ( The liquid phase is prevented from moving due to mutual diffusion of the material when the insulating layer) is co-fired, and the dielectric constant of the material is prevented from lowering.

しかし、この積層セラミック基板(部品)またはその製
造方法の場合、基板内部にバリアー層よりなる異種材料
が介挿されるので、大容量コンデンサを得るには、基板
自体の構造が厚くなるという課題がある。
However, in the case of this monolithic ceramic substrate (component) or its manufacturing method, since a dissimilar material composed of a barrier layer is inserted inside the substrate, there is a problem that the structure of the substrate itself becomes thick in order to obtain a large-capacity capacitor. .

本発明者は、このような課題に鑑み、種々、研究した結
果、次のことを究明した。すなわち、 バリアー層による場合は、焼成時に誘電体材料に液
相が生じることを前提とし、該液相の移動を防止するも
のである。
The present inventor has made the following discoveries as a result of various studies in view of such problems. That is, when the barrier layer is used, it is premised that a liquid phase is generated in the dielectric material at the time of firing, and the movement of the liquid phase is prevented.

昇温過程で、該液相が生じる場合は、吸熱ピークが
出て、また降温過程では、発熱ピークがでて、この吸熱
(発熱)ピーク温度は、DTA(示差熱分析)によって
確認できる。
When the liquid phase is generated in the temperature rising process, an endothermic peak appears, and in the temperature lowering process, an exothermic peak appears, and this endothermic (exothermic) peak temperature can be confirmed by DTA (differential thermal analysis).

液相は、誘電体材料の合成が十分に行えていない場
合に生じやすい。すなわち、一般に、誘電体材料は、焼
結に先だって、必要な各成分の原材料を混合・粉砕した
後、仮焼して合成するが、十分な合成ができないのが現
状である。
The liquid phase is likely to occur when the dielectric material is not sufficiently synthesized. That is, in general, a dielectric material is synthesized by mixing and pulverizing necessary raw materials of respective components prior to sintering and then calcining, but the present situation is that sufficient synthesis is not possible.

誘電体材料の焼成の際の誘電率の低下は、該誘電体
材料の成分の拡散により、該拡散は焼成時に誘電体材料
に生じる液相により加速される。
The decrease in the dielectric constant during firing of the dielectric material is accelerated by the diffusion of the components of the dielectric material, and the diffusion is accelerated by the liquid phase generated in the dielectric material during firing.

そこで、本発明者は、これらの点から、該液相の発生を
防止することが、最善の手段であるということを究明
し、その防止方法を種々、研究し、誘電体材料の仮焼成
温度を、液相の発生を確認できる上記吸熱ピーク温度と
の関係で、所定温度以上の温度とすることで、該液相の
発生を防止できることを究明した。
Therefore, from these points, the present inventor has clarified that preventing the generation of the liquid phase is the best means, researching various methods for preventing the same, and preliminarily firing temperature of the dielectric material. It was clarified that the occurrence of the liquid phase can be prevented by setting the temperature above a predetermined temperature in relation to the above endothermic peak temperature at which the generation of the liquid phase can be confirmed.

本発明は、このような究明点に着目して創作した方法で
あって、その目的とする処は、積層セラミック基板を形
成する誘電体層と低誘電率絶縁層とを同時焼成する際の
該両層の相互拡散による液相の生じるのを防止すること
で、誘電率材料の誘電率の低下を防止し、大容量の内蔵
コンデンサを得ることができる積層セラミック基板の製
造方法を提供することにある。
The present invention is a method created by paying attention to such a clarification point, and an object of the present invention is to provide a method for simultaneously firing a dielectric layer and a low dielectric constant insulating layer forming a laminated ceramic substrate. (EN) A method for manufacturing a multilayer ceramic substrate, which prevents the generation of a liquid phase due to mutual diffusion of both layers, thereby preventing a decrease in the dielectric constant of a dielectric constant material, and capable of obtaining a large-capacity embedded capacitor. is there.

ロ 発明の構成 問題点を解決するための手段 そして、上記目的を達成するための手段としての本発明
の積層セラミック基板の製造方法は、酸化鉛を主成分と
する高誘電率材料で形成した誘電体層と、該高誘電率材
料より低い誘電率の材料で形成した低誘電率絶縁層と、
コンデンサ形成用電極と、必要な配線パターンと層間を
接続するスルーホールを有する積層体を1100℃以下
の温度で同時焼成する積層セラミック基板の製造方法に
おいて、前記誘電体層を形成する高誘電率材料として、
該高誘電率材料の示熱差分析による吸熱ピーク温度より
少なくとも70゜以上の高温度で仮焼した高誘電率材料
を用いてなる構成としている。
(B) Means for Solving Problems of the Invention And, as a means for achieving the above-mentioned object, a method for manufacturing a laminated ceramic substrate according to the present invention is a dielectric formed by a high dielectric constant material containing lead oxide as a main component. A body layer, and a low dielectric constant insulating layer formed of a material having a dielectric constant lower than that of the high dielectric constant material,
In a method of manufacturing a laminated ceramic substrate, wherein a laminated body having a capacitor forming electrode and a through hole for connecting a necessary wiring pattern and an interlayer is co-fired at a temperature of 1100 ° C. or less, a high dielectric constant material for forming the dielectric layer. As
The high dielectric constant material is composed of a high dielectric constant material that is calcined at a temperature at least 70 ° C. higher than the endothermic peak temperature in the differential thermal analysis.

作用 本発明の積層セラミック基板の製造方法は、誘電体層を
形成する高誘電率材料を、該高誘電率材料の示熱差分析
による吸熱ピーク温度より少なくとも70゜以上の高温
度で仮焼することで、その合成を十分に行え、上記積層
体を同時焼成する際の該誘電率材料の相互拡散による液
相の発生を防止できるように作用する。
Action In the method for manufacturing a laminated ceramic substrate of the present invention, the high dielectric constant material forming the dielectric layer is calcined at a temperature higher than the endothermic peak temperature of the high dielectric constant material by at least 70 ° C. by the differential thermal analysis. As a result, the synthesis can be sufficiently performed, and an action of preventing the generation of a liquid phase due to the mutual diffusion of the dielectric constant materials when the above-mentioned laminated body is simultaneously fired is exerted.

ここで、 使用する誘電体材料の組成としては、Pb(Fe1/3.Nb2/3)-
(Fe1/2.W1/2)O3系に代表されるPb系ペロブスカイト組成
物が使用される。これは焼成温度が1100℃以下と低い為
に同時焼成される電極の材料にAu,Ag,Ag-Pd 等の低融点
金属が使用できるので酸化雰囲気焼成できるためであ
る。つまり焼成温度が高いとWやMo等の高融点金属しか
使用できず、これ等の金属は酸化し易いので還元雰囲気
でしか焼成できず、この雰囲気では誘電体材料も還元さ
れて使用できなくなるからである。一方PdやPd含量の多
い金属を電極材料に使用すれば酸化雰囲気でも高温で焼
成できるがPdが高価な為と導通抵抗が大きくなるので、
回路基板用の導体材料としては使用できない。
Here, the composition of the dielectric material used is Pb (Fe 1/3. Nb 2/3 )-
A Pb-based perovskite composition represented by (Fe 1/2. W 1/2 ) O 3 is used. This is because since the firing temperature is as low as 1100 ° C. or lower, a low melting point metal such as Au, Ag, or Ag—Pd can be used as a material for the electrodes to be fired at the same time, and thus firing in an oxidizing atmosphere can be performed. In other words, if the firing temperature is high, only refractory metals such as W and Mo can be used. Since these metals are easily oxidized, they can be fired only in a reducing atmosphere. In this atmosphere, the dielectric material is also reduced and cannot be used. Is. On the other hand, if Pd or a metal with a high Pd content is used for the electrode material, it can be fired at a high temperature even in an oxidizing atmosphere, but since Pd is expensive and the conduction resistance increases,
It cannot be used as a conductor material for circuit boards.

絶縁材料としては誘電体と同時焼成されるので1100℃以
下で焼成できるものが使用される。又上記の信号の伝播
遅延の問題があるので誘電率は15以下のものが使用され
る。
As the insulating material, a material that can be fired at 1100 ° C or lower is used because it is fired simultaneously with the dielectric. Also, because of the above-mentioned problem of signal propagation delay, a dielectric constant of 15 or less is used.

例えば硼珪酸ガラスや、さらには数種類の酸化物(例え
ばMgO,CaO,BaO,SrO,Al2O3,PbO,K2O,Na2O,ZnO,Li2O,Zr
O2,TiO2 等)を含むガラスとアルミナ,石英,ムライ
ト,コージェライト,スピネル等の混合物を原料とする
ものが、挙げられるが、その他800 〜1100℃で焼成でき
るものであれば何でも良い。
For example, borosilicate glass and several oxides (eg MgO, CaO, BaO, SrO, Al 2 O 3 , PbO, K 2 O, Na 2 O, ZnO, Li 2 O, Zr
Examples of the raw material include a mixture of glass containing O 2 and TiO 2 ) and a mixture of alumina, quartz, mullite, cordierite, spinel, and the like, but any material that can be fired at 800 to 1100 ° C. may be used.

積層基板を得るにはグリーンシートを使用したシート積
層法やシート印刷積層法を利用するのが好ましい。シー
ト積層法の場合を第1図で説明する。第1図は説明の便
宜上全工程を一つの図面で示してある。
In order to obtain a laminated substrate, it is preferable to use a sheet laminating method using a green sheet or a sheet printing laminating method. The case of the sheet laminating method will be described with reference to FIG. FIG. 1 shows all the steps in one drawing for convenience of explanation.

先ず低誘電率材料用の原料混合粉を使用してドクターブ
レード法により成形し,厚み0.1 〜0.5mm 程度の低誘電
率グリーンシート1を得る。これに必要な配線パターン
2を、Ag,Ag-Pd,Au 等の800 〜1100℃で焼成可能な導体
材料ペーストを使用してスクリーン印刷する。、又、他
の導体層との接続には打ち抜き金型やパンチングマシー
ンで低誘電率グリーンシート1に形成された0.2 〜0.5m
m Φのスルーホール3を通じて行うようにし、導体ペー
スト4を充填する。
First, a raw material mixed powder for a low dielectric constant material is used and molded by a doctor blade method to obtain a low dielectric constant green sheet 1 having a thickness of about 0.1 to 0.5 mm. The wiring pattern 2 necessary for this is screen-printed using a conductor material paste such as Ag, Ag-Pd, Au which can be fired at 800 to 1100 ° C. For connecting to other conductor layers, 0.2-0.5m formed on the low dielectric constant green sheet 1 by a punching die or a punching machine.
Conductor paste 4 is filled through the through holes 3 of mΦ.

以上と同様な方法で得られた厚み30〜400 μm程度の高
誘電率材料よりなるグリーンシート5にコンデンサ形成
用電極6と必要なスルーホール3や配線パターンを形成
する。さらにその下に配線パターンを印刷した低誘電率
グリーンシート1を積層した後、80〜150 ℃、50〜250k
g/cm2 の条件で熱圧着し一体化する。そして800 〜1100
℃で焼成温度で焼成しコンデンサ内蔵セラミック基板を
得る。第1図に示すようにRuO2系やBi2Ru2O7系等の抵抗
体7を焼成後の基板に通常の厚膜法により形成し、必要
によっては基板内部、表面上に基板と同時焼成により得
ることも可能である。
A capacitor forming electrode 6 and necessary through holes 3 and wiring patterns are formed on a green sheet 5 made of a high dielectric constant material having a thickness of about 30 to 400 μm obtained by the same method as described above. Furthermore, after laminating the low dielectric constant green sheet 1 on which a wiring pattern is printed underneath, 80-150 ° C, 50-250k
Thermocompression bonded under the condition of g / cm 2 to integrate. And 800-1100
The ceramic substrate with a built-in capacitor is obtained by firing at a firing temperature of ℃. As shown in Fig. 1, a resistor 7 such as RuO 2 system or Bi 2 Ru 2 O 7 system is formed on the substrate after firing by a normal thick film method, and if necessary, at the same time inside the substrate and on the surface simultaneously with the substrate. It can also be obtained by firing.

実施例 以下実施例並びに比較例について本発明を詳細に説明す
る。単位は重量%で示す。
EXAMPLES The present invention will be described in detail below with reference to examples and comparative examples. The unit is shown in% by weight.

実施例1 1450℃で溶融、水中急冷して作成したCaO18.2%,Al2O31
8.2%,SiO254.5%,B2O39.1% の組成を持つ平均粒径3〜3.
5 μmのガラス粉末60%と平均粒径1.2 μmのアルミナ
粉末40%の混合物に、溶剤(トルエン),バインダー
(アクリル樹脂)可塑剤(DOP) を加え、十分に混練して
粘度2,000 〜40,000CPS のスラリーを作成し、通常のド
クターブレード法を用いて厚み0.4mm の第2図に示す低
誘電率材料のグリーンシート1を作成した。このグリー
ンシート1を900 ℃で焼成した基板の特性は、誘電率ε
=7.8 崇比重=2.9,熱膨張係数=5.3 ×10-6/℃、抗
析強度=2400kg/cm2であった。このグリーンシート1を
30mm角に切断した後0.3mm Φのスルーホール3を形成し
た後、Ag90%,Pd10%の混合粉末に有機バインダー(エチ
ルセルローズ)と溶剤(テルピネオール)を加えて作成
した導体材料ペースト4をスルーホール3に充填し、同
時導体ペーストを使用して配線パターン2を印刷した。
Example 1 CaO 18.2%, Al 2 O 3 1 prepared by melting at 1450 ° C. and quenching in water
Average particle size 3 to 3 with composition of 8.2%, SiO 2 54.5%, B 2 O 3 9.1%.
Solvent (toluene), binder (acrylic resin) plasticizer (DOP) was added to a mixture of 60% of 5 μm glass powder and 40% of alumina powder with an average particle size of 1.2 μm, and they were sufficiently kneaded to obtain a viscosity of 2,000-40,000 CPS. Of the low dielectric constant material shown in FIG. 2 having a thickness of 0.4 mm was prepared by using an ordinary doctor blade method. The characteristics of the substrate obtained by firing this green sheet 1 at 900 ° C are:
r = 7.8, specific gravity = 2.9, thermal expansion coefficient = 5.3 × 10 −6 / ° C., and anti-deposition strength = 2400 kg / cm 2 . This green sheet 1
After cutting into 30mm square, 0.3mm Φ through hole 3 is formed, and then conductive material paste 4 made by adding organic binder (ethyl cellulose) and solvent (terpineol) to mixed powder of Ag90%, Pd10% is through hole. 3 was filled, and the wiring pattern 2 was printed using the simultaneous conductor paste.

PbO,Fe2O3,Nb2O5,WO3,ZnO を所定量秤量した後、湿式粉
砕し乾燥する。乾燥原料を850 ℃で仮焼し、湿式粉砕た
後、乾燥する。
A predetermined amount of PbO, Fe 2 O 3 , Nb 2 O 5 , WO 3 and ZnO is weighed, then wet pulverized and dried. The dry raw material is calcined at 850 ° C, wet-ground and then dried.

上記と同様の方法で100 μm厚の高誘電率グリーンシー
ト5を作成した。このグリーンシート5を30mm角に切断
した後、両面の相対する位置に、上記導体ペースト4を
使用して20mm角の電極6をスクリーン印刷した。第2図
に示した構造になるように、印刷を終了した低誘電率グ
リーンシート1と高誘電率グリーンシート5を積層した
後、100 ℃、100kg/cm2で熱圧着した。通常の電気式バ
ッチ炉を使用して900 ℃、30分間酸化雰囲気焼成した。
得られた容量は110nF で高誘電率材料の誘電率はε
4,200at 1kHZであった。使用した誘電体材料の仮焼物を
DTA で分析したところ第3図に示したように液相の発生
を示す昇温過程での吸熱ピークがみられず、焼成過程で
は液相が発生しないとことを示している。同様な構造を
800 ℃で仮焼した誘電体材料を使用して作成したとこ
ろ、得られた誘電率は4,100 で上記実施例とほぼ同様だ
った。またDTA による誘電体材料の分析結果では、液相
は発生していなかった。
A high-permittivity green sheet 5 having a thickness of 100 μm was prepared in the same manner as above. After this green sheet 5 was cut into 30 mm squares, 20 mm square electrodes 6 were screen-printed at the opposite positions on both sides using the conductor paste 4. After printing, the low dielectric constant green sheet 1 and the high dielectric constant green sheet 5 were laminated so as to have the structure shown in FIG. 2 and then thermocompression bonded at 100 ° C. and 100 kg / cm 2 . Using an ordinary electric batch furnace, baking was performed at 900 ° C. for 30 minutes in an oxidizing atmosphere.
The obtained capacitance is 110 nF and the permittivity of the high dielectric constant material is ε r =
It was 4,200 at 1kHZ. Calcination of the used dielectric material
When analyzed by DTA, as shown in Fig. 3, no endothermic peak in the temperature rising process, which indicates the generation of the liquid phase, is observed, indicating that the liquid phase does not occur in the firing process. A similar structure
When a dielectric material prepared by calcination at 800 ° C. was used, the obtained dielectric constant was 4,100, which was almost the same as that in the above-mentioned example. Moreover, the liquid phase did not occur in the analysis result of the dielectric material by DTA.

比較例1 実施例1と同様の構造を持ち、組成は実施例
と同じ誘電体材料を750 ℃で仮焼したものを使用して作
成した。得られた容量は80nFで誘電率は3,000 で低かっ
た。使用した誘電体材料の原料を5℃/minの昇温速度で
昇温しDTA で分析したところ第4図に示したように730
℃に昇温過程で吸熱ピークがあり液相が発生することを
示していた。このようにDTA で示される液相発生の有無
と内蔵した誘電体の誘電率との間に強い関係のあること
がわかり少なくとも仮焼温度はDTA の吸熱ピーク温度よ
り70℃高くする必要のあることがわかった。
Comparative Example 1 A dielectric material having the same structure as that of Example 1 and having the same composition as that of Example 1 was prepared by calcination at 750 ° C. The obtained capacitance was 80 nF and the dielectric constant was 3,000, which was low. The dielectric material used was heated at a heating rate of 5 ° C / min and analyzed by DTA.
There was an endothermic peak during the temperature rising process at ℃, indicating that a liquid phase was generated. Thus, it was found that there is a strong relationship between the presence or absence of liquid phase generation indicated by DTA and the permittivity of the built-in dielectric material. At least the calcination temperature must be 70 ° C higher than the endothermic peak temperature of DTA. I understood.

実施例2. 市販のアルミノ鉛ホウケイ酸ガラス(PbO-Al2O3-SiO2-B
2O3 系)を粉砕して作成した平均粒径3〜3.5 μmのガ
ラス粉末50% と平均粒径1.2 μmのアルミナ粉末50% の
混合物を実施例1と同様の方法で0.4mm 厚のグリーンシ
ートを900 ℃で焼成した基板の特性は、誘電率ε=7.
5,崇比重=2.95, 熱膨張係数=5.5 ×10-6/℃、抗析強
度=2,200kg/cm2であった。
Example 2. Commercially available alumino-lead borosilicate glass (PbO-Al 2 O 3 -SiO 2 -B
0.4mm thick green in 2 O 3 system) In a similar manner 50% glass powder pulverized average particle size 3-3.5 created in μm and the average particle diameter 1.2 mixture Example 1 Alumina powder 50% of μm to The characteristics of the substrate obtained by firing the sheet at 900 ° C are: dielectric constant ε r = 7.
5, Cao specific gravity = 2.95, thermal expansion coefficient = 5.5 × 10 −6 / ° C., and electrolysis strength = 2,200 kg / cm 2 .

第5図に示すようにこの低誘電率グリーンシート1を30
mm角に切断した後0.3mm Φのスルーホール3を形成した
後、実施例1で作成したAg-Pd 導体ペースト4をスルー
ホール3に充填し、同じ導体ペーストを使用して配線パ
ターン2を印刷した。実施例1で作成した850 ℃で仮焼
した高誘電率材料グリーンシートを30mm×30mmに切断し
た後、実施例1で作成したAg-Pd 導体ペーストを使用し
て20mm角のコンデンサ用電極6を印刷した。このように
電極を印刷した高誘電率グリーンシート5、印刷してい
ない高誘電グリーンシート(中間層)8、低誘電率グリ
ーンシート1を積層した後、100 ℃、100kg/cm2条件で
熱圧着し一体化し。900 ℃で同時焼成してコンデンサー
内蔵基板を作成した。焼成後高誘電率層(中間層)8は
高誘電率層5と低誘電率層1との間の相互拡散を減少す
るため中間層として設けたものである。得られた基板の
内蔵コンデンサーの容量は140nF で高誘電率層5の誘電
率は4,800 だった。
As shown in FIG. 5, this low dielectric constant green sheet 1
After cutting into mm squares and forming through holes 3 of 0.3 mm Φ, the Ag-Pd conductor paste 4 prepared in Example 1 is filled into the through holes 3 and the wiring pattern 2 is printed using the same conductor paste. did. After cutting the high dielectric constant material green sheet calcined at 850 ° C. prepared in Example 1 into 30 mm × 30 mm, a 20 mm square capacitor electrode 6 was formed using the Ag-Pd conductor paste prepared in Example 1. Printed. After stacking the high-permittivity green sheet 5 on which electrodes are printed, the high-permittivity green sheet (intermediate layer) 8 not printed, and the low-permittivity green sheet 1 as described above, thermocompression bonding is performed at 100 ° C. and 100 kg / cm 2 conditions. And unite. A substrate with a built-in capacitor was prepared by simultaneous firing at 900 ° C. After firing, the high dielectric constant layer (intermediate layer) 8 is provided as an intermediate layer in order to reduce mutual diffusion between the high dielectric constant layer 5 and the low dielectric constant layer 1. The capacitance of the built-in capacitor of the obtained substrate was 140 nF and the dielectric constant of the high dielectric constant layer 5 was 4,800.

比較例2 比較例1で使用した750 ℃で仮焼した誘電体材料を使用
して実施例2の積層基板を作成した。得られた誘電体の
誘電率は3,400 で実施例2に比較するとかなり小さかっ
た。
Comparative Example 2 A laminated substrate of Example 2 was prepared using the dielectric material used in Comparative Example 1 and calcined at 750 ° C. The obtained dielectric had a dielectric constant of 3,400, which was considerably smaller than that of Example 2.

ハ.発明の効果 本発明の積層セラミック基板の製造方法によれば、誘電
体層を形成する高誘電率材料として、該高誘電率材料の
示熱差分析による吸熱ピーク温度より少なくとも70゜
以上の高温度で仮焼した高誘電率材料を用い、該温度で
の仮焼により該高誘電率材料の合成が十分に行え、基板
積層体の同時焼成の際の昇温過程でのコンデンサを形成
する該高誘電率材料中に液相を生じさせなくしているの
で、従来の積層セラミック基板に比べ、高い容量(誘電
率)を有する内蔵コンデンサを得ることができるという
効果を有する。
C. EFFECTS OF THE INVENTION According to the method for manufacturing a laminated ceramic substrate of the present invention, as the high dielectric constant material for forming the dielectric layer, a high temperature of at least 70 ° C. or higher than the endothermic peak temperature of the high dielectric constant material by differential thermal analysis. The high-dielectric constant material calcined in 1. is used, and the high-dielectric-constant material can be sufficiently synthesized by calcination at the temperature, and the high-dielectric-constant material for forming a capacitor in the temperature rising process at the time of simultaneous firing of the substrate laminate is formed. Since the liquid phase is not generated in the dielectric constant material, there is an effect that a built-in capacitor having a higher capacity (dielectric constant) can be obtained as compared with the conventional laminated ceramic substrate.

また、耐熱性金属酸化薄膜層や金属体層等のバリアー層
を必要としないので、基板厚みを極端に厚くすることな
く、大容量のコンデンサを得ることができる。
Further, since a barrier layer such as a heat-resistant metal oxide thin film layer or a metal layer is not required, a large capacity capacitor can be obtained without making the substrate thickness extremely thick.

従って、本発明によれば、小型、高集積回路のセラミッ
ク基板を製造することができる。
Therefore, according to the present invention, it is possible to manufacture a ceramic substrate of a small size and a highly integrated circuit.

【図面の簡単な説明】[Brief description of drawings]

第1図、第2図,第5図は本発明の積層セラミック基板
の一実施例である。第3図,第4図は示差熱分析(DTA)
による昇温過程での一般的温度と示差熱の関係を図示し
たものである。第3図は発熱、吸熱のみられない本発明
の場合を、第4図は液相が生じ吸熱ピークが発生してい
る比較例の場合を示す。 1……低誘電率グリーンシート、2……配線パターン、3
……スルーホール、4……導体ペースト、5……高誘電率
グリーンシート、6……コンデンサ形成用電極、7……抵
抗体、8……高誘電率グリーンシート(中間層)
1, 2 and 5 show an embodiment of the laminated ceramic substrate of the present invention. Figures 3 and 4 show differential thermal analysis (DTA)
3 is a diagram showing the relationship between the general temperature and the differential heat in the temperature rising process by. FIG. 3 shows the case of the present invention in which neither heat generation nor heat absorption occurs, and FIG. 4 shows the case of a comparative example in which a liquid phase occurs and an endothermic peak occurs. 1 …… Low-permittivity green sheet, 2 …… Wiring pattern, 3
...... Through hole, 4 ...... Conductor paste, 5 ...... High permittivity green sheet, 6 ...... Capacitor forming electrode, 7 ...... Resistor, 8 ...... High permittivity green sheet (intermediate layer)

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭60−89995(JP,A) 特開 昭61−48996(JP,A) 特開 昭62−196811(JP,A) 特開 昭62−244631(JP,A) 特開 昭62−265795(JP,A) ─────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-60-89995 (JP, A) JP-A-61-48996 (JP, A) JP-A-62-196811 (JP, A) JP-A-62- 244631 (JP, A) JP 62-265795 (JP, A)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】酸化鉛を主成分とする高誘電率材料で形成
した誘電体層と、該高誘電率材料より低い誘電率の材料
で形成した低誘電率絶縁層と、コンデンサ形成用電極
と、必要な配線パターンと層間を接続するスルーホール
を有する積層体を1100℃以下の温度で同時焼成する
積層セラミック基板の製造方法において、前記誘電体層
を形成する高誘電率材料として、該高誘電率材料の示熱
差分析による吸熱ピーク温度より少なくとも70゜以上
の高温度で仮焼した高誘電率材料を用いてなることを特
徴とする積層セラミック基板の製造方法。
1. A dielectric layer formed of a high dielectric constant material containing lead oxide as a main component, a low dielectric constant insulating layer formed of a material having a dielectric constant lower than the high dielectric constant material, and a capacitor forming electrode. In the method for manufacturing a laminated ceramic substrate, in which a laminated body having a required wiring pattern and through holes connecting layers is co-fired at a temperature of 1100 ° C. or less, the high dielectric constant material is used as the high dielectric constant material. A method for producing a laminated ceramic substrate, which comprises using a high dielectric constant material that is calcined at a temperature at least 70 ° C. higher than the endothermic peak temperature of the high index material by differential thermal analysis.
JP62324955A 1987-12-22 1987-12-22 Method for manufacturing laminated ceramic substrate Expired - Lifetime JPH0632384B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62324955A JPH0632384B2 (en) 1987-12-22 1987-12-22 Method for manufacturing laminated ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62324955A JPH0632384B2 (en) 1987-12-22 1987-12-22 Method for manufacturing laminated ceramic substrate

Publications (2)

Publication Number Publication Date
JPH01166599A JPH01166599A (en) 1989-06-30
JPH0632384B2 true JPH0632384B2 (en) 1994-04-27

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Country Link
JP (1) JPH0632384B2 (en)

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US6985349B2 (en) * 2001-12-13 2006-01-10 Harris Corporation Electronic module including a low temperature co-fired ceramic (LTCC) substrate with a capacitive structure embedded therein and related methods
JP4312654B2 (en) 2004-05-07 2009-08-12 パナソニック株式会社 Cold cathode tube lighting device
US20060163768A1 (en) * 2005-01-26 2006-07-27 Needes Christopher R Multi-component LTCC substrate with a core of high dielectric constant ceramic material and processes for the development thereof
JP6614246B2 (en) * 2016-02-03 2019-12-04 富士通株式会社 Capacitor built-in multilayer wiring board and manufacturing method thereof
US10141353B2 (en) * 2016-05-20 2018-11-27 Qualcomm Incorporated Passive components implemented on a plurality of stacked insulators

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* Cited by examiner, † Cited by third party
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JPS6089995A (en) * 1983-10-24 1985-05-20 日本電気株式会社 Composite laminated ceramic part
JPS6148996A (en) * 1984-08-16 1986-03-10 日本電気株式会社 Method of producing ceramic multilayer wiring board
JPH0754778B2 (en) * 1986-02-22 1995-06-07 三菱マテリアル株式会社 Ceramic board with built-in capacitor
JPS62244631A (en) * 1986-04-17 1987-10-26 日本電気株式会社 Manufacture of composite laminated ceramic part
JPS62265795A (en) * 1986-05-14 1987-11-18 株式会社住友金属セラミックス Ceramic board with built-in capacitor

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