JPH02121392A - Capacitor built-in composite circuit board and manufacture thereof - Google Patents

Capacitor built-in composite circuit board and manufacture thereof

Info

Publication number
JPH02121392A
JPH02121392A JP63274076A JP27407688A JPH02121392A JP H02121392 A JPH02121392 A JP H02121392A JP 63274076 A JP63274076 A JP 63274076A JP 27407688 A JP27407688 A JP 27407688A JP H02121392 A JPH02121392 A JP H02121392A
Authority
JP
Japan
Prior art keywords
weight
capacitor
titanate
protective layer
dielectric layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63274076A
Other languages
Japanese (ja)
Other versions
JP2620640B2 (en
Inventor
Katsuhiko Onizuka
克彦 鬼塚
Akiya Fujisaki
昭哉 藤崎
Akira Hashimoto
晃 橋本
Yoshihiro Fujioka
芳博 藤岡
Masakazu Yasui
正和 安井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP63274076A priority Critical patent/JP2620640B2/en
Publication of JPH02121392A publication Critical patent/JPH02121392A/en
Application granted granted Critical
Publication of JP2620640B2 publication Critical patent/JP2620640B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To obtain a condenser which is not only excellent in mechanical strength but also possessed of a wide range of capacitance by a method wherein a protective layer is provided to the periphery of a dielectric layer, an electrode is provided onto the upside and the underside of the dielectric layer provided with the protective layer to form a capacitor section, and the condenser section is housed in an alumina insulation base composed of a specified composition. CONSTITUTION:An alumina insulating board 1 is formed as follows: raw material powder is mixed with a proper organic binder, a dispersing agent, a plasticizing agent, and a solvent and muddled so as to form liquid mud whose composition is 65wt.%<Al2O3<80wt.%/15wt.%<=SiO2<=25wt.%/0.5wt.%<=CaO<=5 wt.%/0.5wt.%<=MgO<=5wt.%: the liquid mud is molded into green sheets: and two or more green sheets are laminated. A capacitor section 2 is composed of a protective layer 4 and a dielectric layer 7 provided with an upper electrode 5 and a lower electrode 6 formed on its upside and underside respectively. The dielectric layer 7 is formed of barium titanate or lamthanum titanate ceramic and serves as a built-in capacitor by laminating an alumina insulating board provided with an electric wiring conductor pattern on it.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、コンデンサー、抵抗体及び電気配線用導体層
を有するコンデンサー内蔵複合回路基板に関し、とりわ
け絶縁基体及び誘電体を同時に焼成して成るコンデンサ
ー内蔵複合回路基板及びその製造方法に関するものであ
る。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a capacitor-embedded composite circuit board having a capacitor, a resistor, and a conductor layer for electrical wiring, and particularly to a capacitor formed by simultaneously firing an insulating substrate and a dielectric material. The present invention relates to a built-in composite circuit board and a manufacturing method thereof.

〔従来の技術〕[Conventional technology]

近年、各種の電子機器はIC及びLSI等の半導体集積
回路素子の利用で小型化・高密度実装化が進められ、そ
れに伴い前記半導体集積回路素子等を搭載する絶縁基板
も小型化とともにより高密度化が要求されてきた。そこ
で、電気配線の微細化や多層化による高密度化、および
電子回路におけるコンデンサーや抵抗等の受動部品のチ
ップ化が進められ、さらにそれら小型化された受動部品
を化8M基板の両面に設けられた電気配線用導体層に接
続した両面実装化が実用化されてきた。
In recent years, various electronic devices have become smaller and more densely packaged through the use of semiconductor integrated circuit elements such as ICs and LSIs, and as a result, the insulating substrates on which the semiconductor integrated circuit elements are mounted are also smaller and more densely packed. ization has been required. Therefore, progress has been made in increasing the density of electrical wiring through miniaturization and multilayering, and in chipping passive components such as capacitors and resistors in electronic circuits. Double-sided mounting connected to a conductor layer for electrical wiring has been put into practical use.

しかし乍ら、半導体材料の著しい発達に伴って電子機器
のより一層の小型化・高密度実装化が要求されるように
なり、前記受動部品の小型化等ではその要求を満足する
ことができなくなっていた。
However, with the remarkable development of semiconductor materials, there has been a demand for further miniaturization and high-density packaging of electronic devices, and it has become impossible to satisfy these demands by making the passive components smaller. was.

その結果、コンデンサーや抵抗等の受動素子をスクリー
ン印刷法等により厚膜印刷し、同様ムこして形成された
電気配線導体層とともに、前記コンデンサー部を絶縁基
体の焼成と同時に形成し、その後抵抗体を焼付けしてハ
イブリッド化する等により小型化・高密度化せんとする
複合セラミ・7り基板が提案されるようになってきてい
る(特開昭60−103690号公報、特開昭60−1
77696号公報参照)。
As a result, passive elements such as capacitors and resistors were thick-film printed by screen printing, etc., and the capacitor parts were formed at the same time as the insulating substrate was fired, along with the electrical wiring conductor layer formed by the same process, and then the resistors were printed. Composite ceramic substrates that are designed to be smaller and have higher densities by baking and hybridizing them have been proposed (Japanese Patent Application Laid-Open No. 103690/1982, Japanese Patent Application Laid-open No. 1986-1).
(See Publication No. 77696).

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし乍ら、この従来の複合セラミック基板は、例えば
チタン酸バリウム系セラミックがら成る誘電体層を、機
械的強度が高く、化学的に安定でかつ絶縁性に優れたア
ルミナ系絶縁基体中に内蔵させることから、該アルミナ
系絶縁基体と前記誘電体層との焼成温度を一層させるこ
とが難しく、その上、絶縁基体のアルミナ系セラミック
と誘電体層のチタン酸バリウム系またはチタン酸ランタ
ン系セラミックとが接した状態で同時に焼成すると、上
記セラミック同志が反応してしまい、初期の特性を有す
る誘電体層が得られないという問題があった。
However, this conventional composite ceramic substrate incorporates a dielectric layer made of, for example, barium titanate-based ceramic into an alumina-based insulating base that has high mechanical strength, chemical stability, and excellent insulation properties. Therefore, it is difficult to increase the firing temperature of the alumina-based insulating base and the dielectric layer, and furthermore, the alumina-based ceramic of the insulating base and the barium titanate-based or lanthanum titanate-based ceramic of the dielectric layer are difficult to heat. If the ceramics are fired at the same time in contact with each other, there is a problem in that the ceramics react with each other, making it impossible to obtain a dielectric layer having the initial characteristics.

〔発明の目的〕[Purpose of the invention]

本発明は上記欠点に鑑み案出されたもので、その目的は
アルミナ系絶縁基体とチタン酸バリウム系および/また
はチタン酸ランタン系誘電体層を同時に焼成し、機械的
強度とともにコンデンサーとして要求される電気的特性
、とりわけ広範囲のコンデンサー容量を得ることが可能
なコンデンサー内蔵複合回路基板及びその製造方法を提
供することにある。
The present invention was devised in view of the above-mentioned drawbacks, and its purpose is to simultaneously fire an alumina-based insulating substrate and a barium titanate-based and/or lanthanum titanate-based dielectric layer, thereby achieving the mechanical strength required for a capacitor. It is an object of the present invention to provide a composite circuit board with a built-in capacitor that can obtain electrical properties, particularly a wide range of capacitor capacities, and a method for manufacturing the same.

〔課題を解決するための手段〕[Means to solve the problem]

本発明に係るコンデンサー内蔵複合回路基板は、チタン
酸バリウム系及び/またはチタン酸ランタン系セラミッ
クから成る誘電体層の外周部に、チタニア、チタン酸カ
ルシウム、チタン酸マグネシウム、チタン酸ストロンチ
ウムまたは部分安定化ジルコニアの少なくとも1種から
成る保護層を設け、該保護層を有する誘電体層の上下面
に電極を設けてコンデンサー部を形成し、該コンデンサ
ー部が、 65重11% <   AIZO:l   <80  
重i %15重量%≦SiO□≦25重量% 0.5重量%≦CaO≦5重量% 0.5重量%≦MgO≦5重量% の組成から成るアルミナ系絶縁基体に内蔵されたことを
特徴とするものである。
The composite circuit board with a built-in capacitor according to the present invention has titania, calcium titanate, magnesium titanate, strontium titanate, or a partially stabilized material on the outer periphery of a dielectric layer made of barium titanate-based and/or lanthanum titanate-based ceramic. A protective layer made of at least one type of zirconia is provided, and electrodes are provided on the upper and lower surfaces of the dielectric layer having the protective layer to form a capacitor part, and the capacitor part has the following structure: 65 weight 11% < AIZO: l < 80
Weight i% 15% by weight ≦SiO□□≦25% by weight 0.5% by weight≦CaO≦5% by weight 0.5% by weight≦MgO≦5% by weight That is.

また、本発明に係るコンデンサー内蔵複合回路基板の製
造方法は、絶縁基体の組成が、65重量% く  八I
ZO3<  80  重量%15重量%≦SiO□≦2
5重量% 0.5重量%≦CaO≦5重量% 0.5重量%≦MgO≦5重量% となる様にセラミックス原料を配合し、該配合物とバイ
ンダーの混合物をドクターブレード法により成形したグ
リーンシート上にスクリーン印刷法で下部電極を所定の
パターンに印刷する工程と、前記下部電極上にチタン酸
バリウム系及び/またはチタン酸ランタン系セラミック
から成る誘電体パターンを印刷する工程と、 前記誘電体パターンの外周部にチタニア、チタン酸カル
ウシム、チタン酸マグネシウム、チタン酸ストロンチウ
ムまたは部分安定化ジルコニアの少なくとも1種から成
る保護層パターンを印刷する工程と、 前記保護層の一部と重なりかつ前記誘電体パターン上面
に、上部電極を所定のパターンに印刷してコンデンサー
部を形成する工程と、 前記コンデンサー部を形成した絶縁基体と電気配線用導
体パターンを形成した別の絶縁基体とを交互に積層し、
熱圧着する工程と、 大気中で2O0°C乃至400℃の温度で脱バインダー
し、次いで1280℃乃至1350℃の温度にて焼成−
体止する工程とから成ることを特徴とするものである。
Further, in the method for manufacturing a composite circuit board with a built-in capacitor according to the present invention, the composition of the insulating substrate is 65% by weight.
ZO3<80 wt%15wt%≦SiO□≦2
5% by weight 0.5% by weight≦CaO≦5% by weight 0.5% by weight≦MgO≦5% by weight Ceramic raw materials are blended so that the mixture of the blend and the binder is molded by the doctor blade method. a step of printing a lower electrode in a predetermined pattern on a sheet by a screen printing method; a step of printing a dielectric pattern made of barium titanate-based and/or lanthanum titanate-based ceramic on the lower electrode; and the dielectric material. printing a protective layer pattern made of at least one of titania, calcium titanate, magnesium titanate, strontium titanate, or partially stabilized zirconia on the outer periphery of the pattern, overlapping a part of the protective layer and covering the dielectric material; a step of printing an upper electrode in a predetermined pattern on the upper surface of the pattern to form a capacitor section, and alternately laminating an insulating substrate on which the capacitor section is formed and another insulating substrate on which a conductor pattern for electrical wiring is formed,
A process of thermocompression bonding, debinding at a temperature of 200°C to 400°C in the air, and then firing at a temperature of 1280°C to 1350°C.
The method is characterized in that it consists of a step of stopping the body.

〔作 用〕[For production]

アルミナ系絶縁基体の組成が 65重1 % <  Ah(h  <ao  重1 %
15重量%≦5ift≦25重量% 0.5重量%゛≦CaO≦5重量% 0.5重量%≦MgO≦5重量% となる様に調整することにより、チタン酸バリウム系及
び/またはチタン酸ランタン系セラミックから成る誘電
体材料が焼結する1280℃乃至1350℃の焼成温度
にてアルミナ系絶縁基体を前記誘電体材料と同時に焼成
一体化することが可能となる。
The composition of the alumina-based insulating substrate is 65% by weight < Ah (h < ao 1% by weight
Barium titanate-based and/or titanic acid At the firing temperature of 1280° C. to 1350° C. at which the dielectric material made of lanthanum ceramic is sintered, the alumina insulating substrate can be fired and integrated with the dielectric material at the same time.

特に誘電体として、チタン酸バリウム系から成る誘電体
とチタン酸ランタン系から成る誘電体が同時に絶縁基体
上に存在する場合において、特に有効である。
This is particularly effective when a barium titanate-based dielectric and a lanthanum titanate-based dielectric are simultaneously present on the insulating substrate.

また、アルミナ系絶縁基体と前記誘電体層が直接接する
のを防止するため、前記誘電体層の外周部に保護層を成
形することにより別のアルミナ系絶縁基体を積層しても
、該アルミナ系絶縁基体と誘電体層とが直接反応するこ
とはない。
In addition, in order to prevent the alumina-based insulating base from directly contacting the dielectric layer, a protective layer is formed on the outer periphery of the dielectric layer, so that even if another alumina-based insulating base is laminated, the alumina-based There is no direct reaction between the insulating substrate and the dielectric layer.

〔実施例〕〔Example〕

次に本発明のコンデンサー内蔵複合回路基板及びその製
造方法を第1図及び第2図に示す実施例に基づき詳細に
説明する。
Next, a composite circuit board with a built-in capacitor and a method for manufacturing the same according to the present invention will be explained in detail based on the embodiment shown in FIGS. 1 and 2.

第1図は本発明のコンデンサー内蔵複合回路基板の一実
施例を示す断面図であり、第2図は第1図のコンデンサ
ー部の構成を説明するための一部拡大断面図である。
FIG. 1 is a cross-sectional view showing an embodiment of a composite circuit board with a built-in capacitor according to the present invention, and FIG. 2 is a partially enlarged cross-sectional view for explaining the structure of the capacitor section of FIG.

図において、1はアルミナ系絶縁基体、2はコンデンサ
ー部、3は電気配線用導体で、前記コンデンサー部2は
保護層4と上下面に各々上部電極5及び下部電極6を有
する誘電体層7から成る。
In the figure, 1 is an alumina-based insulating substrate, 2 is a capacitor part, and 3 is a conductor for electrical wiring. Become.

前記アルミナ系絶縁基体1は、その組成が、65重量%
く ^12O3  < 80重量%15重量%≦SiO
□≦25重量% 0.5重量%≦CaO≦5重量% 0.5重量%≦−go≦5重量% となる様に、アルミナ(A1.03 ) 、シリカ(S
iO2)、カルシア(Cab) 、マグネシア(MgO
)等から成るセラミック原料粉末に適当な有機バインダ
ー、分散剤、可塑剤及び溶媒を添加混合して泥漿物を作
り、これを例えば従来周知のドクターブレード法等によ
りシート状に成形し、得られたグリーンシートを複数枚
積層したものから形成される。
The composition of the alumina-based insulating substrate 1 is 65% by weight.
^12O3 < 80% by weight 15% by weight ≦SiO
Alumina (A1.03), silica (S
iO2), calcia (Cab), magnesia (MgO
), a suitable organic binder, dispersant, plasticizer, and solvent are added to and mixed with the ceramic raw material powder, and the slurry is formed into a sheet by, for example, the well-known doctor blade method. It is formed by laminating multiple green sheets.

また、前記グリーンシートにはその上面に下部電極6が
複数個、被着形成されており、該下部電極6は銀・パラ
ジウム(Ag−Pd)合金等から成り、該合金の全屈粉
末に適当な溶剤、溶媒を添加混合し、ペースト状となし
た合金ペーストを従来周知のスクリーン印刷法等により
所定のパターンにグリーンシート上に被着形成される。
In addition, a plurality of lower electrodes 6 are formed on the upper surface of the green sheet, and the lower electrodes 6 are made of a silver-palladium (Ag-Pd) alloy or the like, and are suitable for fully bending powder of the alloy. An alloy paste is prepared by adding and mixing a solvent and a solvent to form a paste, and the alloy paste is deposited on a green sheet in a predetermined pattern by a conventionally well-known screen printing method or the like.

この下部電極6が後述するアルミナ系絶縁基体1に内蔵
されたコンデンサー部2の一方の電極として作用する。
This lower electrode 6 acts as one electrode of a capacitor section 2 built into an alumina-based insulating substrate 1, which will be described later.

前記上面に下部電極6を有するグリーンシートは、該下
部電極6の上面に所望のコンデンサーの容量に応じて設
計された膜厚で誘電体層7が被着形成され、該誘電体層
7はチタン酸バリウム系或いはチタン酸ランタン系セラ
ミックから成り、該チタン酸バリウム系またはチタン酸
ランタン系セラミックの粉末にエチルセルロース系等の
有機バインダーと溶媒を添加混合し、ペースト状となし
、前記と同様のスクリーン印刷法等にて下部電極6上面
に該下部電極6の寸法より若干小さくなる寸法で誘電体
M7が被着形成される。この誘電体層7は後述する電気
配線用導体パターンを有するアルミナ系絶縁基体1bを
積層することにより内蔵されたコンデンサーとして作用
する。
In the green sheet having the lower electrode 6 on the upper surface, a dielectric layer 7 is formed on the upper surface of the lower electrode 6 with a thickness designed according to the desired capacitance of the capacitor, and the dielectric layer 7 is made of titanium. It is made of barium acid or lanthanum titanate ceramic, and the barium titanate or lanthanum titanate ceramic powder is mixed with an organic binder such as ethyl cellulose and a solvent to form a paste, which is then screen printed in the same manner as above. A dielectric M7 having dimensions slightly smaller than the dimensions of the lower electrode 6 is deposited on the upper surface of the lower electrode 6 by a method or the like. This dielectric layer 7 functions as a built-in capacitor by laminating an alumina-based insulating substrate 1b having a conductor pattern for electrical wiring, which will be described later.

次に、前記誘電体層7の外周部に誘電体層7と一部重な
る様に枠状に、チタニア、チタン酸カルシウム、チタン
酸マグネシウム、チタン酸ストロンチウムまたは部分安
定化ジルコニアの1種以上を主成分とするペーストを前
記と同様のスクリーン印刷法等により厚膜印刷し、保護
N4を形成する。
Next, at least one type of titania, calcium titanate, magnesium titanate, strontium titanate, or partially stabilized zirconia is applied in a frame shape on the outer periphery of the dielectric layer 7 so as to partially overlap with the dielectric layer 7. The paste as a component is thick-film printed by the same screen printing method as described above to form the protection N4.

該保護層4の膜厚は厚い程、誘電体層4とアルミナ系絶
縁基体1bとの反応防止効果は大であるが、焼成一体層
したコンデンサー部2を内蔵したアルミナ系絶縁基体l
の表面には電気配線用導体層3や抵抗体8をスクリーン
印刷法により形成すべく、表面の凹凸を最小限にする必
要上、保護層4の厚さは10μm乃至50μm程度が望
ましい。
The thicker the protective layer 4 is, the greater the effect of preventing the reaction between the dielectric layer 4 and the alumina insulating base 1b.
In order to form the electric wiring conductor layer 3 and the resistor 8 on the surface of the protective layer 4 by screen printing, the thickness of the protective layer 4 is preferably about 10 μm to 50 μm because it is necessary to minimize surface irregularities.

尚、保護層4の材料はアルミナ系絶縁基体1及び誘電体
層7と同時に焼成する1280°C乃至1350°Cの
温度範囲で緻密化し、かつアルミナ系絶縁基体1bと強
固に被着する必要上、前記チタニア、チタン酸カルシウ
ム、チタン酸マグネシウム、チタン酸ストロンチウムま
たは部分安定化ジルコニアの少なくともいずれかに限定
される。
The material of the protective layer 4 needs to be densified in the temperature range of 1280°C to 1350°C, which is fired at the same time as the alumina-based insulating base 1 and the dielectric layer 7, and adhere firmly to the alumina-based insulating base 1b. , titania, calcium titanate, magnesium titanate, strontium titanate, or partially stabilized zirconia.

更に、前記誘電体層7の外周部に形成された保護層4の
一部と重なり、かつ前記誘電体層7上面に前記下部電極
6と同一合金から成る合金ペーストを使用して同様のス
クリーン印刷法等により上部電極5を所定パターンに厚
膜印刷する。この上部電極5が後述するアルミナ系絶縁
基体1に内蔵されたコンデンサー部2の他方の電極とし
て作用する。
Further, similar screen printing is performed using an alloy paste made of the same alloy as the lower electrode 6 on the upper surface of the dielectric layer 7 and overlapping a part of the protective layer 4 formed on the outer periphery of the dielectric layer 7. The upper electrode 5 is thick-film printed in a predetermined pattern using a method or the like. This upper electrode 5 acts as the other electrode of a capacitor section 2 built into an alumina-based insulating substrate 1, which will be described later.

尚、前記上部電極5及び下部電極6は焼成することによ
りピンホールのない緻密質となることが望ましい。
It is preferable that the upper electrode 5 and the lower electrode 6 become dense without pinholes by firing.

次いで、前記コンデンサー部2を形成したアルミナ系絶
縁基体1aと、前記と同様の電極用合金ペーストを用い
てスクリーン印刷を行いアルミナ系絶縁基体1bの上下
面の導通をはかるスルホール部9に前記合金ペーストを
充填すると共に、電気配線用導体パターンを形成した別
のアルミナ系絶縁基体とを交互に積層して熱圧着する。
Next, screen printing is performed using the alumina-based insulating base 1a on which the capacitor portion 2 is formed and the same electrode alloy paste as described above, and the alloy paste is applied to the through-hole portions 9 for establishing conduction between the upper and lower surfaces of the alumina-based insulating base 1b. and another alumina-based insulating substrate on which a conductor pattern for electrical wiring is formed are alternately laminated and bonded by thermocompression.

得られた積層体を大気中、2O0°C乃至400 ”C
の温度で脱バインダーし、その後1280乃至1350
℃の温度にて一体化焼成することにより、緻密化した電
極層を有するコンデンサー部2を内蔵したアルミナ系絶
縁基体を得る。
The obtained laminate was heated in the atmosphere from 200°C to 400”C.
Debinding at a temperature of 1280 to 1350
By integrally firing at a temperature of 0.degree. C., an alumina-based insulating substrate containing a built-in capacitor portion 2 having a dense electrode layer is obtained.

かくして前記一体焼成後のアルミナ系絶縁基体1表面に
スクリーン印刷法によりAg−Pb系合金ペーストを使
用して電気配線用導体層3を、また所望により酸化ルテ
ニウム(RuzQ3)等を主成分とするペーストを使用
して抵抗体8をそれぞれ印刷し、大気中でおよそ850
℃の温度で焼成することによりコンデンサー内蔵複合回
路基板が得られる。
Thus, a conductor layer 3 for electrical wiring is formed on the surface of the alumina-based insulating substrate 1 after the integral firing using an Ag-Pb alloy paste by screen printing, and if desired, a paste containing ruthenium oxide (RuzQ3) as a main component. Each resistor 8 was printed using
A composite circuit board with a built-in capacitor can be obtained by firing at a temperature of °C.

また、電気配線用導体層3として銅(Cu)を主成分と
するペーストを使用する場合には、抵抗体8にはホウ化
ランタン(LaB、)や酸化スズ(SnO2)を主成分
とするペーストを使用して印刷し、窒素雰囲気中およそ
900℃の温度で焼成することにより、前記と同様のコ
ンデンサー内蔵複合回路基板が得られる。
In addition, if a paste containing copper (Cu) as the main component is used as the electrical wiring conductor layer 3, the resistor 8 may be coated with a paste containing lanthanum boride (LaB) or tin oxide (SnO2) as the main component. A composite circuit board with a built-in capacitor similar to that described above can be obtained by printing using the above-described method and baking it at a temperature of approximately 900° C. in a nitrogen atmosphere.

次に実験例に基づき本発明の作用効果を説明する。Next, the effects of the present invention will be explained based on experimental examples.

アルミナ系絶縁基体の組成が第1表になる様に、アルミ
ナ、シリカ、カルシア、マグネシアを配合し、該配合物
に適当な有機バインダー及び溶媒を添加混合して泥漿状
となすとともに、これをドクターブレード法により厚さ
約2O0μmのグリーンシートに形成し、しかる後、該
グリーンシートに打ち抜き加工を施し、150mm角の
シートを得た。
Alumina, silica, calcia, and magnesia are blended so that the composition of the alumina-based insulating substrate is shown in Table 1, and an appropriate organic binder and solvent are added and mixed to the blend to form a slurry. A green sheet with a thickness of about 200 μm was formed by a blade method, and then the green sheet was punched to obtain a 150 mm square sheet.

次いで、スクリーン印刷等の厚膜印刷法により順次、A
g−Pb合金ペーストを用いて約2乃至10mm角の下
部電極パターンを、該下部電極パターン上にチタン酸バ
リウム系あるいはチタン酸ランタン系誘電体粉末にエチ
ルセルロース系等の有機バインダーと溶媒を混合混練し
て得た誘電体ペーストにより厚さ2Oμm乃至60μm
sl乃至8mm角の誘電体パターンを、誘電体パターン
の外周部に該誘電体パターンの外周の一部と重なる様に
第1表に示す保護層材料を主体とするペーストにより枠
状に保護層パターンを、該保護層の一部と重なり、かつ
前記誘電体パターン上面に前記下部電極と同じAg−P
b合金ペーストにより上部電極をそれぞれ被着形成する
。しかる後、大気中で2O0℃乃至400℃の温度で脱
バインダーし、次いで第1表に示す温度にて大気で焼成
する。
Next, A is sequentially printed using a thick film printing method such as screen printing.
A lower electrode pattern of about 2 to 10 mm square is formed using g-Pb alloy paste, and barium titanate or lanthanum titanate dielectric powder is mixed and kneaded with an organic binder such as ethyl cellulose and a solvent on the lower electrode pattern. The thickness is 20μm to 60μm by dielectric paste obtained by
A protective layer pattern is formed on the outer periphery of the dielectric pattern of 8 mm square using a paste mainly composed of the protective layer material shown in Table 1, so that it overlaps a part of the outer periphery of the dielectric pattern. overlapping a part of the protective layer and on the upper surface of the dielectric pattern is the same Ag-P as the lower electrode.
(b) Form upper electrodes using alloy paste. Thereafter, the binder is removed in the air at a temperature of 200°C to 400°C, and then fired in the air at the temperatures shown in Table 1.

上記評価試料によりLCRメーターを使用して上下電極
層の短絡の有無を測定し、誘電体層とアルミナ系絶縁基
体との反応の有無を確認した。
Using the above evaluation sample, the presence or absence of a short circuit between the upper and lower electrode layers was measured using an LCR meter, and the presence or absence of a reaction between the dielectric layer and the alumina-based insulating substrate was confirmed.

その結果を第1表に示す。The results are shown in Table 1.

尚、誘電体層とアルミナ系絶縁基体との反応が保護層に
より有効に防止されていることが確認された評価試料は
前記LCRメーターを使用し、周波数I MHz 、入
力信号レベル1.QVrnsの測定条件にてコンデンサ
ーとしての静電容量及び誘電正接を測定し、静電容量か
ら比誘電率を算出するとともに、−25℃乃至125℃
における静電容量を測定し、該静電容量の変化量を温度
特性(TCC)として算出した。
The evaluation sample, in which it was confirmed that the reaction between the dielectric layer and the alumina-based insulating substrate was effectively prevented by the protective layer, was tested using the LCR meter at a frequency of I MHz and an input signal level of 1. Measure the capacitance and dielectric loss tangent as a capacitor under the measurement conditions of QVrns, calculate the relative dielectric constant from the capacitance, and calculate the dielectric constant from -25°C to 125°C.
The capacitance was measured, and the amount of change in the capacitance was calculated as the temperature characteristic (TCC).

その結果、チタン酸バリウム系のコンデンサー部はいず
れも比誘電率(εr)が1600乃至2O00、誘電正
接(tanθ)が0.8χ乃至1.8χを示し、チタン
酸ランタンのコンデンサー部は比誘電率(εr)が52
乃至56、温度特性が一55PPM/℃乃至一81PP
門/℃の範囲内の値であることを確認した。
As a result, the capacitor parts made of barium titanate all exhibited a relative permittivity (εr) of 1600 to 2O00 and a dielectric loss tangent (tanθ) of 0.8χ to 1.8χ, and the capacitor parts made of lanthanum titanate had a relative permittivity of 1600 to 2O00. (εr) is 52
〜56、Temperature characteristics: 155PPM/℃〜181PP
It was confirmed that the value was within the range of 100 yen/°C.

また、前記焼成と同時に前記アルミナ系絶縁基体と同一
組成である抗折試験片を焼成し、JISR1601の規
格に準じて該抗折試験片により3点曲げ試験を行い、曲
げ強度が24にg/mm”乃至35Kg/mm2の範囲
内の値であることを確認した。
At the same time as the firing, a bending test piece having the same composition as the alumina-based insulating substrate was fired, and a three-point bending test was performed on the bending test piece in accordance with the JISR1601 standard, and the bending strength was 24 g/ It was confirmed that the value was within the range of 35Kg/mm2 to 35Kg/mm2.

〔以下余白〕[Margin below]

第1表より明らかな様に、アルミナ系絶縁基体の組成中
、Al2O2の含有量が65重量%以下(試料番号78
.79 )または5i02.CaO,MgOの含有量の
いずれかが特許請求の範囲の上限値を越えた場合(試料
番号25,39.47,48.49.54,57.58
,59,60,61.67.6872.73) もしく
は焼成温度が1350℃を越えた場合(試料番号L15
,28,42.62)には、誘電体層が過焼結となるか
もしくは保護層が誘電体層とアルミナ系絶縁基体との反
応を有効に阻止し得なくなり、その結果、誘電体層とア
ルミナ系絶縁基体との反応を生じている。
As is clear from Table 1, the content of Al2O2 in the composition of the alumina-based insulating substrate is 65% by weight or less (sample number 78
.. 79) or 5i02. If either the content of CaO or MgO exceeds the upper limit of the claimed range (sample numbers 25, 39.47, 48.49.54, 57.58
, 59, 60, 61.67.6872.73) or when the firing temperature exceeds 1350℃ (sample number L15
, 28, 42.62), the dielectric layer becomes oversintered or the protective layer cannot effectively prevent the reaction between the dielectric layer and the alumina-based insulating substrate, and as a result, the dielectric layer and A reaction occurs with the alumina-based insulating substrate.

また、前記AhOffの含有量が80ffi1%以上(
試料番号]、2)または“、5iOz、CaO,MgO
の含有量のいずれかが特許請求の範囲の下限値に至らな
い場合(試料番号3,10.11,12,22.23,
24.37.38)もしくは焼成温度が1280℃未満
の場合(試料番号8.19,31゜46.66.76)
にはアルミナ系絶縁基体が焼結不十分となり、絶縁基体
としての機械的強度が得られず使用に耐えられない。
Further, the content of AhOff is 80ffi1% or more (
sample number], 2) or “, 5iOz, CaO, MgO
If any of the contents does not reach the lower limit of the claimed range (sample numbers 3, 10.11, 12, 22.23,
24.37.38) or when the firing temperature is less than 1280°C (sample numbers 8.19, 31°46.66.76)
In this case, the alumina-based insulating substrate is insufficiently sintered, and the mechanical strength as an insulating substrate cannot be obtained, making it unusable.

それらに対して、本発明に係る実験例では、いずれも誘
電体層とアルミナ系絶縁基体との反応を有効に阻止して
おり、絶縁基体としての機械的強度も十分に高く、かつ
コンデンサーとしての電気的特性を十分に満足するもの
であることが確認された。
In contrast, in all of the experimental examples related to the present invention, the reaction between the dielectric layer and the alumina-based insulating substrate was effectively prevented, and the mechanical strength as an insulating substrate was sufficiently high, and it was also It was confirmed that the electrical characteristics were fully satisfied.

尚、本発明に係るアルミナ系絶縁基体上にはスクリーン
印刷法によりAg−Pd系及びCu系の電気配線とRu
zOz系やLaB、系またはSnO□系等の抵抗体を従
来のアルミナ系絶縁基板と同様に形成することが可能で
ある。
Incidentally, on the alumina-based insulating substrate according to the present invention, Ag-Pd-based and Cu-based electrical wiring and Ru
It is possible to form resistors such as zOz-based, LaB-based, SnO□-based, etc. in the same manner as conventional alumina-based insulating substrates.

〔発明の効果〕〔Effect of the invention〕

本発明のコンデンサー内蔵複合回路基板及びその製造方
法によれば、本発明の範囲内の組成となるアルミナ系絶
縁基体をチタン酸バリウム系及び/またはチタン酸ラン
タン系誘電体材料と同時に1280℃乃至1350℃の
焼成温度で焼成一体層することができるとともに、アル
ミナ系絶縁基体と誘電体材料が直接接するのを防止すべ
り該誘電体層の外周部にチタニア、チタン酸カルシウム
、チタン酸マグネシウム、チタン酸ストロンチウムまた
は部分安定化ジルコニアの1種から成る保護層を形成す
ることから、アルミナ系絶縁基体と誘電体材料とが反応
することが一切なく同時に焼成一体層することを可能と
し、コンデンサーとして要求される電気的特性、とりわ
け広範囲のコンデンサー容量を有しかつ基板の機械的強
度を極めて優れたものとなし、その上、該基板表面に電
気配線用導体層及び抵抗体を形成することが可能なコン
デンサー内蔵複合回路基板を得ることができる。
According to the capacitor-embedded composite circuit board and the manufacturing method thereof of the present invention, an alumina-based insulating substrate having a composition within the range of the present invention is heated at 1280°C to 1350°C at the same time as a barium titanate-based and/or lanthanum titanate-based dielectric material. It is possible to form an integral layer by firing at a firing temperature of °C, and at the same time prevent direct contact between the alumina-based insulating substrate and the dielectric material. Alternatively, by forming a protective layer made of one type of partially stabilized zirconia, it is possible to simultaneously sinter the alumina-based insulating substrate and the dielectric material and form them into an integral layer without any reaction. Composite with a built-in capacitor, which has a wide range of capacitor capacities, has an extremely excellent mechanical strength of the board, and can also form a conductor layer for electrical wiring and a resistor on the surface of the board. A circuit board can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のコンデンサー内蔵複合回路基板の一実
施例を示す断面図、第2図は第1図のコンデンサー部の
構成を説明するための一部拡大断面図である。 6・・・・・・下部電極 7・・・・・・誘電体層 特許出願人 (663)京セラ株式会社1、la、lb 2 ・ ・ 3 ・ ・ 4 ・ ・ 5 ・ アルミナ系絶縁基体 コンデンサー部 電気配線用導体層 保護層 上部電極
FIG. 1 is a cross-sectional view showing an embodiment of a composite circuit board with a built-in capacitor according to the present invention, and FIG. 2 is a partially enlarged cross-sectional view for explaining the configuration of the capacitor portion of FIG. 1. 6... Lower electrode 7... Dielectric layer Patent applicant (663) Kyocera Corporation 1, LA, LB 2 ・ ・ 3 ・ ・ 4 ・ ・ 5 ・ Alumina-based insulating base capacitor section Conductor layer protective layer upper electrode for electrical wiring

Claims (1)

【特許請求の範囲】 (1)チタン酸バリウム(BaTiO_3)系及び/又
はチタン酸ランタン(LaTi_2O_3)系セラミッ
クスを誘電体層とし、該誘電体層の外周部に保護層を設
け、該保護層を有する誘電体層の上下面に電極を設けて
コンデンサー部を形成し、該コンデンサー部が、65重
量%<Al_2O_3<80重量% 15重量%≦SiO_2≦25重量% 0.5重量%≦CaO≦5重量% 0.5重量%≦MgO≦5重量% の組成から成るアルミナ(Al_2O_3)系絶縁基体
に内蔵されたことを特徴とするコンデンサー内蔵複合回
路基板。 (2)前記保護層がチタニア(TiO_2)、チタン酸
カルウシム(CaTiO_3)、チタン酸マグネシウム
(MgTiO_3)、チタン酸ストロンチウム(SrT
iO_3)または部分安定化ジルコニア(ZrO_2)
の少なくとも1種から成る特許請求の範囲第1項記載の
コンデンサー内蔵複合回路基板。 (3)絶縁基体の組成が、 65重量%<Al_2O_3<80重量% 15重量%≦SiO_2≦25重量% 0.5重量%≦CaO≦5重量% 0.5重量%≦MgO≦5重量% となる様にセラミックス原料を配合し、該配合物とバイ
ンダーとの混合物をにより成形したグリーンシート上に
下部電極を所定のパターンに印刷する工程と、 前記下部電極上にチタン酸バリウム(BaTiO_3)
系及び/またはチタン酸ランタン(LaTi_2O_5
)系セラミックから成る誘電体パターンを印刷する工程
と、前記誘電体パターンの外周部に保護パターンを印刷
する工程と、 前記保護層の一部と重なりかつ前記誘電体パターン上面
に、上部電極を所定のパターンに印刷してコンデンサー
部を形成する工程と、 前記コンデンサー部を形成した絶縁基体と電気配線用導
体パターンを形成した別の絶縁基体とを交互に積層し、
熱圧着する工程と、大気中で脱バインダーし、次いで1
280℃乃至1350℃の温度にて焼成一体化する工程 とからなることを特徴とするコンデンサー内蔵複合回路
基板の製造方法。 (4)前記保護層がチタニア(TiO_2)、チタン酸
カルシウム(CaTiO_3)、チタン酸マグネシウム
(MgTiO_3)チタン酸ストロンチウム(SrTi
O_3)または部分安定化ジルコニア(ZrO_2)の
少なくとも1種から成る特許請求の範囲第3項記載のコ
ンデンサー内蔵複合回路基板の製造方法。
[Claims] (1) Barium titanate (BaTiO_3)-based and/or lanthanum titanate (LaTi_2O_3)-based ceramics is used as a dielectric layer, a protective layer is provided on the outer periphery of the dielectric layer, and the protective layer is A capacitor portion is formed by providing electrodes on the upper and lower surfaces of the dielectric layer having the following properties: 65 wt%<Al_2O_3<80 wt% 15 wt%≦SiO_2≦25 wt% 0.5 wt%≦CaO≦5 A composite circuit board with a built-in capacitor, characterized in that it is built in an alumina (Al_2O_3)-based insulating substrate having a composition of 0.5% by weight≦MgO≦5% by weight. (2) The protective layer is titania (TiO_2), calcium titanate (CaTiO_3), magnesium titanate (MgTiO_3), strontium titanate (SrT
iO_3) or partially stabilized zirconia (ZrO_2)
A composite circuit board with a built-in capacitor according to claim 1, comprising at least one of the following. (3) The composition of the insulating substrate is as follows: 65% by weight<Al_2O_3<80% by weight, 15% by weight≦SiO_2≦25% by weight, 0.5% by weight≦CaO≦5% by weight, 0.5% by weight≦MgO≦5% by weight. A step of printing a lower electrode in a predetermined pattern on a green sheet formed by blending ceramic raw materials and molding a mixture of the blend and a binder, and printing barium titanate (BaTiO_3) on the lower electrode.
system and/or lanthanum titanate (LaTi_2O_5
) printing a dielectric pattern made of ceramic, printing a protective pattern on the outer periphery of the dielectric pattern, and placing an upper electrode in a predetermined manner on the top surface of the dielectric pattern, overlapping a part of the protective layer. a step of printing a pattern to form a capacitor portion, and alternately laminating an insulating substrate on which the capacitor portion is formed and another insulating substrate on which a conductive pattern for electrical wiring is formed,
The process of heat-compression bonding, debinding in the atmosphere, and then 1
A method for producing a composite circuit board with a built-in capacitor, comprising the step of baking and integrating at a temperature of 280°C to 1350°C. (4) The protective layer is composed of titania (TiO_2), calcium titanate (CaTiO_3), magnesium titanate (MgTiO_3), strontium titanate (SrTi
4. The method for manufacturing a capacitor-embedded composite circuit board according to claim 3, which comprises at least one of O_3) and partially stabilized zirconia (ZrO_2).
JP63274076A 1988-10-28 1988-10-28 Composite circuit board with built-in capacitor and method of manufacturing the same Expired - Fee Related JP2620640B2 (en)

Priority Applications (1)

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JPH02121392A true JPH02121392A (en) 1990-05-09
JP2620640B2 JP2620640B2 (en) 1997-06-18

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19609221C1 (en) * 1996-03-09 1997-08-07 Bosch Gmbh Robert Process for the production of ceramic multilayer substrates
US6734542B2 (en) 2000-12-27 2004-05-11 Matsushita Electric Industrial Co., Ltd. Component built-in module and method for producing the same
JP2007149879A (en) * 2005-11-25 2007-06-14 Kyocera Corp Electronic component sealing substrate, electronic device using same, and electronic device manufacturing method
US20100325881A1 (en) * 2007-12-03 2010-12-30 Peter Tauber method for producing a circuit board layer (circuit level), for an in particular multilayer circuit board (ceramic substrate)
US7932594B2 (en) 2005-11-16 2011-04-26 Kyocera Corporation Electronic component sealing substrate for hermetically sealing a micro electronic mechanical system of an electronic component

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19609221C1 (en) * 1996-03-09 1997-08-07 Bosch Gmbh Robert Process for the production of ceramic multilayer substrates
US6734542B2 (en) 2000-12-27 2004-05-11 Matsushita Electric Industrial Co., Ltd. Component built-in module and method for producing the same
US6939738B2 (en) 2000-12-27 2005-09-06 Matsushita Electric Industrial Co., Ltd. Component built-in module and method for producing the same
US7198996B2 (en) 2000-12-27 2007-04-03 Matsushita Electric Industrial Co., Ltd. Component built-in module and method for producing the same
US7932594B2 (en) 2005-11-16 2011-04-26 Kyocera Corporation Electronic component sealing substrate for hermetically sealing a micro electronic mechanical system of an electronic component
JP2007149879A (en) * 2005-11-25 2007-06-14 Kyocera Corp Electronic component sealing substrate, electronic device using same, and electronic device manufacturing method
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