JPH06310856A - Manufacture of multilayer wiring board - Google Patents

Manufacture of multilayer wiring board

Info

Publication number
JPH06310856A
JPH06310856A JP9931293A JP9931293A JPH06310856A JP H06310856 A JPH06310856 A JP H06310856A JP 9931293 A JP9931293 A JP 9931293A JP 9931293 A JP9931293 A JP 9931293A JP H06310856 A JPH06310856 A JP H06310856A
Authority
JP
Japan
Prior art keywords
conductor
wiring board
multilayer wiring
coating
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9931293A
Other languages
Japanese (ja)
Inventor
Yukihisa Hiroyama
幸久 廣山
Ichiji Minagawa
一司 皆川
Tetsuya Okishima
哲哉 沖島
Takayoshi Yabuki
隆義 矢吹
Kazuhisa Suzuki
和久 鈴木
Tetsuo Takeoka
哲雄 竹岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Kasei Ceramics KK
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Hitachi Kasei Ceramics KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd, Hitachi Kasei Ceramics KK filed Critical Hitachi Chemical Co Ltd
Priority to JP9931293A priority Critical patent/JPH06310856A/en
Publication of JPH06310856A publication Critical patent/JPH06310856A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To provide a method of manufacturing a high density multilayer wiring board having excellent heat resistance as well as high bonding strength to a heat resisting resin film and a conductor circuit. CONSTITUTION:After the formation of the first conductor having a land part on the surface of an insulating substrate (alumina ceramic substrate 1) with a through hole 4 formed therein, the surface of the first conductor excluding the through hole 4 and the land part as well as the exposed surface of the insulating substrate are coated with a heat resisting regin next, after blasting, roughening and ultrasonics sound a cleaning the surface of the heat resisting resin film, the second conductor is formed and after exposing, developing, etching and peeling a resin film, the necessary parts only of the second conductor are left to form a conductor circuit 13.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、高い密着強度を有し、
特にスルーホールを有する、高密度の多層配線板の製造
法に関するものである。
BACKGROUND OF THE INVENTION The present invention has high adhesion strength,
In particular, it relates to a method for manufacturing a high-density multilayer wiring board having through holes.

【0002】[0002]

【従来の技術】近年、電子機器に対する高機能化、高密
度化の要求が高く、これらを構成する配線板においても
高密度化を目的とした多層配線板が使用されている。従
来多層配線板としては、表面に導体回路が形成された複
数の回路板の間に絶縁層としてプリプレグを介在してこ
れらをプレスした後、スルーホールを形成し、該スルー
ホール内にめっきを施して各導体回路間を接続した多層
配線板が使用されていた。
2. Description of the Related Art In recent years, there has been a strong demand for electronic devices to have higher functionality and higher density, and multilayer wiring boards for the purpose of higher density are also used in the wiring boards constituting these. Conventionally, as a multilayer wiring board, a prepreg is interposed as an insulating layer between a plurality of circuit boards each having a conductor circuit formed on the surface thereof and these are pressed, then through holes are formed, and plating is performed in each of the through holes. A multilayer wiring board in which conductor circuits are connected has been used.

【0003】しかし、これらの多層配線板は、複数の導
体回路を形成した後スルーホールを形成して導体回路を
接続しているため、高機能化、高密度化の要求を満たす
のは困難であった。
However, in these multilayer wiring boards, since a plurality of conductor circuits are formed and then through holes are formed to connect the conductor circuits, it is difficult to satisfy the demands for high functionality and high density. there were.

【0004】このような問題点を解消することができる
多層配線板として、最近、導体回路と有機絶縁被膜とを
交互に積層した多層配線板の開発が進められている。こ
のような多層配線板を製造する方法としては、特開昭5
2−5704号公報に示されるような方法がある。この
方法で製造される多層配線板は、絶縁基板上に形成した
耐熱性樹脂被膜の表面に酸化分解可能なゴムないしは合
成ゴムを含む接着剤層を形成後、接着剤層の表面を粗化
し、無電解銅めっきにより導体回路を形成する工程から
構成されている。
As a multilayer wiring board capable of solving such a problem, a multilayer wiring board in which conductor circuits and organic insulating films are alternately laminated has been recently developed. A method for producing such a multilayer wiring board is disclosed in Japanese Patent Laid-Open No.
There is a method as disclosed in Japanese Patent Laid-Open No. 2-5704. The multilayer wiring board manufactured by this method, after forming an adhesive layer containing oxidatively decomposable rubber or synthetic rubber on the surface of the heat-resistant resin film formed on the insulating substrate, the surface of the adhesive layer is roughened, It is composed of a step of forming a conductor circuit by electroless copper plating.

【0005】[0005]

【発明が解決しようとする課題】しかしながら上記の方
法では、接着剤層を形成する作業が必要となり工程が煩
雑になる。多層配線板への半田付け時に生じる熱により
導体回路が剥離する、導体回路の密着強度が低く、微細
配線形成に適用出来ない等の欠点がある。
However, in the above method, the work for forming the adhesive layer is required, and the process becomes complicated. There are drawbacks such that the conductor circuit is peeled off by the heat generated when soldering to the multilayer wiring board, the adhesion strength of the conductor circuit is low, and it cannot be applied to the formation of fine wiring.

【0006】本発明は、上記の欠点のない多層配線板の
製造法を提供するものである。
The present invention provides a method for manufacturing a multilayer wiring board which does not have the above-mentioned drawbacks.

【0007】[0007]

【課題を解決するための手段】本発明はスルーホールが
形成された絶縁基板の表面にランド部を有する第1導体
を形成した後、スルーホール及びランド部を除いた第1
導体の表面と絶縁基板の露出面を耐熱性樹脂で被覆し、
次いで耐熱性樹脂被膜の表面をブラスト処理、粗化、超
音波洗浄後、第2導体を形成し、しかる後露光、現像、
エッチング、レジスト膜を剥離し、第2導体の必要な部
分のみを残して導体回路を形成する多層配線板の製造法
に関する。
According to the present invention, after forming a first conductor having a land portion on a surface of an insulating substrate having a through hole formed therein, a first conductor excluding the through hole and the land portion is formed.
Cover the surface of the conductor and the exposed surface of the insulating substrate with heat resistant resin,
Next, the surface of the heat-resistant resin coating film is blasted, roughened, and ultrasonically cleaned, and then a second conductor is formed, followed by exposure, development, and
The present invention relates to a method for manufacturing a multilayer wiring board in which a conductor circuit is formed by etching, removing a resist film, and leaving only a necessary portion of a second conductor.

【0008】本発明において絶縁基板としては、ガラス
エポキシ基板、ガラスポリイミド基板、アルミナセラミ
ック基板、ガラス基板、窒化アルミニウム基板等が用い
られるが、できるだけ耐熱性の高い材料を用いることが
好ましい。
In the present invention, a glass epoxy substrate, a glass polyimide substrate, an alumina ceramic substrate, a glass substrate, an aluminum nitride substrate, or the like is used as the insulating substrate, but it is preferable to use a material having high heat resistance as much as possible.

【0009】耐熱性樹脂としては、エポキシ樹脂、ポリ
イミド樹脂、フェノール樹脂、アクリル樹脂等が用いら
れるが、これらの樹脂においてスルーホール形成の作業
性の面からスクリーン印刷法で塗布して硬化させる感光
性の樹脂を用いることが好ましい。該耐熱性樹脂被膜の
厚さについては特に制限はないが、作業性の面から10
〜100μm程度であることが好ましい。
Epoxy resin, polyimide resin, phenol resin, acrylic resin and the like are used as the heat resistant resin. In these resins, a photosensitive material is applied and cured by the screen printing method from the viewpoint of workability of forming a through hole. It is preferable to use the above resin. The thickness of the heat resistant resin coating is not particularly limited, but it is 10 from the viewpoint of workability.
It is preferably about 100 μm.

【0010】ブラスト処理に用いる研磨材としては、特
に制限はないが、粒径が#220〜#1000のアルミ
ナ粒を用い、吐出圧力を9.8×104Pa〜3.9×
105Paの条件で処理すれば、耐熱樹脂被膜表面粗さ
を0.2〜10.0μm(Rmax)に自由に制御出来
るので好ましい。
The abrasive used for the blast treatment is not particularly limited, but alumina particles having a particle size of # 220 to # 1000 are used, and the discharge pressure is 9.8 × 10 4 Pa to 3.9 ×.
Treatment under the condition of 10 5 Pa is preferable since the surface roughness of the heat resistant resin coating can be freely controlled to 0.2 to 10.0 μm (Rmax).

【0011】粗化するための粗化液として用いる酸化剤
又は酸としては、クロム酸、クロム酸塩、過マンガン酸
塩の中から選ばれる少なくとも1種以上を含む酸化剤又
は塩酸、硫酸、フッ化水素酸の中から選ばれる少なくと
も1種以上を含む酸溶液等が用いられるが、露出した導
体回路へのエッチング量の比較的少ない過マンガン酸塩
を含む酸化剤溶液を用いることが好ましい。
The oxidizing agent or acid used as a roughening liquid for roughening is an oxidizing agent containing at least one selected from chromic acid, chromate salts and permanganate salts, or hydrochloric acid, sulfuric acid, fluorine. Although an acid solution containing at least one selected from hydrofluoric acid is used, it is preferable to use an oxidant solution containing permanganate, which has a relatively small amount of etching to the exposed conductor circuit.

【0012】超音波洗浄条件については特に制限はない
が、作業性の面で、水又は温度40〜80℃の温水中で
超音波出力300ワット/50リットルの条件で1〜2
0分洗浄することが好ましい。また露光、現像、エッチ
ング及びレジスト膜の剥離については特に制限はなく従
来公知の方法で行われる。
There are no particular restrictions on the ultrasonic cleaning conditions, but from the standpoint of workability, water or warm water having a temperature of 40 to 80 ° C. and an ultrasonic output of 300 watts / 50 liters will be used.
It is preferable to wash for 0 minutes. Further, exposure, development, etching and peeling of the resist film are not particularly limited and may be carried out by conventionally known methods.

【0013】なお本発明においては、必要に応じ第1導
体上部の耐熱性樹脂被膜の一部を除去してビアホールが
形成される。また第1導体及び第2導体としては、C
u、Ni等の金属が用いられ、さらに必要に応じ第2導
体にAuが用いられる。
In the present invention, a via hole is formed by removing a part of the heat resistant resin coating on the first conductor, if necessary. Further, as the first conductor and the second conductor, C
Metals such as u and Ni are used, and if necessary, Au is used for the second conductor.

【0014】[0014]

【実施例】以下本発明の実施例を説明する。 実施例1 図1の(a)に示すように、寸法が80×80mmで、
厚さが0.635mmのアルミナセラミック基板(日立
化成工業製、商品名ハロックス552)1の所定の位置
にレーザー加工により直径が0.6mmのスルーホール
4を形成し、次いで該アルミナセラミック基板1の表面
を従来公知の方法で粗化した後、無電解めっき法で銅被
膜3を形成し、さらに銅被膜3の上面にレジスト膜(図
示せず)を形成し、しかる後、露光、現像、エッチン
グ、レジスト膜を剥離して銅被膜3の必要な部分のみを
残して図1の(b)に示すような内層の導体回路(第1
導体3′)を形成した配線板を得た。
EXAMPLES Examples of the present invention will be described below. Example 1 As shown in FIG. 1A, the dimensions are 80 × 80 mm,
A through hole 4 having a diameter of 0.6 mm is formed by laser processing at a predetermined position of an alumina ceramic substrate (trade name: Harox 552, manufactured by Hitachi Chemical Co., Ltd.) having a thickness of 0.635 mm. After roughening the surface by a conventionally known method, a copper coating 3 is formed by an electroless plating method, a resist film (not shown) is further formed on the upper surface of the copper coating 3, and then exposure, development and etching are performed. , The resist film is peeled off, and only the necessary portions of the copper coating 3 are left, and the conductor circuit of the inner layer as shown in FIG.
A wiring board having the conductor 3 ') formed thereon was obtained.

【0015】次にスルーホール4及びランド部2を除い
た第1導体3′の表面とアルミナセラミック基板1の露
出面に感光性レジストインク(太陽インキ製造製、商品
名PSR−4000−Z404)をスクリーン印刷法で
全面塗布し、さらにその上面にネガフィルム(図示せ
ず)を貼付し、しかる後露光してネガフィルムの透明な
部分の下面に配設した感光性レジストインクを硬化させ
た。次にネガフィルムを取り除き、さらに硬化してない
部分、詳しくは、露光してない部分の感光性レジストイ
ンクを現像して除去し、図1の(c)に示すように、層
間接続用ビアホール6並びにスルーホール4及びランド
部2を除いた部分に耐熱性樹脂被膜5を形成し、オーブ
ン中で150℃で60分間硬化させた。
Next, a photosensitive resist ink (PSR-4000-Z404, manufactured by Taiyo Ink Mfg. Co., Ltd.) is applied to the surface of the first conductor 3'excluding the through hole 4 and the land 2 and the exposed surface of the alumina ceramic substrate 1. The entire surface was applied by a screen printing method, a negative film (not shown) was further attached to the upper surface thereof, and then exposed to cure the photosensitive resist ink provided on the lower surface of the transparent portion of the negative film. Next, the negative film is removed, and the photosensitive resist ink in the unhardened part, more specifically, the unexposed part is developed and removed, and as shown in FIG. Further, a heat resistant resin coating 5 was formed on the portion excluding the through hole 4 and the land portion 2 and cured in an oven at 150 ° C. for 60 minutes.

【0016】次にブラスト機(不二製作所製、商品名S
C−6B)を用いて耐熱性樹脂被膜5及び露出している
第1導体3′の表面を均一にブラスト処理した。なおブ
ラスト処理条件は、研磨材として#600のアルミナ粒
(不二製作所製、商品名WA−600)を用い吐出圧力
19.6×104Paの条件で30秒間処理して図1の
(d)に示すように耐熱性樹脂被膜5の表面粗さが4.
0μm(Rmax)の両面配線板を得た。図1の
(d′)にブラスト処理後の耐熱性樹脂被膜5の表面の
拡大図を示す。
Next, a blast machine (manufactured by Fuji Seisakusho, trade name S
C-6B) was used to uniformly blast the heat-resistant resin coating 5 and the exposed surface of the first conductor 3 '. The blasting treatment was carried out by using # 600 alumina particles (manufactured by Fuji Manufacturing Co., Ltd., trade name WA-600) as an abrasive material under a discharge pressure of 19.6 × 10 4 Pa for 30 seconds, and then, as shown in FIG. ), The heat-resistant resin film 5 has a surface roughness of 4.
A double-sided wiring board of 0 μm (Rmax) was obtained. FIG. 1D 'shows an enlarged view of the surface of the heat resistant resin coating 5 after the blast treatment.

【0017】粗化後上記の両面配線板を脱脂液(日立化
成工業製、商品名HCR−201)中で浸漬洗浄した
後、液温が50℃の粗化液(荏原電産製、商品名パーマ
ンガネート465)中で10分間浸漬して粗化した。水
洗後、液温が30℃の中和液(荏原電産製、商品名ニュ
ートラライザーN−466)に3分間浸漬し、耐熱性樹
脂被膜5の表面を粗化した。粗化した状態を図2の
(e)に示し、また(e′)には耐熱性樹脂被膜5の拡
大図を示す。なお耐熱性樹脂被膜5の表面には反応生成
物(脆弱層)10が生成した。
After roughening, the above-mentioned double-sided wiring board is immersed and washed in a degreasing liquid (Hitachi Chemical Co., Ltd., trade name HCR-201), and then a roughening liquid having a liquid temperature of 50 ° C. (trade name, manufactured by Ebara Densan Co., Ltd.) It was roughened by immersion in permanganate 465) for 10 minutes. After washing with water, the surface of the heat resistant resin coating 5 was roughened by immersing it in a neutralizing solution (product name: Neutralizer N-466, manufactured by Ebara Densan) having a liquid temperature of 30 ° C. for 3 minutes. A roughened state is shown in FIG. 2 (e), and an enlarged view of the heat resistant resin coating 5 is shown in (e '). A reaction product (fragile layer) 10 was formed on the surface of the heat resistant resin film 5.

【0018】次に上記の両面配線板を水道水中に浸漬
し、超音波(出力300ワット)による振動エネルギー
を10分間付与し、耐熱性樹脂被膜5の表面に生成した
反応生成物(脆弱層)10を除去した。この状態を図2
の(f)に示し、また(f′)には耐熱性樹脂被膜5の
拡大図を示す。
Next, the above-mentioned double-sided wiring board is immersed in tap water, and vibration energy by ultrasonic waves (output 300 watts) is applied for 10 minutes to produce a reaction product (fragile layer) formed on the surface of the heat resistant resin coating 5. 10 was removed. This state is shown in Figure 2.
(F), and (f ') is an enlarged view of the heat resistant resin coating 5.

【0019】この後、上記の両面回路板を洗浄し、無電
解Ni−Pめっき(奥野製薬製、商品名TMP化学ニッ
ケル)を10分間行い、図2の(g)に示すように厚さ
0.6μmのNi−P被膜7を形成した。
After that, the above-mentioned double-sided circuit board is washed and electroless Ni-P plating (manufactured by Okuno Seiyaku Co., Ltd., trade name TMP chemical nickel) is performed for 10 minutes, and as shown in FIG. A Ni-P coating 7 having a thickness of 0.6 μm was formed.

【0020】次に濃度10重量%のH2SO4溶液に1分
間浸漬し、水洗後電気Cuめっき(荏原電産製、商品名
PC−606)を30分間行いNi−Pの被膜7の上面
に図2の(h)に示すように厚さ10μmのCu被膜8
を形成して第2導体を得た。
Next, it is immersed in a H 2 SO 4 solution having a concentration of 10% by weight for 1 minute, washed with water, and then electro-Cu plated (PC-606, manufactured by Ebara Densan Co., Ltd.) for 30 minutes, and the upper surface of the Ni-P coating 7 is coated. As shown in FIG. 2 (h), a Cu coating 8 having a thickness of 10 μm is formed.
Was formed to obtain a second conductor.

【0021】この後濃度10重量%のH2SO4溶液で酸
洗後、感光性レジストフィルム(日立化成工業製、商品
名PHT−862AF−40)を前記のCu被膜8上に
全面貼付し、さらにその上面にネガフィルム(図示せ
ず)を貼付し、しかる後露光してネガフィルムの透明な
部分の下面に配設した感光性レジストフィルムを硬化さ
せた。次にネガフィルムを取り除き、さらに硬化してい
ない部分、詳しくは図3の(i)に示すように露光して
いない部分の感光性レジストフィルム9を現像して除去
した。
After this, after pickling with a H 2 SO 4 solution having a concentration of 10% by weight, a photosensitive resist film (PHT-862AF-40, manufactured by Hitachi Chemical Co., Ltd.) was attached on the entire surface of the Cu coating film 8. Further, a negative film (not shown) was attached to the upper surface of the negative film, which was then exposed to cure the photosensitive resist film provided on the lower surface of the transparent portion of the negative film. Next, the negative film was removed, and the photosensitive resist film 9 in the unhardened portion, more specifically, the unexposed portion as shown in FIG. 3 (i) was developed and removed.

【0022】次にCuCl2エッチング溶液を用い、ス
プレーエッチング法でエッチングを行い導体回路として
不必要な部分の第2導体のNi−P被膜7及びCu被膜
8を除去した。次いで濃度5重量%のNaOH溶液で硬
化している感光性レジストフィルムを剥離し、純水で洗
浄後、乾燥して図3の(j)に示すように寸法が2×2
mmの導体回路13を形成した多層配線板(A)を得
た。
Next, etching was performed by a spray etching method using a CuCl 2 etching solution to remove the Ni-P coating 7 and the Cu coating 8 of the second conductor, which are unnecessary portions of the conductor circuit. Then, the photosensitive resist film which has been cured with a NaOH solution having a concentration of 5% by weight is peeled off, washed with pure water and dried to have a size of 2 × 2 as shown in FIG.
A multi-layer wiring board (A) having a conductor circuit 13 of mm was obtained.

【0023】この後、上記で得た多層配線板(A)を脱
脂液(日立化成工業製、商品名HCR−201)で洗浄
し、水洗後濃度10重量%のH2SO4溶液で酸洗し、次
いで濃度10重量%の(NH4228水溶液でソフト
エッチング後、無電解Ni−Pめっきを15分間行い図
3の(k)に示すように厚さ3.0μmのNi−P被膜
11を形成した。なお無電解Ni−Pめっき液は、奥野
製薬製の商品名ニコロン−Uを用い、液温85℃で15
分間めっきを行った。
Thereafter, the multilayer wiring board (A) obtained above was washed with a degreasing liquid (HCR-201, manufactured by Hitachi Chemical Co., Ltd.), washed with water and then pickled with a H 2 SO 4 solution having a concentration of 10% by weight. Then, after soft etching with (NH 4 ) 2 S 2 C 8 aqueous solution having a concentration of 10% by weight, electroless Ni-P plating is performed for 15 minutes, and as shown in (k) of FIG. -P coating 11 was formed. The electroless Ni-P plating solution used was Nicolon-U, a trade name of Okuno Seiyaku, and was used at a liquid temperature of 85 ° C for 15
Plated for minutes.

【0024】Ni−P被膜11を形成した多層配線板
(A)を純水で洗浄後、無電解一次Auめっき(EEJ
A製、商品名レクトロレスST、液温85℃)を15分
間行い図3の(l)に示すように無電解Ni−P被膜1
1の表面に厚さ0.06μmのAu被膜12を形成し
た。次いで純水で洗浄後、無電解二次Auめっき(EE
JA製、商品名レクトロレスMT、液温85℃)を30
分間行い、さらに厚さ0.5μmのAu被膜12を厚付
けした多層配線板(B)を得た。
After washing the multilayer wiring board (A) having the Ni-P coating film 11 with pure water, electroless primary Au plating (EEJ) is performed.
Electroless Ni-P coating 1 as shown in FIG.
An Au coating 12 having a thickness of 0.06 μm was formed on the surface of No. 1. Then, after washing with pure water, electroless secondary Au plating (EE
Made by JA, product name RECTROLES MT, liquid temperature 85 ℃) 30
After that, a multilayer wiring board (B) having a 0.5 μm-thick Au coating 12 applied thereon was obtained.

【0025】次にAu被膜12を厚付けした多層配線板
(B)20ケを使用し、プル試験法により密着強度を測
定した。以下比較例においても同様の方法で密着強度を
測定した。その結果22〜28MPaの範囲で、平均値
25MPaの密着強度を示し良好であった。また外観を
観察したが導体回路にふくれは見られなかった。
Next, the adhesion strength was measured by the pull test method using 20 pieces of the multilayer wiring board (B) having the Au coating 12 thickened. In the following comparative examples, the adhesion strength was measured by the same method. As a result, in the range of 22 to 28 MPa, the adhesion strength was an average value of 25 MPa, which was good. Moreover, the appearance was observed, but no blister was observed in the conductor circuit.

【0026】さらに、実施例1で得られた多層配線板
(B)20ケを240℃に加熱溶融した6:4はんだ
(Pb:Sn=6:4)中に5秒間浸漬した後引上げ、
再度5秒間浸漬するという工程を5回繰り返し、プル試
験法により密着強度を測定した。その結果20〜27M
Paの範囲で、平均値25MPaの密着強度を示し良好
であった。また外観を観察したが導体回路にふくれは見
られなかった。
Furthermore, 20 pieces of the multilayer wiring board (B) obtained in Example 1 were immersed in 6: 4 solder (Pb: Sn = 6: 4) which was heated and melted at 240 ° C. for 5 seconds and then pulled up.
The process of immersing again for 5 seconds was repeated 5 times, and the adhesion strength was measured by the pull test method. As a result, 20-27M
Within the range of Pa, the adhesive strength was good, showing an average value of 25 MPa. Moreover, the appearance was observed, but no blister was observed in the conductor circuit.

【0027】比較例1 実施例1における粗化後の超音波洗浄による反応生成物
を除去する工程を除いた以外は、実施例1と同様の工程
を経てAu被膜を厚付けした多層配線板を得た。
Comparative Example 1 A multilayer wiring board having a thickened Au film was obtained through the same steps as in Example 1 except that the step of removing the reaction product by ultrasonic cleaning after roughening in Example 1 was omitted. Obtained.

【0028】得られた多層配線板の密着強度を測定した
ところ、0〜15MPaの範囲で、平均値が6MPaと
弱く、ばらつきが大きかった。また外観を観察したとこ
ろ導体回路の所々に微小なふくれが発生していた。なお
実施例1と同様の方法で行った半田耐熱後の密着強度
は、導体回路に微小なふくれが発生したため測定はしな
かった。
When the adhesion strength of the obtained multilayer wiring board was measured, the average value was as weak as 6 MPa in the range of 0 to 15 MPa, and the variation was large. In addition, when the appearance was observed, minute blisters were found in some parts of the conductor circuit. The adhesion strength after soldering heat resistance, which was performed in the same manner as in Example 1, was not measured because a minute swelling occurred in the conductor circuit.

【0029】比較例2 実施例1におけるブラスト処理工程を除いた以外は、実
施例1と同様の工程を経てAu被膜を厚付けした多層配
線板を得た。
Comparative Example 2 A multilayer wiring board having a thick Au coating was obtained through the same steps as in Example 1 except that the blasting step in Example 1 was omitted.

【0030】得られた多層配線板の密着強度を測定した
ところ、0〜16MPaの範囲で、平均値が6MPaと
弱く、ばらつきが大きかった。また外観を観察したとこ
ろ導体配線の所々に微小なふくれが発生していた。なお
実施例1と同様の方法で行った半田耐熱後の密着強度
は、導体回路に微小なふくれが発生したため測定はしな
かった。
When the adhesion strength of the obtained multilayer wiring board was measured, the average value was as weak as 6 MPa in the range of 0 to 16 MPa, and the variation was large. In addition, when the appearance was observed, minute swelling occurred in the conductor wiring. The adhesion strength after soldering heat resistance, which was performed in the same manner as in Example 1, was not measured because a minute swelling occurred in the conductor circuit.

【0031】[0031]

【発明の効果】本発明によれば、耐熱性樹脂被膜と導体
回路との密着強度が高く、しかも密着強度のばらつきが
小さく、耐熱性に優れた高密度の多層配線板を安価に製
造することができる。
According to the present invention, it is possible to inexpensively manufacture a high-density multilayer wiring board having a high adhesion strength between a heat-resistant resin film and a conductor circuit, a small variation in the adhesion strength, and an excellent heat resistance. You can

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)〜(d)は本発明の実施例における多層
配線板の製造作業状態を示す断面図である。
1 (a) to 1 (d) are cross-sectional views showing a manufacturing operation state of a multilayer wiring board in an example of the present invention.

【図2】(e)〜(h)は本発明の実施例における多層
配線板の製造作業状態を示す断面図である。
2 (e) to (h) are cross-sectional views showing a manufacturing operation state of the multilayer wiring board in the example of the present invention.

【図3】(i)〜(l)は本発明の実施例における多層
配線板の製造作業状態を示す断面図である。
3 (i) to (l) are cross-sectional views showing a manufacturing operation state of the multilayer wiring board in the example of the present invention.

【符号の説明】[Explanation of symbols]

1 アルミナセラミック基板 2 ランド部 3 Cu被膜 3′第1導体 4 スルーホール 5 耐熱性樹脂被膜 6 ビアホール 7 Ni−P被膜 8 Cu被膜 9 感光性レジストフィルム 10 反応生成物 11 Ni−P被膜 12 Au被膜 13 導体回路 1 Alumina Ceramic Substrate 2 Land Part 3 Cu Coating 3'First Conductor 4 Through Hole 5 Heat Resistant Resin Coating 6 Via Hole 7 Ni-P Coating 8 Cu Coating 9 Photosensitive Resist Film 10 Reaction Product 11 Ni-P Coating 12 Au Coating 13 conductor circuit

───────────────────────────────────────────────────── フロントページの続き (72)発明者 沖島 哲哉 茨城県勝田市大字足崎字西原1380番地1 日立化成セラミックス株式会社内 (72)発明者 矢吹 隆義 茨城県勝田市大字足崎字西原1380番地1 日立化成セラミックス株式会社内 (72)発明者 鈴木 和久 茨城県勝田市大字足崎字西原1380番地1 日立化成セラミックス株式会社内 (72)発明者 竹岡 哲雄 茨城県勝田市大字足崎字西原1380番地1 日立化成セラミックス株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tetsuya Okishima 1380 Nishihara, Katsuta City, Ibaraki Prefecture 1380 Nishihara, Hitachi Chemical Co., Ltd. (72) Takayoshi Yabuki 1380 Nishihara, Katsuda City, Ibaraki Prefecture 1380 Nishihara, Hitachi Within Kasei Ceramics Co., Ltd. (72) Inventor Kazuhisa Suzuki, 1380 Nishihara, Katsuta-shi, Ibaraki, Osaka, 1380 Hitachi Chemicals Co., Ltd. (72) Tetsuo Takeoka 1380 Nishihara, Katsuta, Ibaraki, Nishihara, Hitachi 1 Within the corporation

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 スルーホールが形成された絶縁基板の表
面にランド部を有する第1導体を形成した後、スルーホ
ール及びランド部を除いた第1導体の表面と絶縁基板の
露出面を耐熱性樹脂で被覆し、次いで耐熱性樹脂被膜の
表面をブラスト処理、粗化、超音波洗浄後、第2導体を
形成し、しかる後露光、現像、エッチング、レジスト膜
を剥離し、第2導体の必要な部分のみを残して導体回路
を形成することを特徴とする多層配線板の製造法。
1. A first conductor having a land portion is formed on the surface of an insulating substrate having a through hole, and the surface of the first conductor excluding the through hole and the land portion and the exposed surface of the insulating substrate are heat-resistant. After coating the surface of the heat-resistant resin film with a resin, blasting, roughening and ultrasonic cleaning the second conductor, and then exposing, developing, etching, peeling the resist film, and the need for the second conductor. A method for manufacturing a multilayer wiring board, characterized in that a conductor circuit is formed by leaving only the above portions.
JP9931293A 1993-04-26 1993-04-26 Manufacture of multilayer wiring board Pending JPH06310856A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9931293A JPH06310856A (en) 1993-04-26 1993-04-26 Manufacture of multilayer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9931293A JPH06310856A (en) 1993-04-26 1993-04-26 Manufacture of multilayer wiring board

Publications (1)

Publication Number Publication Date
JPH06310856A true JPH06310856A (en) 1994-11-04

Family

ID=14244126

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9931293A Pending JPH06310856A (en) 1993-04-26 1993-04-26 Manufacture of multilayer wiring board

Country Status (1)

Country Link
JP (1) JPH06310856A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7622183B2 (en) 1998-02-26 2009-11-24 Ibiden Co., Ltd. Multilayer printed wiring board with filled viahole structure
KR20200030111A (en) * 2017-07-26 2020-03-19 게부르. 쉬미트 게엠베하 Method, device and system for manufacturing a printed circuit board

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7622183B2 (en) 1998-02-26 2009-11-24 Ibiden Co., Ltd. Multilayer printed wiring board with filled viahole structure
US7737366B2 (en) 1998-02-26 2010-06-15 Ibiden Co., Ltd. Multilayer printed wiring board with filled viahole structure
US8115111B2 (en) 1998-02-26 2012-02-14 Ibiden Co., Ltd. Multilayer printed wiring board with filled viahole structure
US8987603B2 (en) 1998-02-26 2015-03-24 Ibiden Co,. Ltd. Multilayer printed wiring board with filled viahole structure
KR20200030111A (en) * 2017-07-26 2020-03-19 게부르. 쉬미트 게엠베하 Method, device and system for manufacturing a printed circuit board
JP2020528219A (en) * 2017-07-26 2020-09-17 ゲブリューダー シュミット ゲゼルシャフト ミット ベシュレンクテル ハフツング Methods, devices and systems for manufacturing printed circuit boards
US11963306B2 (en) 2017-07-26 2024-04-16 Gebr. Schmid Gmbh Apparatus for manufacturing printed circuit boards

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