JP3593351B2 - Method for manufacturing multilayer wiring board - Google Patents

Description

先ず、上記（イ）〜（ハ）と適量の溶剤（エチルセロソルブ）を混合し、８０℃で３０分間加熱撹拌した。次に、樹脂組成物を常温にした後、他の成分（ニ）〜（ト）を混合し三本ロールにて混練し、絶縁樹脂を得た。
【００４９】
次いで、図１（ｃ）に示すように、ビアホールのパターンが形成されたネガマスクを介して４００ｗ高圧水銀ランプを用い２分間ＵＶ光で露光し、現像により所望部にビアホール１０３を形成した。本実施例では、現像液に１．１．１．トリクロロエタンを用い１分間スプレー現像を行って、孔径約１００ミクロンのビアホール１０３を得た。
【００５０】
次いで、図１（ｄ）に示すように、ビアホール部の表面に、後工程の粗化液から露出した回路表面を守り、導通不良、層間接続不良を防ぐために耐粗化液性を有する導電性保護膜１０４を下記の無電解めっき液組成及び条件に従って形成した。保護膜１０４としては、Ｎｉ−Ｐ、もしくはＮｉ−Ｂの無電解めっきを用いた。図３にＣｕとＮｉ−Ｐとの耐粗化液性について比較した一例を示す。なお、図３にはＮｉ−Ｂの例を載せていないがＮｉ−Ｐと同様の特性を示した。
【００５１】
〈めっき液組成及び条件〉
（１）触媒処理液
硫酸水溶液 １０ｖｏｌ％
硫酸パラジウム ０．２ｇ／ｌ
液温 室温
浸漬時間 １分
（２）無電解ニッケルめっき液
ブルーシューマー＊（Ｎｉ−Ｐ） 原液使用
液温 ８０℃
めっき時間 ５分
＊カニゼン社製のめっき液に対する商品名
次いで、図１（ｅ）に示すように、絶縁樹脂層１０２と後工程の下地導電膜との接着強度を確保するために、樹脂層１０２の表面粗化処理を行い、粗化面１０２´を形成した。絶縁樹脂層表面の粗化処理方法としては、液温５０〜８０℃で、図２に示すような斜線部内の条件、すなわち、硫酸（３．６〜６ｍｏｌ／ｌ）水溶液と無水クロム酸（硫酸濃度に対する溶解度範囲内で２ｍｏｌ／ｌ以上、飽和点濃度以下）を含む処理液に３分〜１０分間浸漬し、後にアルカリ水溶液に５〜１０分間浸漬して中和処理を行ない表面劣化層残渣を取り除いた。
【００５２】
次に、図１（ｆ）に示すように下地導電膜１０５（膜厚０．１〜０．５ミクロン）を形成した。本実施例では保護膜１０４の表面を含む絶縁樹脂表面１０２´にパラジウム触媒を付与し活性を行ない、下記の処理条件で無電解めっき法による下地導電膜形成を行なった。
【００５３】
〈処理液及び処理条件〉
（１）触媒処理液（何れもシップレー社製の商品名で表示）
▲１▼キャタプリップ４０４ （２７０ｇ／ｌ） ３０℃、３分
▲２▼キャタプリップ４０４ （２７０ｇ／ｌ） ４０℃、５分
キャタポジット４４ （３０ｍｌ／ｌ）
▲３▼アクセレータ （１７０ｍｌ／ｌ） 室温、３分
（２）下地導電膜（何れもシップレー社製の商品名で表示）
カッパーミックス ３２８Ａ （１２５ｍｌ／ｌ） 室温、１分
カッパーミックス ３２８Ｌ （１２５ｍｌ／ｌ）
カッパーミックス ３２８Ｃ （２５ｍｌ／ｌ）
次いで、絶縁樹脂層１０２を完全硬化するため１５０℃で３０分間加熱硬化を行った。
【００５４】
次に、図１（ｇ）に示すように厚付け電気銅めっき１０６を下記の処理液及び処理条件で行った。
【００５５】
〈処理液及び処理条件〉
（１）銅めっき前処理
ニュートラクリーン＊ （５０ｖｏｌ％） 室温、３分
硫酸洗浄 （１０ｖｏｌ％） 室温、１分
＊シップレー社製の界面活性剤の商品名
（２）厚付け電気銅めっき
ＣｕＳＯ_４・５Ｈ_２Ｏ （７５ｍｌ／ｌ）
Ｈ_２ＳＯ_４ （９８ｍｌ／ｌ）
ＨＣｌ （０．１５ｍｌ／ｌ）
Ｃｕ−ボードＨＡメーキャップ＊（１０ｍｌ／ｌ）
液温 室温
電流密度 ２Ａ／ｄｍ^２
めっき厚さ ２０ミクロン
＊（株）荏原ユージライト製の界面活性剤に対する商品名
次いで、図１（ｈ）に示すように常法により基板に感光性エッチングドライフィルムをラミネートし、所定のマスクパターンを介して露光し、現像、エッチング、剥離の各工程により、絶縁樹脂層上に幅約５０ミクロンの回路パターンを形成し、不要な回路間の触媒を除去し第二の配線層１０５´、１０６´を形成した。なお、触媒の除去は、５ｗｔ％ＮａＯＨの強アルカリ水溶液に１０分間浸漬して行った。触媒の残渣については、螢光Ｘ線分析で、Ｓｎ、Ｐｄに相当するピークのカウント数で測定でき、図４に示すように約１０分程度で除去できることがわかった。すなわち、図４は５０℃におけるＳｎ、Ｐｄの付着量と浸漬時間との関係を示したものである。
【００５６】
この後、第三の配線層形成についても、上記図１（ｂ）の絶縁樹脂層１０２の形成から図１（ｈ）の第二の配線層を形成する工程までを繰返すことにより、三層構造の多層配線基板を製造した。
【００５７】
本実施例の多層配線基板の特性評価については、各実施例共に共通して主に重要な絶縁層に関連した下記の項目に従って判定した。
１）現像性：１，１，１，トリクロロエタンあるいは他の溶剤のスプレー現像を常温で１分間行った際、未露光部が完全に溶解し、かつ、露光部の樹脂に膨潤等がない正テーパのフォトビアホールが形成できたものを良とした。
２）耐熱性：２６０℃のはんだ槽に１０秒間浸漬して、室温まで空冷する。この操作を５回繰り返した後の観察で、樹脂に膨れ、剥離、あるいは、めっき皮膜のクラック、膨れ、剥離等の異常が無いものを良とした。
３）絶縁性：吸湿時の基板の絶縁抵抗が１０^１０Ω以上となるものを良とした。
４）接着性：回路パターンと樹脂層との接着性をはかるのが目的であり、電気銅めっき工程後、１ｃｍ幅にナイフで切り込み、９０度に引き剥がしたときのピール強を測定した。また、実用性を加味し目標値を５００ｇ／ｃｍと定めることとした。
【００５８】
以上の項目に従って多層配線基板の特性について評価を行った結果を表１に示す。これから明らかなように得られた多層配線板は、いずれの評価項目についても優れていることがわかった。
【００５９】
【表１】

【００６０】
〈実施例２〉
層間絶縁膜として実施例１と同様の絶縁樹脂を用い、図５に示す工程に従って多層配線基板を製造した。この実施例の特徴は、第一の配線層から第三の配線層まで、全ての配線層をビルドアップ法により積層したことにある。
先ず、図５（ａ）に示すように、ガラス布基材にエポキシ樹脂を含浸固化した積層板（８０ｍｍ×８０ｍｍ×厚さ０．６ｍｍ）を基板として準備した。
次いで、図５（ｂ）に示すように、この基板上にスプレーコータで厚さ約５０ミクロン塗布し、８０℃で３０分間の予備乾燥を施し、絶縁樹脂層１０２を形成した。
【００６１】
次いで、図５（ｃ）に示すように、４００ｗ高圧水銀ランプを用い２分間ＵＶ光で露光し、絶縁樹脂層１０２を光硬化することにより半硬化状態とした。この状態で粗化液を用いて絶縁樹脂層１０２の表面粗化処理を行い、粗化面１０２´を形成した。なお、絶縁樹脂層１０２の表面粗化処理方法は、実施例１と同様である。
【００６２】
次いで、図５（ｄ）に示すように、樹脂層を完全硬化するため１５０℃で３０分間加熱硬化を行った。次に、粗化層表面１０２´を活性化するため触媒液に浸漬し、下地導電膜１０５を無電解めっきし、後に厚付け電気銅めっき１０６を施した。処理液及び処理条件は下記に示す通りである。
【００６３】
〈処理液及び処理条件〉
（１）触媒処理液（何れもシップレー社製の商品名で表示）
▲１▼キャタプリップ４０４ （２７０ｇ／ｌ） ４５℃、３分
▲２▼キャタプリップ４０４ （２７０ｇ／ｌ） ４５℃、５分
キャタポジット４４ （３０ｍｌ／ｌ）
▲３▼アクセレータ （１７０ｍｌ／ｌ） 室温、３分
（２）下地導電膜の無電解めっき液（何れもシップレー社製の商品名で表示）
カッパーミックス ３２８Ａ （１２５ｍｌ／ｌ） 室温、１分
カッパーミックス ３２８Ｌ （１２５ｍｌ／ｌ）
カッパーミックス ３２８Ｃ （２５ｍｌ／ｌ）
（３）銅めっき前処理
ニュートラクリーン （５０ｖｏｌ％） 室温、３分
硫酸洗浄 （１０ｖｏｌ％） 室温、１分
（３）厚付け電気銅めっき液及びめっき条件
ＣｕＳＯ_４・５Ｈ_２Ｏ （７５ｍｇ／ｌ）
Ｈ_２ＳＯ_４ （９８ｍｌ／ｌ）
ＨＣｌ （０．１５ｍｌ／ｌ）
Ｃｕ−ボードＨＡメーキャップ（１０ｍｌ／ｌ）
液温 室温
電流密度 ２Ａ／ｄｍ^２
めっき厚さ ２０μｍ
以上、上記処理条件によりめっき処理を行った。
【００６４】
次いで、図５（ｅ）に示すように、常法により基板のめっき膜上に感光性エッチングドライフィルムをラミネートし、所定の回路パターンが形成されたマスクを介して露光し、現像、エッチング、剥離の各工程を経て、絶縁樹脂層上に幅約１００ミクロンの第一の配線層となる回路パターン１０１を形成した。
次いで、不要な回路間（エッチングにより露出した絶縁層）の触媒を除去するために、５ｗｔ％ＮａＯＨの強アルカリ水溶液に１０分間浸漬した。
【００６５】
以下、第二の配線層及び第三の配線層形成についても図５（ｆ）〜図５（ｈ）に示すように、それぞれ実施例１と同様の工程を繰返し、三層の多層配線基板を製造した。
【００６６】
実施例１と同様、得られた多層配線基板の特性について評価を行った結果を表２に示す。実施例１の場合と同様に、いずれの試料についても優れた特性を有していることがわかった。
【００６７】
【表２】

【００６８】
〈実施例３〉
層間絶縁膜として実施例１と同様の絶縁樹脂を用い、実施例１と同様の工程で多層配線基板を製造した。ただし、製造工程上実施例１と異なる点は、絶縁樹脂層を完全硬化するための、１５０℃で３０分間の加熱硬化処理を実施例１とは逆に下地導電膜１０５の形成工程前に行ったことである。つまり、この例は粗化処理後の絶縁樹脂層を完全に硬化するタイミングが下地導電膜１０５の形成工程前後でどのように変化するかを調べるために行ったものである。
【００６９】
実施例１と同様にして、得られた多層配線基板の特性について評価を行った結果を表３に示す。この場合も良好な結果が得られているが、接着性については、実施例１の場合よりも少し低下しているものが認められた。従って、加熱により絶縁樹脂層を完全に硬化するタイミングは、下地導電膜１０５を形成した後の方が好ましいことを示している。例えば、表１の粗化条件３の試料（実施例１）と表３の粗化条件２１の試料（実施例３）とを対比してみると、前者は８７３ｇ／ｃｍであったのに対して、後者は８２５ｇ／ｃｍであった。
【００７０】
【表３】

【００７１】
〈実施例４〉
層間絶縁膜として実施例１と同様の絶縁樹脂を用い、実施例１と同様の工程で多層配線基板を製造した。ただし、製造工程上実施例１と異なる点は、下地導電膜１０５を無電解銅めっきとした代わりに、無電解ニッケルめっきとした点である。つまり、この例は下地導電膜１０５の材質の違いが接着力にどのような影響を与えるかを調べるために行ったものである。用いた無電解ニッケルめっき液（２種類）及びめっき条件は下記の通りである。
【００７２】
〈無電解ニッケルめっき液及びめっき条件〉
（１）無電解ニッケルめっき液▲１▼
ＳＢ−５５ （Ｎｉ−Ｂ）＊ 原液使用
液温 ６０℃
めっき時間 １分
（２）無電解ニッケルめっき液▲２▼
ブルーシューマー（Ｎｉ−Ｐ）＊ 原液使用
液温 ８０℃
めっき時間 １分
＊何れもカニゼン社製めっき液の商品名
実施例１と同様にして、得られた多層配線基板の特性について評価を行った結果を表４に示す。いずれの試料も優れた特性を有していることがわかった。特に、下地導電膜１０５を銅で形成したときより、ニッケルを用いた方が絶縁樹脂との接着強度が大きい傾向にあることがわかった。これは、銅よりニッケルの方が硬いためと考える。例えば、表１の粗化条件５の試料（実施例１）と表４の粗化条件２９の試料（実施例４）とを対比してみると、前者は９５６ｇ／ｃｍであったのに対して、後者は１６４５ｇ／ｃｍであった。
【００７３】
【表４】

【００７４】
〈実施例５〉
層間絶縁膜として実施例１と同様の絶縁樹脂を用い、実施例１と同様の工程で多層配線基板を製造した。ただし、製造工程上実施例１と異なる点は、絶縁樹脂層１０２の表面粗化処理方法において、前工程としてドライで表層をエッチングする工程を付加したことにある。ここでは、前工程としてＯ_２プラズマアッシャ及びＵＶ／Ｏ_３処理の二通りの工程付加し、次いで、実施例１と同様にクロム硫酸系の処理液で粗化を行った。前処理工程として用いたドライエッチング装置及び条件は次の通りである。
【００７５】
（１）Ｏ_２プラズマアッシャ（アネルバ社製のＤＥＭ−４５１Ｍを使用）
Ｏ_２流量 ５０ｓｃｃｍ
ガス圧 １０Ｐａ
ＰＦパワー ３００Ｗ
セルブバイアス −７１０Ｖ
処理時間 ５〜２０ｍｉｎ
（２）ＵＶ／Ｏ_３処理
Ｏ_３流量 ８ＮＬ／ｍｉｎ
一時電流 ５Ａ
温度 １６０℃±１０
ランプからの距離 １５ｃｍ
処理時間 ５〜２０ｍｉｎ
実施例１と同様にして、得られた多層配線基板の特性について評価を行った結果を表５に示す。いずれの試料も優れた特性を有していることがわかった。接着性について実施例１の表１と比較して見ると、例えば表１の粗化条件８の試料（実施例１）は１５２９ｇ／ｃｍであったのに対して、本実施例の粗化条件３７の試料では１５４０ｇ／ｃｍ、粗化条件４１の試料では１６００ｇ／ｃｍであり、いずれもドライエッチングの前処理工程を付加した場合の方が優れている。
【００７６】
【表５】

【００７７】
〈実施例６〉
この例は、実施例１と基本的に同一工程で製造したものであるが、ビアホール形成工程時のＵＶ露光条件を一部変更したものである。すなわち、実施例１の図１（ｃ）に示したＵＶ光よる露光、現像により所望部にビアホール１０３を形成した後、再度絶縁樹脂層１０２の全面にわたり２分間ＵＶ光を露光し、絶縁樹脂中に含まれる光硬化成分を全て硬化した。その結果、実施例１におけるビアホール１０３の正テーパ歩留まりが９０％であったものが、１００％に向上した。
【００７８】
ビアホール１０３の形状が正テーパから外れて逆テーパになると、この後の導電性保護膜１０４、下地導電膜１０５、厚つけめっき膜１０６等のめっき工程での歩留まりが低下したり、ビアホール１０３が当初の設計パターン幅より大きくなり、線幅が実質的に拡張されて高精細パターンの実現を困難にする等の問題を生じさせるが、正テーパとすることにより格段に信頼性の高い配線導体を形成することができる。
【００７９】
〈比較例１〉
層間絶縁膜として実施例１と同様の絶縁樹脂を用い、実施例１と同様の工程で多層配線基板を製造した。ただし、実施例１と異なる点は、絶縁樹脂層を１５０℃で３０分間で完全硬化させた後に、粗化処理を行ったことである。すなわち、粗化処理工程のタイミングを樹脂の半硬化状態でなく、完全硬化後としものである。
【００８０】
実施例１と同様、得られた多層配線基板の特性について評価を行い、その結果を表６の粗化条件の試料４３〜４６、４９、５０に示す。表から明らかなように、この工程で製造した多層配線板は、評価項目１）の現像性については、優れた特性であったものの、それ以外の２）〜４）の項目については、いずれも粗化処理時間が１時間以下で不良となった。これは、実施例１と比較し、接着強度が格段に弱いためである。また、粗化時間（処理液浸漬時間）を長くすれば、不十分ではあるが、ある程度の強度がでる。これは、絶縁樹脂を完全硬化したため、耐薬品性が向上し、粗化し難くなったためと考えられる。さらには、これらの結果から、本発明により、粗化面形成時間の短縮に有効であることもわかった。また、熱硬化を全くおこなわないものについては、評価項目１）のみが良好なだけであることがわかった。
【００８１】
【表６】

【００８２】
〈比較例２〉
層間絶縁膜として実施例１と同様の絶縁樹脂を用い、実施例１と同様の工程で多層配線基板を製造した。ただし、実施例１と異なる点は、保護膜１０４を形成せずに樹脂の粗化を行なったことである。実施例１と同様、基板特性について評価を行い、その結果を表６の粗化条件の試料４７、４８、５１に示す。しかし、いずれの試料も粗化処理工程の段階でビアホール１０３内に露出した回路パターンあるいは層間接続部の銅めっきが溶解し接続不良となった。
【００８３】
〈比較例３〉
層間絶縁膜として実施例１と同様の工程で多層配線基板を製造した。ただし、実施例１と異なる点は、（１）用いた樹脂の熱硬化剤が酸無水物を用いたもの、また、（２）用いた樹脂の組成が光硬化成分のみであるものについて、それぞれ、実施例１と同様に、得られた多層配線基板の特性について評価を行った。用いた２種類の絶縁樹脂の組成は、以下の通りである。
【００８４】
（１）樹脂組成物
（イ）ジアリルフタレート樹脂 １００ｇ
（ロ）エピコート８２８＊ ３０ｇ
（ハ）ペンタエリスリトールトリアクリレート ２０ｇ
（ニ）ベンゾインイソプロピルエーテル ４ｇ
（ホ）無水ピロメリット酸＊＊ １０ｇ
（ヘ）その他（塗布特性向上のための添加剤） 適量
＊シェル石油社製のエポキシ樹脂の商品名
＊＊熱硬化剤（酸無水物）
（２）樹脂組成物
（イ）ジアリルフタレート樹脂 １００ｇ
（ロ）ペンタエリスリトールトリアクリレート ２０ｇ
（ハ）ベンゾインイソプロピルエーテル ４ｇ
（ニ）その他（塗布特性向上のための添加剤） 適量
この比較例で製造された多層配線板は、評価項目１）の現像性については、優れた特性であったものの、それ以外の２）〜４）の項目については、いずれも不良となった。これは、実施例１と比較し、接着強度が弱いためである。これらの結果から、本発明による特定の熱硬化剤の重要性、さらには光硬化性成分のみならず、熱硬化性樹脂成分の重要性が明らかとなった。
【００８５】
【発明の効果】
以上説明したように、本発明により所期の目的を達成することができた。すなわち、絶縁基板上に形成される導電膜の接着力が強く、信頼性の高い、高密度多層配線基板が容易に製造することができるようになった。
【図面の簡単な説明】
【図１】本発明の原理及び一実施例を説明するための製造工程を示した要部断面図。
【図２】同じく絶縁樹脂層の表面を粗化処理する粗化液の条件を示した特性図。
【図３】同じく導電性保護膜の耐粗化液性の一例を示す特性図。
【図４】同じく配線パターン形成後の触媒除去効果を示す特性図。
【図５】同じく他の実施例の製造工程を示した要部断面図。
【符号の説明】
１００…両面銅張り積層板、 １０１…回路パターン、
１０２…絶縁樹脂層、 １０２´…絶縁樹脂層の粗化面、
１０３…バイヤホール、 １０４…導電性保護膜、
１０５、１０５´…下地導電膜、１０６、１０６´…めっき導電膜。[0001]
[Industrial applications]
The present invention relates to a method for manufacturing a multilayer wiring board having an interlayer insulating film.
[0002]
[Prior art]
As electronic devices become more sophisticated and semiconductor devices become more highly integrated, printed circuit boards are also required to have higher densities. At present, multilayer wiring boards having interlayer insulating films are the mainstream. As a method of manufacturing a multilayer printed wiring board, there are broadly known two methods, a lamination bonding method and a build-up method.
[0003]
As a lamination bonding method, for example, as disclosed in JP-A-62-205690, a plurality of insulating substrates having a predetermined conductive pattern formed on one or both surfaces are protected by protecting the conductive pattern, interlayer insulation, and interlayer insulation. Laminated via a prepreg that plays the role of bonding, formed by pressing to form a multilayer printed wiring board, and through holes are provided in places where there is a need to connect and conduct between the conductive patterns of each layer, and inside this through hole In general, a method of conducting between layers by plating is used. Further, since the through hole is formed by a drill, the diameter of the through hole is limited to about 200 microns.
[0004]
On the other hand, as various types of consumer electronic devices have become smaller and thinner, the space for accommodating wiring boards constituting a predetermined electric circuit has become very limited. In order to accommodate a wiring board constituting a desired electric circuit, a multilayer printed wiring board also needs to be thinned and densified by a build-up method.
[0005]
As a conventional build-up method, for example, as disclosed in JP-A-57-72398, a first-layer circuit is formed by etching a copper-clad laminate plated with through holes, and an interlayer is formed while leaving a land portion. After performing masking with an insulating resin to be an insulating film and printing a conductive paste ink thereon to form a circuit, a chemical copper plating film is formed on the conductive paste ink and in a through hole to form a second layer. Form a wiring circuit. There is a method of forming a multilayer by repeating the process of forming the second-layer wiring circuit a plurality of times.
[0006]
[Problems to be solved by the invention]
However, since the conventional laminating method involves laminating via a prepreg and molding by pressing, manufacturing costs are increased due to equipment and material costs, and the alignment of each layer is difficult, and it is difficult to form a multilayer. It is. In addition, through holes are drilled in places where there is a need to connect and conduct between the conductive patterns of each layer, and through holes are plated in these through holes to achieve conduction. There was a drawback that it hindered densification.
[0007]
On the other hand, although the cost is certainly reduced by the build-up method, since the conductive paste is applied by printing, formation of fine wiring is difficult, and adhesion between the conductive paste and the plating film is difficult. is there. With respect to the adhesiveness between the base material or the interlayer insulating film and the plating film, a method for improving the adhesiveness can be found in, for example, Japanese Patent Publication No. 55-48715. In this method, a rubber-modified product in the adhesive has a strong oxidizing power. Since etching is performed with chromic sulfuric acid to form a rough surface, it is effective for adhesive strength, but the through-hole plating film (both copper), which is a wiring circuit and interlayer connection portion, is easily dissolved, resulting in poor conduction. Cause. Further, since a rubber-modified product is mixed in the adhesive, there is a problem in heat resistance.
[0008]
Further, in the build-up method as disclosed in Japanese Patent Application Laid-Open No. 4-148590, formation of fine wiring is achieved, but since the resin is cured only by photo-curing in the interlayer insulating film forming step, the interlayer insulating film is hardened. Adhesion between the metal film and the plating film forming the wiring layer is weak, and there is a problem such as peeling and the reliability is low.
[0009]
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to solve the problems in the above-described conventional build-up method, and in particular, the surface layer of an interlayer insulating film is roughened by etching to form an interlayer insulating film and a wiring laminated therethrough. An object of the present invention is to provide a method for manufacturing an improved multilayer wiring board suitable for manufacturing a highly reliable high-density multilayer wiring board by solving the problem of improving the adhesive strength to a pattern.
[0010]
[Means for Solving the Problems]
The object of the present invention is to provide: (1) a step of forming an insulating resin layer having both photocurability and thermosetting properties on a wiring substrate having a first wiring layer; Forming a via hole by exposing and developing the insulating resin layer to expose an interlayer connection region of the first wiring layer; and (3) a roughening solution is applied to the surface of the wiring layer exposed portion in the via hole. (4) forming a conductive protective film having an insulating property;Roughening liquidForming a roughened surface by etching in a step; 5) forming a base conductive film on the roughened surface of the insulating resin layer including the surface of the conductive protective film in the via hole; and 6) forming the roughened surface. (7) a step of completely curing the insulating resin layer having the surface formed thereon by a thermosetting treatment, (7) a step of forming a plating film on the underlying conductive film, and (8) a step of forming the underlying conductive film and the plating film into a predetermined circuit. Etching through a resist mask on which a pattern is formed to form a circuit pattern to be a second wiring layer, and from the step of forming an insulating resin layer of (1) to the second of (8). This is achieved by a method of manufacturing a multilayer wiring board having a step of repeating each step up to the step of forming a circuit pattern to be a wiring layer by the number of times corresponding to the number of stacked multilayer wirings.
[0011]
Preferably, the step (3) of forming a conductive protective film having a roughening liquid resistance on the surface of the wiring layer exposed portion in the via hole is performed by forming a plating catalyst on the surface of the wiring layer exposed portion. Forming the conductive protective film by electroless plating, and forming the underlying conductive film on the roughened surface of the insulating resin layer including the conductive protective film surface in the via hole in the above (5) at least A step of forming a plating catalyst on the roughened surface of the insulating resin layer and forming the underlying conductive film by electroless plating.
[0012]
Examples of the wiring board having the first wiring layer include, for example, a wiring board having a wiring pattern formed on at least one surface of a copper-clad laminate in advance by a usual method, as further shown below. The first wiring layer may be stacked on an insulating substrate according to the same principle as the method for forming the second wiring layer to form a wiring substrate.
[0013]
That is, (1) a step of forming an insulating resin layer having both photocurability and thermosetting properties on an insulating substrate; (2) a step of exposing the insulating resin layer to a semi-cured state; ▼ The surface of the semi-cured insulating resin layer has a large oxidizing power.Roughening liquid(5) forming a base conductive film on the roughened surface of the insulating resin layer, and (6) heating the insulating resin layer on which the roughened surface is formed. (7) a step of forming a plating film on the underlying conductive film, and (8) a step of forming the underlying conductive film and the plating film through a resist mask on which a predetermined circuit pattern is formed. A wiring board formed by etching and forming a circuit pattern to be a first wiring layer. In this case, the wiring board is built up from the first wiring layer, which can be said to be a complete build-up method.
[0014]
In the present invention, as a substrate serving as a base of the wiring substrate, for example, an organic substrate called a so-called “glass epoxy substrate” in which a glass cloth base material is impregnated with an epoxy resin, or a metal plate having good heat conductivity ( A substrate having an insulating layer formed thereon (hereinafter referred to as a heat sink), and a substrate called a "copper-clad laminate" in which a copper foil serving as a circuit forming film is laminated on these insulating substrates.
[0015]
[Action]
Hereinafter, one example of the manufacturing process of the present invention shown in FIG. 1 will be specifically described.
As shown in FIG. 1A, a circuit pattern 101 is formed in advance on a double-sided copper-clad laminate 100 by a well-known etching method to form a first wiring layer.
[0016]
As shown in FIG. 1B, an insulating resin layer (hereinafter simply referred to as an insulating resin layer) 102 having both photocurability and thermosetting properties is formed on both surfaces. In this figure, a case where the film is formed on one side is shown for convenience of explanation.
[0017]
As shown in FIG. 1C, the insulating resin layer 102 is exposed and developed through a resist mask to form a via hole 103. It is preferable that the shape of the via hole 103 be a positive taper shape as shown in the figure. To this end, it is preferable to perform the exposure process in two stages, depending on the composition of the resin. Initially, the pattern is formed at the optimal exposure dose for pattern formation (usually, a small amount of uncured component remains without completely reacting the photocurable component), and the remaining photocurable component reacts completely in the subsequent exposure process Let it.
[0018]
As shown in FIG. 1D, the exposed surface of the circuit pattern in the via hole 103 is activated by a plating catalyst, and a conductive protective film 104 having a roughening liquid resistance is formed on the exposed surface of the circuit pattern 101.
[0019]
As shown in FIG. 1 (e), this substrate isRoughening liquidFor example, the surface of the insulating resin layer 102 is immersed in a chromium sulfuric acid treatment solution having a specific range of composition to form a roughened surface 102 'by an etching action, and a neutralization treatment is performed with an aqueous alkali solution to remove the surface-deteriorated layer residue. It is important to perform this roughening process when the photocurable component of the insulating resin layer 102 is photocured by the above-mentioned exposure and becomes a semi-cured state as a whole resin, and the thermosetting component is left without reacting. .
[0020]
As shown in FIG. 1F, the method includes a step of completely curing the insulating resin layer 102 by heat curing, and has an excellent adhesive strength on the roughened surface 102 ′ of the insulating resin layer including the surface of the conductive protective film 104. A base conductive film 105 is formed. The complete curing of the insulating resin layer 102 by the thermal curing is for completely curing the thermosetting component in the insulating resin layer by heating. Although it may be before or after the step of forming the film 105, it is preferable to form the base conductive film 105 more preferably in order to further enhance the adhesive strength.
[0021]
As shown in FIG. 1G, a plating conductive film 106 is formed on the underlying conductive film 105.
As shown in FIG. 1H, a resist mask is formed on the underlying conductive film 105 and the plated conductive film 106, and the circuit patterns 105 'and 106' are etched by the same method as the circuit pattern forming step of FIG. 1A. To form a second wiring layer.
[0022]
Thereafter, the process is repeated from the step of forming the insulating resin layer 102 in FIG. 1B to the step of forming the circuit patterns 105 ′ and 106 ′ in FIG. .
[0023]
Each of the above manufacturing steps will be described in more detail together with the operation as follows.
(1) In the step of forming the circuit pattern 101 serving as the first wiring layer in FIG. 1A, a copper foil on the double-sided copper-clad laminate 100 is used as a conductor, and the copper foil on the double-sided copper clad laminate 100 is used as a conductor. The circuit pattern 101 is formed by a known etching method using a film, an electrodeposition resist or the like.
[0024]
(2) In the step of forming the insulating resin layer 102 of FIG. 1B, the insulating resin layer 102 is coated on the substrate by a known screen printing, a roll coater, a spray coater, or the like to a film thickness of about 50 μm, and is preliminarily dried to form a film. .
[0025]
(3) In the step of forming the via hole 103 in FIG. 1C, the via hole 103 is formed by exposing to UV light through a film mask on which a predetermined via hole pattern is formed and then developing. If necessary, as described above, the exposure process is performed in two stages. After the formation of the via hole 103, the entire surface is irradiated with UV light to completely cure the photocurable component, thereby further strengthening the photocuring of the insulating resin layer 102. You can also.
[0026]
(4) In the step of forming the conductive protective film 104 in FIG. 1D, first, the exposed circuit pattern surface in the via hole 103 is activated by a plating catalyst such as palladium sulfate or palladium chloride, and the exposed circuit pattern surface is exposed. Then, a conductive protective film 104 having a roughening liquid resistance is formed by electroless plating. Roughening solution (chromic anhydride or other oxidizing agent with high oxidizing power) used in the subsequent step (step of roughening the insulating resin layer)Aqueous solution) Easily dissolves the copper circuit, resulting in poor conduction and poor interlayer connection.
[0027]
Therefore, the conductive protective film 104 is formed for the purpose of preventing such a defect, and the step of forming the conductive protective film 104 on the surface of the copper circuit may be performed after the formation of the circuit pattern 101 in FIG. It does not specify the order of the steps. As the conductive protective film 104 having resistance to roughening liquid, for example, electroless plating such as Ni-P or Ni-B is effective.
[0028]
(5) In the step of roughening the surface of the insulating resin layer 102 shown in FIG.Drug solutionFor example, in the case of using a mixed solution of sulfuric acid and chromic anhydride, it is preferable that the liquid temperature is 50 to 80 ° C. and the concentration range in the shaded area as shown in FIG. That is, a treatment solution containing a sulfuric acid (3.6 to 6 mol / l) aqueous solution and chromic anhydride (2 mol / l or more within the solubility range with respect to the sulfuric acid concentration and the saturation point concentration or less) is immersed in the treatment solution for 3 to 10 minutes. This is achieved by performing a neutralization treatment by immersion in an alkaline aqueous solution for 5 to 10 minutes to remove a residue of the surface deteriorated layer due to etching.
[0029]
(6) In the step of forming the underlying conductive film 105 in FIG. 1F, a film may be formed by a vapor phase method such as sputtering, or may be formed by an electroless plating method. As a film-forming material, copper, nickel, and the like are practically preferable, and nickel has better adhesive strength than copper. The thickness is practically preferably 0.1 to 0.5 μm.
[0030]
When forming by an electroless plating method, a catalyst such as palladium is applied on the roughened surface 102 ′ of the insulating resin layer in advance to perform the activity. In any case, the underlying conductive film 105 requires a strong adhesive strength with the insulating resin layer 102. This is achieved by performing an adhesive strength improving process including a process of roughening the surface of the insulating resin layer 102, a process of forming the underlying conductive film 105, and a process of completely curing the insulating resin by thermosetting.
[0031]
The treatment for improving the adhesive strength includes a step of roughening the exposed surface of the insulating resin layer 102, a step of forming a base conductive film 103 on the roughened surface layer 102 ', and a step of forming the surface layer 102' by thermosetting. After the step of roughening the surface of the exposed insulating resin 102 by performing the step of completely hardening the insulating resin layer 102 including the above, or by changing the order of the step of completely hardening by heat hardening, A step of completely curing the resin layer is performed, and then, a step of forming a base conductive film 105 on the roughened surface 102 ′ of the insulating resin layer including the surface of the conductive protective film 104 is performed.
[0032]
The step of complete curing by thermal curing is preferably performed after the former base conductive film 105 is formed. This is because, after the underlying conductive film 105 has entered the concave surface, the adhesive strength can be further improved by tightening the periphery of the underlying conductive film which has entered by the thermosetting treatment. By going through the above steps, an improvement in adhesive strength can be achieved.
[0033]
Then, in order to improve the adhesive strength, as described above, the insulating resin layer 102 which is completely cured by a combination of light curing and heat curing is used, and after the exposure and curing by UV light, the resin layer is completely cured by heating. It is important to roughen in a semi-cured state. The adhesion between the insulating resin layer surface and the underlying conductive film utilizes the anchor effect between the roughened resin layer surface 102 ′ and the underlying conductive film 105, and when the resin layer is roughened in a semi-cured state, the surface is roughened. Effective unevenness is formed, and the adhesive strength can be increased.
[0034]
Before the surface of the resin 102 which has been semi-cured by exposure is roughened, the surface of the resin layer 102 is₂Plasma and UV / O₃Etching is also effective for improving the adhesive strength.
[0035]
(7) In the step of forming the plated conductive film 106 in FIG. 1 (g), a thick conductive film (about 20 μm thick) is formed on the underlying conductive film 105 by plating. Electrolytic plating may be used. Further, in the case of electroless plating, the underlying conductive film 105 and the thick conductive film 106 thereon can be formed continuously without distinction. Further, instead of the step of forming the plating conductive film 106, it is possible to form the conductive film by sputtering.
[0036]
(8) In the step of forming a circuit pattern to be the second wiring layer in FIG. 1H, a resist mask having a predetermined wiring circuit pattern formed thereon is similar to the step of forming the circuit pattern of the first wiring layer 101. Is used to perform an etching process by a known method, thereby forming circuit patterns 105 'and 106'. After the formation of the circuit pattern, the plating catalyst is removed from the unnecessary portion (which has adhered to the portion where the insulating resin layer is exposed due to the circuit formation), which is applied as a pretreatment step in electroless plating by immersion in an alkaline aqueous solution. If the plating catalyst remains in the unnecessary portion, insulation failure occurs between adjacent circuits on the same plane and between the laminations. Therefore, it is desirable to remove this from the viewpoint of improving reliability.
[0037]
Here, the insulating resin forming the insulating resin layer 102 will be described in more detail.
As described above, the insulating resin used in the present invention includes a skeleton that can be polymerized by light (photocuring) and a skeleton that can be polymerized by heat (thermosetting) to improve the adhesive strength to the circuit pattern. That is the condition. Further, the properties that the insulating resin should have are listed below.
[0038]
a) At the time of UV exposure, since the film mask is exposed in close contact with the resin surface, the resin surface must be solidified in the preliminary drying stage so that the film mask and the resin do not adhere. Therefore, it is necessary that the insulating resin of the present invention contains a resin that is solid at least at room temperature.
[0039]
b) In order to be able to form a via hole by photolithography, it is essential that the difference in solubility between the part cured by irradiation with UV light and the uncured part in the developer is appropriate and that the solubility after development is good. In other words, it must have excellent developability with an appropriate solvent.
[0040]
c) Good coatability is essential. That is, when a resin is applied on a substrate by screen printing, a roll coater, a spray coater, or the like, it is necessary to have a viscosity characteristic as an appropriate ink so that the thickness is uniform and no void remains. .
[0041]
d) It is essential to have good heat resistance to withstand repeated soldering. In other words, even if solder immersion at 260 ° C. for 10 seconds is repeated about 5 times, or by soldering with hot air, infrared rays, solvent vapor, or the like corresponding thereto, abnormalities such as swelling and peeling do not occur in the resin layer. It is essential.
[0042]
e) Since the interlayer insulating film of the multilayer wiring is formed, it is essential that high insulation can be maintained. That is, it is necessary that excellent insulation properties that do not cause insulation deterioration between wiring layers, especially insulation properties at the time of moisture absorption be maintained.
[0043]
Examples of the insulating resin that satisfies such conditions include, for example, an insulating resin containing a polyfunctional unsaturated compound that is solid at least at room temperature, an epoxy resin, an acrylate monomer, a photopolymerization initiator, and an amine-based thermosetting agent, Representative examples include a bifunctional or higher polyfunctional solid epoxy resin having an unsaturated group added thereto, an acrylate monomer, a photopolymerization initiator, and an insulating resin containing an amine-based thermosetting agent.
[0044]
Among these components, particularly, with respect to the amine-based thermosetting agent, the use of a dicyandiamide or diaminotriazine compound is effective in improving the adhesion to the plating film. As such an insulating resin, for example, those described in Japanese Patent Application Laid-Open No. 62-265321, which has been proposed by the present inventors, can be used.
[0045]
Note that the present invention is applicable to the manufacture of a multilayer circuit board having a function such as a resistor, a capacitor, and an inductance in an inner layer, and does not hinder them.
[0046]
【Example】
Hereinafter, several typical examples of the method for manufacturing a multilayer wiring board according to the present invention will be described, and the present invention will be described more specifically with reference to these examples.
<Example 1>
Referring to FIG. 1, first, as a wiring board 100 shown in FIG. 1A, a laminated board (80 mm × 80 mm × thickness 0) in which a glass cloth base material is impregnated with an epoxy resin and solidified with a copper foil on one side. 0.6 mm and a copper foil thickness of 18 μm), and a copper foil on which a circuit pattern 101 was previously formed as a first wiring layer by a known method was used as a sample substrate.
[0047]
Then, as shown in FIG. 1 (b), an insulating resin prepared by the following procedure was applied to the wiring board by a spray coater to a thickness of about 50 μm, and preliminarily dried at 80 ° C. for 30 minutes to form an insulating resin layer. 102 was formed.
[0048]
<Adjustment of insulating resin>
A resin composition comprising the following (a) to (f) was prepared to obtain a resin for forming the insulating resin layer 102.

First, the above (a) to (c) and an appropriate amount of a solvent (ethyl cellosolve) were mixed and heated and stirred at 80 ° C. for 30 minutes. Next, after the resin composition was cooled to room temperature, the other components (d) to (g) were mixed and kneaded with a three-roll mill to obtain an insulating resin.
[0049]
Next, as shown in FIG. 1C, the substrate was exposed to UV light for 2 minutes using a 400-w high-pressure mercury lamp through a negative mask on which a via-hole pattern was formed, and a via-hole 103 was formed in a desired portion by development. In this embodiment, the developing solution contains 1.1.1. Spray development was performed for one minute using trichloroethane to obtain a via hole 103 having a hole diameter of about 100 μm.
[0050]
Then, as shown in FIG. 1 (d), a conductive material having a roughening solution resistance is provided on the surface of the via hole to protect the circuit surface exposed from the roughening solution in a later process and to prevent a conduction failure and an interlayer connection failure. The protective film 104 was formed according to the following electroless plating solution composition and conditions. As the protective film 104, electroless plating of Ni-P or Ni-B was used. FIG. 3 shows an example of comparing the roughening liquid resistance between Cu and Ni-P. In addition, although the example of Ni-B is not shown in FIG. 3, it showed the same characteristics as Ni-P.
[0051]
<Plating solution composition and conditions>
(1) Catalyst treatment liquid
Sulfuric acid aqueous solution 10vol%
Palladium sulfate 0.2g / l
Liquid temperature Room temperature
Immersion time 1 minute
(2) Electroless nickel plating solution
Blue Schumer * (Ni-P) undiluted solution used
Liquid temperature 80 ℃
Plating time 5 minutes
* Product name for plating solution manufactured by Kanigen
Next, as shown in FIG. 1 (e), in order to secure the adhesive strength between the insulating resin layer 102 and the underlying conductive film in a later step, the surface of the resin layer 102 is subjected to a surface roughening treatment, and the roughened surface 102 ′ is formed. Formed. As a method of roughening the surface of the insulating resin layer, a solution temperature of 50 to 80 ° C. and a condition in a shaded portion as shown in FIG. 2, that is, a sulfuric acid (3.6 to 6 mol / l) aqueous solution and chromic anhydride (sulfuric acid) (2 mol / l or more within the solubility range with respect to the concentration, not more than the saturation point concentration) for 3 minutes to 10 minutes, followed by immersion in an aqueous alkaline solution for 5 to 10 minutes for neutralization treatment to remove the surface-degraded layer residue. Removed.
[0052]
Next, as shown in FIG. 1F, a base conductive film 105 (having a thickness of 0.1 to 0.5 μm) was formed. In this embodiment, a palladium catalyst was applied to the insulating resin surface 102 'including the surface of the protective film 104 to activate the resin, and the underlying conductive film was formed by electroless plating under the following processing conditions.
[0053]
<Treatment liquid and treatment conditions>
(1) Catalytic treatment liquid (both are represented by trade names manufactured by Shipley)
(1) Cataplip 404 (270 g / l) 30 ° C, 3 minutes
(2) Cataplip 404 (270 g / l) 40 ° C, 5 minutes
Cataposit 44 (30ml / l)
(3) Accelerator (170ml / l) Room temperature, 3 minutes
(2) Underlying conductive film (all are represented by the trade name of Shipley)
Copper Mix 328A (125ml / l) room temperature, 1 minute
Copper Mix 328L (125ml / l)
Copper Mix 328C (25ml / l)
Next, heat curing was performed at 150 ° C. for 30 minutes to completely cure the insulating resin layer 102.
[0054]
Next, as shown in FIG. 1 (g), thick electrolytic copper plating 106 was performed under the following processing solutions and processing conditions.
[0055]
<Treatment liquid and treatment conditions>
(1) Copper plating pretreatment
Neutraclean * (50vol%) room temperature, 3 minutes
Sulfuric acid washing (10 vol%) room temperature, 1 minute
* Shipley surfactant brand name
(2) Thick copper electroplating
CuSO₄・ 5H₂O (75ml / l)
H₂SO₄                      (98ml / l)
HCl (0.15ml / l)
Cu-board HA makeup * (10ml / l)
Liquid temperature Room temperature
Current density 2A / dm²
Plating thickness 20 microns
* Trade name for surfactants manufactured by EBARA Eugerite Co., Ltd.
Next, as shown in FIG. 1 (h), a photosensitive etching dry film is laminated on the substrate by a conventional method, exposed through a predetermined mask pattern, and developed, etched and peeled to form an insulating resin layer on the insulating resin layer. A circuit pattern having a width of about 50 microns was formed, and unnecessary catalysts between circuits were removed to form second wiring layers 105 'and 106'. The removal of the catalyst was performed by immersing in a strong alkaline aqueous solution of 5 wt% NaOH for 10 minutes. The catalyst residue can be measured by X-ray fluorescence analysis based on the counts of peaks corresponding to Sn and Pd, and as shown in FIG. 4, it can be seen that the catalyst residue can be removed in about 10 minutes. That is, FIG. 4 shows the relationship between the amounts of Sn and Pd deposited at 50 ° C. and the immersion time.
[0056]
Thereafter, the formation of the third wiring layer is also repeated by repeating the steps from the formation of the insulating resin layer 102 in FIG. 1B to the step of forming the second wiring layer in FIG. Was manufactured.
[0057]
Regarding the evaluation of the characteristics of the multilayer wiring board of this embodiment, judgment was made in accordance with the following items mainly relating to an important insulating layer in common in each embodiment.
1) Developability: When spray-developed with 1,1,1, trichloroethane or another solvent at room temperature for 1 minute, the unexposed portion is completely dissolved, and the exposed portion of the resin has a positive taper without swelling or the like. The one in which the photo via hole was formed was regarded as good.
2) Heat resistance: dipped in a 260 ° C. solder bath for 10 seconds and air-cooled to room temperature. Observation after repeating this operation 5 times, a sample having no abnormality such as swelling and peeling of the resin or cracking, swelling and peeling of the plating film was evaluated as good.
3) Insulation: The insulation resistance of the substrate when absorbing moisture is 10¹⁰Those which became Ω or more were regarded as good.
4) Adhesion: The purpose was to measure the adhesion between the circuit pattern and the resin layer. After the copper electroplating step, the peel strength was measured by cutting with a knife to a width of 1 cm and peeling off at 90 degrees. In consideration of practicality, the target value was determined to be 500 g / cm.
[0058]
Table 1 shows the results of evaluating the characteristics of the multilayer wiring board according to the above items. As is clear from this, the obtained multilayer wiring board was found to be excellent in all the evaluation items.
[0059]
[Table 1]

[0060]
<Example 2>
Using the same insulating resin as in Example 1 as the interlayer insulating film, a multilayer wiring board was manufactured according to the process shown in FIG. The feature of this embodiment is that all the wiring layers from the first wiring layer to the third wiring layer are stacked by the build-up method.
First, as shown in FIG. 5A, a laminate (80 mm × 80 mm × 0.6 mm thick) obtained by impregnating and solidifying a glass cloth base material with an epoxy resin was prepared as a substrate.
Next, as shown in FIG. 5B, the substrate was coated with a thickness of about 50 μm by a spray coater and pre-dried at 80 ° C. for 30 minutes to form an insulating resin layer 102.
[0061]
Next, as shown in FIG. 5C, the insulating resin layer 102 was exposed to UV light for 2 minutes using a 400-w high-pressure mercury lamp, and was light-cured to be in a semi-cured state. In this state, the surface of the insulating resin layer 102 was roughened using a roughening liquid to form a roughened surface 102 '. The surface roughening method of the insulating resin layer 102 is the same as that of the first embodiment.
[0062]
Next, as shown in FIG. 5D, heat curing was performed at 150 ° C. for 30 minutes to completely cure the resin layer. Next, in order to activate the roughened layer surface 102 ′, it was immersed in a catalyst solution, the underlying conductive film 105 was subjected to electroless plating, and then thick copper electroplating 106 was applied. The processing liquid and processing conditions are as shown below.
[0063]
<Treatment liquid and treatment conditions>
(1) Catalytic treatment liquid (both are represented by trade names manufactured by Shipley)
(1) Cataplip 404 (270 g / l) 45 ° C, 3 minutes
(2) Cataplip 404 (270 g / l) 45 ° C, 5 minutes
Cataposit 44 (30ml / l)
(3) Accelerator (170ml / l) Room temperature, 3 minutes
(2) Electroless plating solution for underlying conductive film (all are indicated by trade names manufactured by Shipley)
Copper Mix 328A (125ml / l) room temperature, 1 minute
Copper Mix 328L (125ml / l)
Copper Mix 328C (25ml / l)
(3) Pretreatment of copper plating
Neutraclean (50vol%) room temperature, 3 minutes
Sulfuric acid washing (10 vol%) room temperature, 1 minute
(3) Thick electrolytic copper plating solution and plating conditions
CuSO₄・ 5H₂O (75mg / l)
H₂SO₄                    (98ml / l)
HCl (0.15ml / l)
Cu-board HA makeup (10ml / l)
Liquid temperature Room temperature
Current density 2A / dm²
Plating thickness 20μm
As described above, the plating was performed under the above processing conditions.
[0064]
Next, as shown in FIG. 5 (e), a photosensitive etching dry film is laminated on the plating film of the substrate by a conventional method, exposed through a mask having a predetermined circuit pattern formed thereon, developed, etched, and peeled. Through these steps, a circuit pattern 101 serving as a first wiring layer having a width of about 100 μm was formed on the insulating resin layer.
Next, in order to remove an unnecessary catalyst between circuits (insulating layer exposed by etching), the substrate was immersed in a strong alkaline aqueous solution of 5 wt% NaOH for 10 minutes.
[0065]
Hereinafter, as shown in FIGS. 5F to 5H, the same steps as those of the first embodiment are repeated for the formation of the second wiring layer and the third wiring layer, respectively. Manufactured.
[0066]
As in Example 1, the results of evaluation of the characteristics of the obtained multilayer wiring board are shown in Table 2. As in the case of Example 1, it was found that all the samples had excellent characteristics.
[0067]
[Table 2]

[0068]
<Example 3>
Using the same insulating resin as in Example 1 as the interlayer insulating film, a multilayer wiring board was manufactured in the same process as in Example 1. However, the difference from the first embodiment in the manufacturing process is that the heat curing treatment at 150 ° C. for 30 minutes for completely curing the insulating resin layer is performed before the step of forming the underlying conductive film 105, contrary to the first embodiment. That is. That is, this example is performed to examine how the timing of completely curing the insulating resin layer after the roughening process changes before and after the formation process of the base conductive film 105.
[0069]
Table 3 shows the results of evaluating the characteristics of the obtained multilayer wiring board in the same manner as in Example 1. In this case, good results were obtained, but the adhesiveness was slightly lower than that in Example 1. Therefore, the timing at which the insulating resin layer is completely cured by heating is preferably after the formation of the base conductive film 105. For example, comparing the sample under roughening condition 3 in Table 1 (Example 1) and the sample under roughening condition 21 in Table 3 (Example 3), the former was 873 g / cm. The latter was 825 g / cm.
[0070]
[Table 3]

[0071]
<Example 4>
Using the same insulating resin as in Example 1 as the interlayer insulating film, a multilayer wiring board was manufactured in the same process as in Example 1. However, the difference from the first embodiment in the manufacturing process is that the underlying conductive film 105 is formed by electroless nickel plating instead of electroless copper plating. That is, this example was performed to examine how the difference in the material of the underlying conductive film 105 affects the adhesive strength. The electroless nickel plating solutions (two types) used and the plating conditions are as follows.
[0072]
<Electroless nickel plating solution and plating conditions>
(1) Electroless nickel plating solution (1)
SB-55 (Ni-B) * Using undiluted solution
Liquid temperature 60 ℃
Plating time 1 minute
(2) Electroless nickel plating solution (2)
Blue Schumer (Ni-P) * Using undiluted solution
Liquid temperature 80 ℃
Plating time 1 minute
* All are brand names of plating solution manufactured by Kanigen
Table 4 shows the results of evaluating the characteristics of the obtained multilayer wiring board in the same manner as in Example 1. All the samples were found to have excellent characteristics. In particular, it was found that the use of nickel tends to have a higher adhesive strength to the insulating resin than the case where the base conductive film 105 is formed of copper. This is because nickel is harder than copper. For example, comparing the sample under the roughening condition 5 in Table 1 (Example 1) and the sample under the roughening condition 29 in Table 4 (Example 4), the former was 956 g / cm. The latter was 1,645 g / cm.
[0073]
[Table 4]

[0074]
<Example 5>
Using the same insulating resin as in Example 1 as the interlayer insulating film, a multilayer wiring board was manufactured in the same process as in Example 1. However, the difference from the first embodiment in the manufacturing process is that in the method for roughening the surface of the insulating resin layer 102, a step of dryly etching the surface layer is added as a previous step. Here, O is used as a pre-process.₂Plasma asher and UV / O₃Two additional steps of treatment were added, and then roughening was performed with a chromium sulfate-based treatment liquid in the same manner as in Example 1. The dry etching apparatus and conditions used as the pretreatment step are as follows.
[0075]
(1) O₂Plasma Asher (using DEM-451M manufactured by Anelva)
O₂Flow rate 50sccm
Gas pressure 10Pa
PF power 300W
Self bias -710V
Processing time 5-20min
(2) UV / O₃processing
O₃Flow rate 8NL / min
Temporary current 5A
Temperature 160 ℃ ± 10
15cm from the lamp
Processing time 5-20min
Table 5 shows the results of evaluating the characteristics of the obtained multilayer wiring board in the same manner as in Example 1. All the samples were found to have excellent characteristics. In comparison with Table 1 of Example 1 for the adhesiveness, for example, the sample under roughening condition 8 in Table 1 (Example 1) was 1529 g / cm, whereas the roughening condition of this example was The sample of 37 was 1540 g / cm, and the sample of roughening condition 41 was 1600 g / cm. In each case, the case where a pre-treatment step of dry etching was added was superior.
[0076]
[Table 5]

[0077]
<Example 6>
This example is manufactured by basically the same process as that of the first example, but partially changes the UV exposure conditions in the via hole forming process. That is, after a via hole 103 is formed in a desired portion by exposure and development using UV light shown in FIG. 1C of Example 1, the entire surface of the insulating resin layer 102 is again exposed to UV light for 2 minutes, All the photocurable components contained in were cured. As a result, the yield of the positive taper of the via hole 103 in Example 1 was 90%, which was improved to 100%.
[0078]
When the shape of the via hole 103 deviates from the forward taper and becomes a reverse taper, the yield in the subsequent plating process of the conductive protective film 104, the underlying conductive film 105, the thick plating film 106, and the like is reduced, or the via hole 103 is initially formed. Larger than the design pattern width, and the line width is substantially expanded, which causes problems such as difficulty in realizing a high-definition pattern.However, by forming a positive taper, a wiring conductor with much higher reliability is formed. can do.
[0079]
<Comparative Example 1>
Using the same insulating resin as in Example 1 as the interlayer insulating film, a multilayer wiring board was manufactured in the same process as in Example 1. However, the difference from the first embodiment is that the roughening treatment is performed after the insulating resin layer is completely cured at 150 ° C. for 30 minutes. That is, the timing of the roughening process is not after the resin is in a semi-cured state but after complete curing.
[0080]
In the same manner as in Example 1, the characteristics of the obtained multilayer wiring board were evaluated, and the results are shown in Tables 43 to 46, 49, and 50 under roughening conditions. As is clear from the table, the multilayer wiring board manufactured in this step had excellent characteristics with respect to the developability of the evaluation item 1), but all of the other items 2) to 4) were not evaluated. Failure occurred when the roughening treatment time was 1 hour or less. This is because the adhesive strength is much lower than in Example 1. In addition, if the roughening time (treatment liquid immersion time) is lengthened, a certain degree of strength can be obtained, although not sufficiently. This is presumably because the insulating resin was completely cured, so that the chemical resistance was improved and it was difficult to roughen. Furthermore, from these results, it was found that the present invention is effective for shortening the time for forming a roughened surface. In addition, it was found that only the evaluation item 1) was favorable for those that did not undergo any thermal curing.
[0081]
[Table 6]

[0082]
<Comparative Example 2>
Using the same insulating resin as in Example 1 as the interlayer insulating film, a multilayer wiring board was manufactured in the same process as in Example 1. However, the difference from the first embodiment is that the resin is roughened without forming the protective film 104. As in Example 1, the substrate characteristics were evaluated, and the results are shown in Samples 47, 48, and 51 under the roughening conditions in Table 6. However, in each of the samples, the circuit pattern exposed in the via hole 103 or the copper plating of the interlayer connection portion was melted at the stage of the roughening process, resulting in poor connection.
[0083]
<Comparative Example 3>
A multilayer wiring board was manufactured in the same process as in Example 1 as an interlayer insulating film. However, the difference from Example 1 was that (1) the resin used was an acid anhydride as the thermosetting agent, and (2) the resin used was a photocurable component only. In the same manner as in Example 1, the characteristics of the obtained multilayer wiring board were evaluated. The compositions of the two types of insulating resins used are as follows.
[0084]
(1) Resin composition
(A) 100 g of diallyl phthalate resin
(B) Epicoat 828 * 30g
(C) Pentaerythritol triacrylate 20g
(D) Benzoin isopropyl ether 4g
(E) Pyromellitic anhydride ** 10 g
(F) Others (additives for improving coating characteristics)
* Shell Oil's product name of epoxy resin
** Thermosetting agent (acid anhydride)
(2) Resin composition
(A) 100 g of diallyl phthalate resin
(B) Pentaerythritol triacrylate 20g
(C) Benzoin isopropyl ether 4g
(D) Others (additives for improving coating characteristics)
The multilayer wiring board manufactured in this comparative example had excellent characteristics in terms of the developability of the evaluation item 1), but all of the other items 2) to 4) were defective. This is because the adhesive strength is lower than that of Example 1. From these results, the importance of the specific thermosetting agent according to the present invention and the importance of not only the photocurable component but also the thermosetting resin component became clear.
[0085]
【The invention's effect】
As described above, the intended object has been achieved by the present invention. That is, the adhesive strength of the conductive film formed on the insulating substrate is strong, and a highly reliable, high-density multilayer wiring substrate can be easily manufactured.
[Brief description of the drawings]
FIG. 1 is a fragmentary cross-sectional view showing a manufacturing process for explaining the principle of the present invention and one embodiment.
FIG. 2 is a characteristic diagram showing conditions of a roughening solution for roughening the surface of the insulating resin layer.
FIG. 3 is a characteristic diagram showing an example of the roughening liquid resistance of the conductive protective film.
FIG. 4 is a characteristic diagram showing a catalyst removing effect after a wiring pattern is formed.
FIG. 5 is a cross-sectional view of a principal part showing a manufacturing process of another embodiment.
[Explanation of symbols]
100: double-sided copper-clad laminate, 101: circuit pattern,
102: an insulating resin layer; 102 ': a roughened surface of the insulating resin layer;
103: Via hole, 104: Conductive protective film,
105, 105 ': underlying conductive film; 106, 106': plated conductive film.

Claims (14)

On a wiring substrate having a first wiring layer, (1) a step of forming an insulating resin layer having both photocurability and thermosetting, and (2) exposing the insulating resin layer via a predetermined mask Forming a via hole by developing to expose an interlayer connection region of the first wiring layer, and (3) a conductive protective film having a resistance to roughening liquid on a surface of the wiring layer exposed portion in the via hole. Forming a roughened surface by etching the surface of the insulating resin layer with a roughening solution having a large oxidizing power; and (5) insulating the surface including the conductive protective film surface in the via hole. A step of forming a base conductive film on the roughened surface of the resin layer, (6) a step of completely curing the insulating resin layer on which the roughened surface is formed by a thermosetting treatment, and (7) a step of forming the base conductive film on the base conductive film. (8) forming a predetermined circuit pattern on the underlying conductive film and the plating film; Etching through a resist mask to form a circuit pattern to be the second wiring layer, and from the step of forming the insulating resin layer of the above (1) to become the second wiring layer of (8) A method for manufacturing a multilayer wiring board, comprising a step of repeating each step up to a step of forming a circuit pattern by the number of times corresponding to the number of stacked multilayer wirings. The step (3) of forming a conductive protective film having anti-roughening liquid on the surface of the wiring layer exposed portion in the via hole, forming a plating catalyst on the surface of the wiring layer exposed portion, forming the conductive protective film Along with the step of forming by electroless plating, the step of forming a base conductive film on the roughened surface of the insulating resin layer including the surface of the conductive protective film in the via hole of the above (5), at least of the insulating resin layer 2. The method for manufacturing a multilayer wiring board according to claim 1, comprising a step of forming a plating catalyst on the roughened surface and forming the underlying conductive film by electroless plating. 3. The method for manufacturing a multilayer wiring board according to claim 1, wherein the wiring board having the first wiring layer is constituted by a laminated board having a wiring pattern formed on at least one surface of a copper-clad laminate in advance. The wiring board having the first wiring layer, on the insulating substrate, (1) a step of forming an insulating resin layer having both photocurability and thermosetting, and (2) exposing the insulating resin layer (4) etching the surface of the insulating resin layer in the semi-cured state with a roughening liquid having a large oxidizing power to form a roughened surface, and (5) roughening the insulating resin layer. Forming a base conductive film on the surface, (6) completely curing the insulating resin layer on which the roughened surface is formed by a thermosetting treatment, and (7) forming a plating film on the base conductive film. And (8) etching the base conductive film and the plating film through a resist mask having a predetermined circuit pattern formed thereon, and forming a circuit pattern to be a first wiring layer. 3. The method for manufacturing a multilayer wiring board according to claim 1, wherein 2. The method for manufacturing a multilayer wiring board according to claim 1, wherein after the step (5) of forming the underlying conductive film, the step (6) of completely curing the insulating resin layer by a thermosetting treatment is performed. 2. The method for manufacturing a multilayer wiring board according to claim 1, wherein the step (5) of forming an underlying conductive film is performed after the step (6) of completely curing the insulating resin layer by a thermosetting treatment. The method for manufacturing a multilayer wiring board according to any one of claims 1 to 4, wherein the conductive protective film having resistance to roughening liquid is formed by electroless plating of Ni-P or Ni-B. The step (4) of etching the surface of the semi-cured insulating resin layer with a roughening solution having a large oxidizing power to form a roughened surface is carried out in a roughening solution comprising a mixed aqueous solution of sulfuric acid and chromic anhydride. 2. The method for manufacturing a multilayer wiring board according to claim 1, comprising a step of immersing the semi-cured insulating resin layer at a temperature of 50 to 80 [deg.] C. and then performing a neutralization treatment with an alkaline aqueous solution. The mixed aqueous solution of sulfuric acid and chromic anhydride comprises 3.6 to 6 mol / l sulfuric acid and chromic anhydride having a solubility of 2 mol / l or more and a saturation point concentration or less within the solubility range for the sulfuric acid concentration. Item 10. The method for manufacturing a multilayer wiring board according to Item 8. Forming a base conductive film on the roughened surface of the insulating resin layer including the conductive protective film surface in the via hole of the above (5), forming a plating catalyst on at least the roughened surface of the insulating resin layer, When the step of forming the underlying conductive film by electroless plating is performed, after the step (8) of forming the circuit pattern by etching the underlying conductive film and the plating film, (9) the plating catalyst of an unnecessary portion is treated by an alkaline aqueous solution treatment. The method for manufacturing a multilayer wiring board according to claim 1 or 2, further comprising a step of removing. As a step prior to the step (4) of etching the surface of the insulating resin layer with a roughening solution having a large oxidizing power to form a roughened surface, the surface of the insulating resin layer is etched with O ₂ plasma or UV / O _3. 2. The method according to claim 1, further comprising the step of: The insulating resin layer having both the photocuring property and the thermosetting property of the above (1), a polyfunctional unsaturated compound solid at room temperature, an epoxy resin, an acrylate monomer, a photopolymerization initiator, and an amine-based thermosetting agent. 2. The method for manufacturing a multilayer wiring board according to claim 1, comprising a resin layer containing the same. The insulating resin layer having both the photo-curing property and the thermo-curing property of the above (1) is obtained by adding an unsaturated group to a polyfunctional solid epoxy resin having two or more functionalities, an acrylate monomer, a photopolymerization initiator, and an amine type 2. The method for manufacturing a multilayer wiring board according to claim 1, comprising a resin layer containing a thermosetting agent. 14. The method for producing a multilayer wiring board according to claim 12, wherein the amine-based thermosetting agent is composed of a dicyandiamide or diaminotriazine compound.

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