JPH0587038B2 - - Google Patents

Info

Publication number
JPH0587038B2
JPH0587038B2 JP61064970A JP6497086A JPH0587038B2 JP H0587038 B2 JPH0587038 B2 JP H0587038B2 JP 61064970 A JP61064970 A JP 61064970A JP 6497086 A JP6497086 A JP 6497086A JP H0587038 B2 JPH0587038 B2 JP H0587038B2
Authority
JP
Japan
Prior art keywords
insulating layer
substrate
conductor wiring
etching
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61064970A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62222696A (ja
Inventor
Akio Fujiwara
Shoichi Iwanaga
Takayoshi Sowa
Ataru Yokono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6497086A priority Critical patent/JPS62222696A/ja
Publication of JPS62222696A publication Critical patent/JPS62222696A/ja
Priority to US07/281,879 priority patent/US4963512A/en
Publication of JPH0587038B2 publication Critical patent/JPH0587038B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP6497086A 1986-03-25 1986-03-25 多層配線基板の製造方法 Granted JPS62222696A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP6497086A JPS62222696A (ja) 1986-03-25 1986-03-25 多層配線基板の製造方法
US07/281,879 US4963512A (en) 1986-03-25 1988-12-08 Method for forming conductor layers and method for fabricating multilayer substrates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6497086A JPS62222696A (ja) 1986-03-25 1986-03-25 多層配線基板の製造方法

Publications (2)

Publication Number Publication Date
JPS62222696A JPS62222696A (ja) 1987-09-30
JPH0587038B2 true JPH0587038B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-12-15

Family

ID=13273412

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6497086A Granted JPS62222696A (ja) 1986-03-25 1986-03-25 多層配線基板の製造方法

Country Status (1)

Country Link
JP (1) JPS62222696A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5175256B2 (ja) * 2009-09-30 2013-04-03 ホシデン株式会社 静電容量式タッチパネル及びその製造方法

Also Published As

Publication number Publication date
JPS62222696A (ja) 1987-09-30

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