JPH057591Y2 - - Google Patents

Description

[Detailed description of the invention] (Field of industrial application) This invention relates to a voice recognition clock that can adjust the time by voice. In particular, when a certain time digit is in a state where it can be adjusted, This invention relates to a device that automatically allows the next digit to be corrected and shifts the corrected digit when there is no voice input.

(Prior Art) A clock that can be adjusted by voice is disclosed in Japanese Patent Laid-Open No. 61-253490.

This clock can adjust the time to a numerical value that corresponds to the voice input from the microphone.

For example, to adjust the time to 12:00, use
Voice the number “1200” corresponding to the time “1, 2,
Enter "zero, zero" and correct it.

(Problem to be solved by the invention) In the above-mentioned conventional clock, even if it is sufficient to correct only some digits of the time to be corrected, it is necessary to input all digits by voice to correct the time. It was hot.

For example, to correct 10:00 to 12:00,
It is sufficient to correct only the 1 hour digit from "0" to "2", but in conventional clocks, the number "1200" corresponding to all digits of 12:00 can be changed to the voice "1, 2, zero, zero". It took a lot of time to have to input everything.

In particular, current speech recognition ICs cannot be said to have a high speech recognition rate, and the more words that are input, the lower the recognition rate becomes. Therefore, it is desirable to input as few words as possible.

This is preferable for devices such as conventional clocks that require voice input for all digits even when correcting some of the digits of the time, as this increases the probability of unrecognizability occurring unnecessarily. It wasn't something.

The purpose of this invention is to make it possible to correct only the necessary digits by simply inputting the minimum number of words by voice, thereby saving as much effort as possible when correcting the time.
Moreover, the objective is to increase the speech recognition rate compared to conventional ones.

(Means for Solving the Problems) The present invention includes a reference signal generator, a plurality of digit counters that count each digit of time using the reference signal output from the generator, and a display of the time counted by the digit counter. A display unit, a microphone for inputting voice, a voice recognition circuit that outputs a recognition signal indicating what kind of voice the input voice is, a decoder that converts the recognition signal into correction value data, and generation of the recognition signal. a recognition signal detection circuit that detects the pulse signal and outputs a pulse signal, and a correction digit selection circuit that outputs a preset signal that causes the correction value data from the decoder to be preset in each digit counter sequentially from the high-order digit in response to the generation of the pulse signal. , a mode switching means for controlling the activation/disabling of the operation of a microphone, etc., the voice recognition clock becomes operable by a signal from the mode switching means and starts counting the reference signal, and the count value is determined based on the recognition signal. This is a voice recognition clock equipped with a voice non-input period counter that is cleared every time the count value occurs and applies a pulse signal to the correction digit selection circuit when the count value reaches a certain value.

(Function) In the voice recognition watch of the present invention, a recognition signal is normally output when the voice input from the microphone is recognized by the voice recognition circuit. This signal is converted into correction value data by a decoder and applied to each digit counter.

At the same time, the recognition signal detection circuit applies a pulse signal to the correction digit selection circuit in response to the generation of the recognition signal, causing it to output a preset signal.

The digit counter to which this preset signal is input is
It enters a preset state and is preset and corrected by the correction value data applied from the decoder.

The above operation is repeated each time the input voice is recognized, and at this time, the correction digit selection circuit applies preset signals to the digit counter sequentially from the most significant digits to preset the correction value data.

On the other hand, in the present invention, a voice non-input period counter is provided that starts counting immediately when the correction mode is entered.

The count value of this voice non-input period counter is
It is cleared every time a voice is recognized, and if there is no voice input for a certain period of time, a pulse signal is applied to the correction digit selection circuit to shift its output.

Therefore, if there is no voice input until the voice non-input period counter counts for a certain period of time, the process automatically shifts to the correction of the next digit.

(Example) An example of the present invention will be described below based on the drawings.

The drawing is a diagram showing the configuration of a voice recognition clock according to an embodiment of the present invention.

Reference numeral 2 denotes a reference signal generator, which is composed of an oscillator 4 and a frequency dividing circuit 6 that divides the frequency of its output signal and outputs a reference signal.

8 is a digit counter consisting of a plurality of counters that count the time, including a minute digit counter 10 that inputs a reference signal and counts the minute digits, and a 10 minute counter that inputs the carry signal and counts the 10 minute digits. It has a digit counter 12, an hour digit counter 14 for inputting the carry signal to count the 1 o'clock digit, and a 10 o'clock digit counter 16 for inputting the carry signal and counting the 10 o'clock digit.

18 is a display section, which includes a decoder 20 that inputs a signal indicating the count value from each digit counter 10 to 16 in the digit counter 8 and converts it into a drive signal, and a time display that inputs the drive signal and displays the time. Part 22
It consists of.

24 is a microphone that detects external sound and converts it into an input signal.

26 is a voice recognition circuit which, when the voice input from the microphone 24 matches one of the pre-registered voices, outputs a 4-bit recognition signal representing the voice from outputs _W1 to _W4 .

A decoder 28 inputs the recognition signal from the voice recognition circuit 26, converts it into correction value data, and applies this correction value data to each digit counter 10 to 16 in the digit counter 8.

30 is a recognition signal detection circuit, and a decoder 32 inputs the recognition signal from the voice recognition circuit 26 and outputs a signal when voice is recognized and when voice is not recognized.
and a one-shot multivibrator (hereinafter abbreviated as "OS") 34, which inputs the signals output when the voice is recognized and when the voice is not recognized, and outputs pulse signals indicating whether recognition is possible or not, respectively.
It is composed of 36.

Reference numeral 38 designates a correction digit selection circuit, which includes an OR gate 40 which inputs each pulse signal from the OS 34 in the recognition signal detection circuit 30 and a voice non-input period counter (described later), and an OR gate 40 which inputs its output signal to a clock input φ, which will be described later. A ring counter 42 inputs the signal from the mode switching means to the reset input, and the outputs Q ₁ to _{Q 4} of this ring counter 42 are input, and the output signal of the OS 34 in the recognition signal detection circuit 30 is input, and four The output signal is the preset input of each digit counter 10 to 16 in digit counter 8.
It consists of a gate circuit 43 that is supplied to PE.

Reference numeral 44 denotes a mode switching means for controlling validity/invalidity of each operation of the microphone 24, the voice recognition circuit 26, and the correction digit selection circuit 38, and in this embodiment, it is constituted by a manual switch 45.

In addition, instead of this switch 45, the microphone 24
It can also be configured with a recognition circuit that outputs a signal when it recognizes only a specific voice input through the. In this case, this recognition circuit is connected to the voice recognition circuit 2.
It is also possible to include it within 6.

46 is a voice non-input period counter, and an OR gate 48 inputs the pulse signal from the OS 34 in the recognition signal detection circuit 30 and further inputs the signal from the mode switching means 44 via the inverter 50.
and a counter 52 which inputs its output signal to the reset input R and inputs the reference signal from the reference signal generator 2 to the clock input φ.

54 is a delay circuit which inputs the pulses output from the OSs 34 and 36 via the OR gate 56, delays it for a certain period of time, and then applies it to the standby input STBY of the voice recognition circuit 26 to initialize it. .

Next, the operation of the voice recognition clock with the above configuration is explained in 9.
An example of correcting hour 00 to 12:00 will be explained.

First, to set the time adjustment mode, turn on the switch 45.
The microphone 24 and voice recognition circuit 26 that have received the signal from the microphone become active.

Further, the ring counter 42, which inputs the signal from the switch 45 to the reset input R, is released from reset, and its output _Q1 becomes H level.

Further, the counter 52, which inputs the signal from the switch 45 to the reset input R via the inverter 50 and the OR gate 48, is reset and starts counting when the switch 45 is turned on.

In such a state, if you input the voice "ichi (1)" corresponding to the 10 o'clock digit of the time you want to correct from the microphone 24, the voice recognition circuit 26 will recognize that the input voice has already been registered. It detects which of the voices matches, and if it matches, outputs a recognition signal indicating the voice from outputs W ₁ to W ₄ .

The decoder 28 which receives this recognition signal converts this signal into correction value data indicating a correction value and applies it to the digit counter 8.

At this time, the decoder 32 in the recognition signal detection circuit 30 that receives the recognition signal inputs the OS 3 in response to the recognition of the input voice by the voice recognition circuit 26.
Outputs a signal to 4. In response to this, the OS 34 inputs a pulse indicating recognition possible to the gate circuit 43. At this time, the output signal of the ring counter 42
Since _Q1 is at H level, gate circuit 4
3 applies a pulse to the preset input PE of the 10 o'clock digit counter 16, and the 10 o'clock digit counter 16 is preset and corrected to the correction value data indicating "1" applied from the decoder 28 at the rising edge of this pulse. . Further, the pulse from the OS 34 is applied to the clock input φ of the ring counter 42 via the OR gate 40, and the ring counter 42 sets the output _Q2 to H level in response to the fall of this pulse.

On the other hand, at this time, the counter 52 counts for a certain period of time, and before counting up, it is reset by a pulse output from the OS 34 and starts counting again from the beginning.

Next, time 1 to be corrected from microphone 24.
When the voice "ni (2)" corresponding to the value of the hour digit is input, the voice recognition circuit 2 performs the same operation as described above.
6 outputs a recognition signal indicating this voice from outputs W ₁ to W ₄ .

This recognition signal is converted into correction value data by the decoder 28 and applied to the digit counter 8.

Also, at this time, in the same way as the operation described above,
In response to the signal from the decoder 32, the OS 34 outputs a pulse indicating that recognition is possible. At this time, since the output _Q2 of the ring counter 42 is at H level, the gate circuit 43 sends the pulse to the PE of the hour digit counter 14.
Apply to input.

In response to the rise of the pulse applied to the PE input, the hour digit counter 14 is preset to the correction value data indicating "2" which is being applied from the decoder 28 at this time. Further, the falling edge of this pulse causes the output _Q3 of the ring counter 42 to go to H level.

At this time, the counter 52 is reset in the middle of counting by a pulse output from the OS 34, similar to the operation described above, and the counting is started again from the beginning.

When correcting the time sequentially from the upper digits as described above, it is sufficient to input voice inputs such as "1" and "2" before the voice non-input period counter 46 counts for a certain period of time.

On the other hand, if you want to change 9:00 to 12:00,
There is no need to correct the minutes and units digits.

In the case of this embodiment, for digits that do not need to be corrected in this way, if no voice is input for a certain period of time, the state shifts to the correction state of the next digit.

That is, if no voice is input for a certain period of time after the correction has been completed up to the 1 o'clock digit as described above, the counter 5 in the voice non-input period counter 46
2 counts for a certain period of time and outputs a pulse from its output C.

This pulse is applied to the clock input φ of a ring counter 42 via an OR gate 40, and the ring counter 42 responds to the pulse by outputting an output Q ₂
Instead, the output _Q3 is set to H level.

At this time, since the pulse output from the OS 34 when correcting the 1 o'clock digit has already been applied to the standby input STBY of the voice recognition circuit 26 via the delay circuit 54, the voice recognition circuit 26 is in a standby state. . Therefore, each digit counter 10 to 16 is inputted from the decoder 28 to which the output signal is input.
No correction value data is supplied to the gate circuit 43, and no pulse is supplied to the gate circuit 43. For this reason,
Even if the output _Q3 of the ring counter 42 becomes H level, the current count value is maintained because the preset pulse is not supplied to the 10-minute digit counter 12 to which it is input.

At this time, the counter 52 is reset by the output pulses and starts counting again, and if there is no audio input for a certain period of time, the counter 52 outputs a pulse again from its output C.

This pulse is applied to the ring counter 42 as described above, and the ring counter 42 responds to the pulse and sets the output _Q4 to H level.

At this time, since the voice recognition circuit 26 is still in the standby state, the decoder 28
No correction value data is applied to each digit counter 10 to 16, and no pulse is supplied to the gate circuit 43. Therefore, even if the output _Q4 becomes H level, the minute digit counter 10 is not supplied with the preset pulse, so the current count value is maintained.

As mentioned above, unless a voice is input for a certain period of time, the digits that do not require correction are kept as they are, and the next digit is in the corrected state.

Note that if the input voice does not match the pre-registered voice and cannot be recognized, a signal indicating that it cannot be recognized is output from the outputs _W1 to _W4 of the voice recognition circuit 26.

Only the decoder 32 responds to this signal and
The OS 36 outputs a pulse in response to this signal.

This pulse is transmitted through an OR gate 56 and a delay circuit 54.
standby input of the voice recognition circuit 26 via
STBY is applied to put the voice recognition circuit 26 in standby state. In this way, if the voice is not recognized, no pulse is applied to the ring counter 42 and the correction digit does not shift.

After each of the above operations, by turning off the switch 45, the microphone 24 and the voice recognition circuit 26 become inactive, and the counter 52 becomes reset, returning to the normal time display state.

(Effects of the invention) According to the invention, it is possible to correct the necessary digits by simply inputting the minimum number of words, so even if only one digit is corrected, unnecessary unrecognizability is avoided. This does not occur and can be quickly corrected.

Furthermore, since there is no need for voice input for digits that do not require correction, the effort required for correction can be saved.

[Brief explanation of drawings]

The drawing is a diagram showing a circuit configuration of a voice recognition clock according to an embodiment of the present invention. 2...Reference signal generator, 8...Digit counter, 1
8... Display unit, 24... Microphone, 26... Voice recognition circuit, 28... Decoder, 30... Recognition signal detection circuit, 38... Correction digit selection circuit, 44... Mode switching means, 46... Audio Non-input period counter.

Claims (1)

[Claims for Utility Model Registration] A reference signal generator, a plurality of digit counters that count each digit of time using the reference signal from this reference signal generator, and a display of the time counted by each digit counter. A display unit, a microphone that detects external sound, a voice recognition circuit that outputs a recognition signal that recognizes the type of voice input from this microphone, and a recognition signal from this recognition circuit that is converted into correction value data. a recognition signal detection circuit that detects the generation of the recognition signal and outputs a pulse signal; and a recognition signal detection circuit that detects the generation of the recognition signal and outputs a pulse signal; and in response to the generation of the pulse signal, transmits corrected value data from the decoder to each digit counter from the upper digit. A voice recognition timepiece comprising: a correction digit selection circuit that outputs a preset signal for sequential presetting; and a mode switching means for controlling the validity/invalidity of operations of the microphone, the voice recognition circuit, and the correction digit selection circuit, the mode switching means becomes operational in response to a signal from the reference signal generator and starts counting the reference signal from the reference signal generator, and the count value is cleared in response to the generation of the recognition signal and when the count value reaches a certain value. The voice recognition clock is characterized in that it is provided with a voice non-input period counter that outputs a pulse signal to the correction digit selection circuit.