JPS625678Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a digital electronic timepiece for use in automobiles and the like, and particularly to a digital electronic timepiece equipped with an alarm mechanism.

Conventionally, in this type of digital electronic watch,
There is an alarm switch on the panel that prohibits the alarm and cancels the alarm (enables the alarm), but in addition to the above alarm switch, this panel also includes a display changeover switch that switches between time display and alarm setting time display, and a clock circuit. Since there are minute adjustment, hour adjustment, and hour adjustment switches for correcting the content information of the clock counter and alarm counter, the number of these externally operated switches increases and the panel surface is The drawbacks were that the switch was downsized and the operability of the switch was impaired.

The present invention has been made in order to eliminate such conventional drawbacks, and among the multiple external operation switches that modify the content information of the clock circuit, there is one that does not require its original function in the alarm setting time display mode. To provide a digital electronic clock capable of reducing the size of the panel surface and improving the operability of the switch by omitting a dedicated alarm switch by allowing one external operation switch to both function as alarm prohibition and alarm enable. It is.

Hereinafter, the present invention will be explained based on examples.

The figure is a block diagram showing an embodiment of the digital electronic timepiece according to the present invention. In the figure, 1 is a crystal oscillator Q, an inverter IN and a capacitor C ₁ ,
C ₂ is an oscillation circuit that generates a time reference signal, 2 is a frequency divider that divides the time reference signal input from oscillation circuit 1 in multiple stages and outputs a second signal and a fast forward signal, respectively, and 3 is a second counter. , 4 is a clock minute counter, 5 is a clock hour counter, 6 is an alarm minute counter, 7 is an alarm hour counter, and 8 is the clock information of the clock counters 4 and 5 and the alarm counters 6 and 7, which will be described later. A display selection circuit for displaying the time and alarm setting time by switching in accordance with the on/off operation of the display switching switch; 9 decodes information on the time display and alarm setting time display switched by the display selection circuit 8; 4 consisting of a decoder, 10, a fluorescent display tube, etc.
digit digital display; 11 is a coincidence circuit that compares the information of the clock counter and the alarm counter and outputs an "H" level signal when they match; 12 is the output of the coincidence circuit 11 and a flip-flop which will be described later; This is an AND gate into which the output of is input, and this output turns on an alarm signal generator (not shown) with an "H" level signal.

S ₁ is a minute correction switch as an externally operated switch, and when this switch S ₁ is turned on, it sends a "L" level signal through an inverter 13 to an AND gate 1 to which the output of an AND gate 18 is input.
6 is input to the other end. The output of the AND gate 16 is input to the other end of an exclusive OR gate 22 which has the output of the second counter 3 input to one end, and the output of this exclusive OR gate 22 is input to the clock minute counter 4. There is. S ₂ is a time correction switch, and this switch S ₂
When turned on, an "L" level signal is input via the inverter 14 to the other end of the AND gate 17, to which the output of the AND gate 18 is input. The output of the AND gate 17 is inputted to the other end of an exclusive OR gate 23, which has one end inputted with the output of the clock minute counter 4, and the output of this OR gate 23 is inputted to the clock hour counter 5. _S3 is a display changeover switch for switching between time display and alarm setting time display, and this switch _S3 selects time display when it is off, and selects alarm setting time display when it is on. That is, the changeover switch _S3 inputs an "L" level signal to the display selection circuit 8 via the inverter 24 and the timer 25, and this display selection circuit 8 clocks when the "L" level signal is input. When an "H" level signal is input, the alarm counter is output as a display for a preset time in the timer 25. Further, the output of the timer 25 is transmitted to the inverters 15, 26 and the AND gate 19,
27, the output of the inverter 15 is input to the other end of the AND gate 18 which has one end inputted with the fast forward signal output of the frequency divider 2, and the other end of the AND gate 19 is input with the frequency divider 2. The fast-forward signal output of device 2 is input. The output of the AND gate 19 is connected to an inverter 13 at one end.
The output of the inverter 14 is input to the other end of the AND gate 20, and the output of the inverter 14 is input to the other end of the AND gate 21.
The output of the AND gate 20 is input to an alarm minute counter 6, and the output of the AND gate 21 is input to an alarm hour counter 7. S ₄
is an hour setting/alarm switch, and this switch _S4 inputs an "L" level signal to the mono multivibrator 28 when turned on.
The output of the mono multivibrator 28 is input via an inverter 29 to the other end of a NAND gate 30, which has one end inputted with the output of the inverter 26, and is inputted to the other end of an AND gate 27, which has one end inputted with the output of the timer 25. has been done. The output of the NAND gate 30 is input to the R (reset) terminals of the second counter 3 and the clock minute counter 4. 31 is a D-type flip-flop having the output of the AND gate 27 inputted to the C _L (clock) terminal and the output of the differentiating circuit 32 inputted to the R (reset) terminal;
The output of 1 is input to the other end of the AND gate 12, and is also fed back to the D (data input) terminal. Note that the output of the timer 25 is input to the differentiating circuit 32.

Next, the operation of the above embodiment will be explained. Here, it is assumed that the second counter 3 and the clock minute counter 4 are reset when an "L" level signal is input to the R terminal, and the flip-flop 31 is in the reset state. First, in the case of clock time display, if you turn off the display changeover switch S ₃ and also turn off the other minute and hour correction switches S ₁ and S ₂ and the hour setting/alarm switch S ₄ as shown in the figure, the NAND gate 30 receives the "H" level signal on the hour when the display changeover switch _S3 is turned off/the "L" level signal when the alarm switch _S4 is turned off, and its output becomes "H". “It becomes a level signal,
The second counter 3 and the clock minute counter 4 are reset by the output of the NAND gate 30. In this state, when the time reference signal is input from the oscillation circuit 1 to the frequency divider 2, this time reference signal is divided in multiple stages by the frequency divider 2, converted into a second signal, inputted to the second counter 3, and then The counter 3 measures the second signal and inputs it to a clock minute counter 4 via an exclusive OR gate 22, and the minute counter 4 inputs its output to a clock hour counter 5 via an exclusive OR gate 23. do. At this time, an "L" level signal is input to the display selection circuit 8 due to the turning off of the display changeover switch _S3 , and the display selection circuit 8 receives time information from the clock minute counter 4 and hour counter 5. Decoder 9
to the digital display 10, thereby providing the usual "hours, minutes" display of the digital display 10. In addition, in this case, AND gate 18
inputs an "H" level signal associated with the turning off of the display changeover switch _S3 , and outputs the fast-forward signal of the frequency divider 2 to the AND gates 16 and 17.

Next, when the minute correction switch _S1 is turned on in the "hour, minute" display, an "H" level signal is input to one end of the AND gate 16 in response to the turning on of the minute correction switch _S1 . Then, since the fast-forward signal is derived from the AND gate 18 at the other end of the AND gate 16, the fast-forward signal is sent to the exclusive OR gate 2 using the "H" level signal.
2 and is input to the clock minute counter 4. Therefore, the minute counter 4 changes the clock information using the fast-forward signal, and while checking the time display on the digital display 10, it becomes possible to adjust the minutes in fast forward mode over the period of ON operation of the minute correction switch _S1 . Also,
When the time correction switch _S2 is turned on, the “H” level signal associated with this turning on is applied to the AND gate 17.
and gate 1 by being input to one end of
7 passes the fast-forward signal input from the AND gate 18, and this fast-forward signal is input to the clock hour counter 5 via the exclusive OR gate 23, so it is operated in the same way as the minute correction switch _S1 above. It is possible to adjust the time.

On the other hand, when setting the hour, when the hour setting/alarm switch _S4 is turned on, the mono multivibrator 28 is triggered by the "L" level signal accompanying the turning on of the switch _S4 , and its output is A pulse signal of "L" level is generated and inputted to one end of the NAND gate 30 via the inverter 29.
Then, since the "H" level signal associated with the turning off of the display changeover switch _S3 is input to the other end of the NAND gate 30, the NAND gate 30 outputs the "L" level output to the second counter 3 and the clock. These are input to the counter 4 and reset at the same time.
Therefore, when the display changeover switch _S3 is in the time display mode and the hour setting/alarm switch _S4 is turned on, the switch _S4 becomes capable of setting the hour. At this time, an "H" level signal is input to one end of the AND gate 27 due to the turning on of the switch _S4 , but a "H" level signal is input to the other end due to the turning off of the display changeover switch _S3 . Since the L level signal is input, the output of the AND gate 27 becomes the L level signal, and the flip-flop 3
1 maintains the reset state.

By the way, the alarm minute and hour counters 6 and 7
Assuming that an alarm time is set in advance in , when the clock minute and hour counters 4 and 5 and the alarm minute and hour counters 6 and 7 match, the coincidence circuit 11 outputs an "H" level signal. It is input to one end of the AND gate 12. Then, a flip-flop 31 is connected to the other end of the AND gate 12.
The output of , that is, the "H" level signal is input, and the output becomes the "H" level signal. As a result, an alarm signal generator (not shown) is turned on by the output of the AND gate 12, and an alarm sound is generated based on the signal output from the generator.

Next, to disable the alarm in the clock circuit as described above, turn on the hour setting/alarm switch _S4 with display changeover switch _S3 on, and the R input of flip-flop 31 will display A pulse obtained by differentiating the "H" level signal caused by turning on the changeover switch _S3 by the differentiating circuit 32 is input as a reset signal, but the flip-flop 31 maintains its state. However, the AND gate 27 has display changeover switch _S3 and hour setting/
Since the "H" level signal associated with the turning on of the alarm switch _S4 is input, its output becomes a "H" level signal, and the flip-flop 31's C _L
The "H" level output of the AND gate 27 is supplied to the input. At this time, since the output "H" level signal is applied to the D input of the flip-flop 31, the flip-flop 31
The "H" level output of the AND gate 27 is read and a "H" level signal is generated at the Q output and an "L" level signal is generated at the output. Therefore, and gate 12
is inhibited by the "L" level signal of the output of the flip-flop 31, and this state is maintained regardless of the output of the matching circuit 11. In other words, if you turn on the hour setting/alarm switch _S4 while the display changeover switch _S3 is in the alarm setting time display mode,
This switch _S4 allows the alarm to be disabled. In addition, at this time, Nand Gate 3
0 is a "L" level signal that is input when the display changeover switch _S3 is turned on, so it is "H" regardless of the ON operation of the hour setting/alarm switch _S4 .
Sustain level output.

In addition, when the alarm setting of the display changeover switch S ₃ is in time display mode, the hour setting/alarm switch S ₄
When the flip-flop 31 is turned on and then turned on again, the D input of the flip-flop 31 is at the "L" level, and the "H" level output from the AND gate 27 is supplied as the clock input to its C _L input as described above. , Q and output are inverted. Therefore, the output from the flip-flop 31 that has changed from the "L" level to the "H" level signal is input to the AND gate 12. The AND gate 12 changes from alarm prohibition to alarm enable state. Therefore, whenever the hour setting/alarm switch _S4 is turned on while the display changeover switch _S3 is in the alarm setting display mode, the alarm prohibition and alarm enablement can be alternately repeated.

As described above, according to this embodiment, the hour setting/alarm switch _S4 not only sets the hour in the clock time display mode, but also disables and enables alarms in the alarm setting time display mode. , one operation switch can have both functions. Therefore, in the past, in addition to the hour setting switch _S5 , an alarm switch _S6 was installed on the panel as shown in Figure 3.
However, in this application, as shown in Fig. 2, only one hour setting/alarm switch _S4 is required, making it possible to reduce the size of the panel and improve the operability of the switch. . Note that in FIGS. 2 and 3, the same parts as in FIG. 1 are designated by the same reference numerals.

It should be noted that the present invention is not limited to the above-mentioned embodiments, but may include other switches other than the switch having the hour setting function having the functions of disabling and enabling alarms, or using a circuit system with logic different from that of the above-mentioned embodiments. Of course, various changes can be made, such as changing the timer 25 or omitting the timer 25.

As explained above, the present invention provides a digital electronic watch with an alarm that has a plurality of external operation switches that switch between a time display and an alarm setting time display and modify the content information of a clock circuit. A switch is provided to modify the display contents only when the time is displayed, and when the alarm setting time is displayed, when the switch is operated, an alarm enable signal and an alarm prohibition signal are alternately output for each operation, and the alarm enable signal causes an alarm. Since the coincidence signal for generating the signal is output and the output of this coincidence signal is blocked by the alarm prohibition signal, the effect is that the panel surface can be made smaller and the operability of the switch can be improved. There is.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a digital electronic timepiece according to the present invention, and FIGS. 2 and 3 are front views of the panel surface of the above embodiment and the conventional one. 1... Oscillation circuit, 2... Frequency divider, 3... Second counter, 4... Minute counter for clock, 5... Hour counter for clock, 6... Minute counter for alarm, 7... Hour counter for alarm. , 8... Display selection circuit, 9... Decoder, 10... Digital display, 11... Matching circuit, 12, 16 to 21, 27
...and gate, 13-15, 24, 26, 2
9... Inverter, 22, 23... Exclusive OR gate, 25... Timer, 28... Mono multivibrator, 30... Nand gate, 3
1...Flip-flop, 32...Differential circuit, S ₁
...Minute correction switch, S ₂ ...Hour correction switch, S ₃
…Display changeover switch, S ₄ …Switch for hour setting/alarm.

Claims (1)

[Scope of utility model registration request] A changeover switch S3 that switches between the time display and the alarm setting time display on the display 10, first correction switches S1 and S2 that correct the display content when displaying the time and the alarm setting time, and display only when the time is being displayed. Second correction switch S4 to correct the contents
, a circuit 11 that outputs a coincidence signal to generate an alarm signal when the time reaches the alarm setting time, and a second correction switch that outputs an alarm enable signal and an alarm prohibition signal each time the alarm setting time is displayed. A circuit 27 that outputs signals alternately,
31, 32, and a circuit 12 that enables output of a coincidence signal by an alarm enable signal and prevents output of the coincidence signal by an alarm prohibition signal.