JPH0574866B2 - - Google Patents

Info

Publication number
JPH0574866B2
JPH0574866B2 JP9219586A JP9219586A JPH0574866B2 JP H0574866 B2 JPH0574866 B2 JP H0574866B2 JP 9219586 A JP9219586 A JP 9219586A JP 9219586 A JP9219586 A JP 9219586A JP H0574866 B2 JPH0574866 B2 JP H0574866B2
Authority
JP
Japan
Prior art keywords
dual port
processor
register
address
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP9219586A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62249266A (ja
Inventor
Akitoshi Kitazawa
Shozo Mitarai
Toshuki Tojo
Tatsuaki Ueno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Microcomputer System Ltd
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Microcomputer System Ltd, Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Microcomputer System Ltd
Priority to JP9219586A priority Critical patent/JPS62249266A/ja
Publication of JPS62249266A publication Critical patent/JPS62249266A/ja
Publication of JPH0574866B2 publication Critical patent/JPH0574866B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
JP9219586A 1986-04-23 1986-04-23 半導体記憶装置 Granted JPS62249266A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9219586A JPS62249266A (ja) 1986-04-23 1986-04-23 半導体記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9219586A JPS62249266A (ja) 1986-04-23 1986-04-23 半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS62249266A JPS62249266A (ja) 1987-10-30
JPH0574866B2 true JPH0574866B2 (cg-RX-API-DMAC7.html) 1993-10-19

Family

ID=14047662

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9219586A Granted JPS62249266A (ja) 1986-04-23 1986-04-23 半導体記憶装置

Country Status (1)

Country Link
JP (1) JPS62249266A (cg-RX-API-DMAC7.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5086577B2 (ja) * 2006-07-28 2012-11-28 株式会社日立超エル・エス・アイ・システムズ 半導体装置

Also Published As

Publication number Publication date
JPS62249266A (ja) 1987-10-30

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