JPH0567865A - Method of treating surface of printed-wiring board - Google Patents

Abstract

PURPOSE:To prevent the generation of a soldering defect, such as shorts circuit, when a surface mount electronic component is soldered and mounted on a printed-wiring board in a method of treating the surface of the printed-wiring board. CONSTITUTION:A printed-wiring board is constituted by going through a process wherein a conductor layer pattern region 1A, which ends a process for forming a solder-plated layer 6 on a copper pattern layer 7 and is soldered to an electronic component on the printed-wiring board 2 having conductor layer patterns 1, is selectively covered with a resist film 4 to etch the board 2 and after the layer 7 located at a conductor layer pattern region 1B, which is not soldered to the electronic component, is selectively exposed, the film 4 is peeled, then, a solder resist film 8 is selectively applied on the region 1B, where the layer 7 is exposed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface treatment method for a printed wiring board, and more particularly to a surface treatment method for a printed wiring board on which surface mount type electronic parts are mounted.

[0002]

2. Description of the Related Art A conductor layer pattern 1 having a solder plating layer formed on a copper pattern layer as shown in FIG. 2 (a) and FIG. 2 (b) of the sectional view taken along the line AA 'of FIG. 2 (a). Printed wiring board 2 having
Regarding the conventional surface treatment method for the printed wiring board when soldering and mounting the terminals 5 of the surface mounting type electronic component 3 such as QFP (Quad Flat Package) as shown in FIG. State.

As shown in FIGS. 2 (b) and 2 (c), in a printed wiring board 2 having a conductor layer pattern 1 in which a copper foil is formed in a predetermined pattern as shown in FIG. 2 (a). Only the conductor layer pattern area 1B which is not soldered to the terminal 5 of the electronic component 3
The resist film 4 is selectively covered.

Next, the printed wiring board 2 having the conductor layer pattern 1 covered with the resist film 4 is passed through a tank in which the solder is melted or a solder coater in which the solder rises as a jet flow, and the electronic component 3 A solder layer is formed on the terminal 5 and the conductor layer pattern region 1A to be soldered.

Next, the terminals 5 of the electronic component 3 are soldered to the conductor layer pattern region 1A having the solder layer formed thereon.

[0006]

However, in the above-mentioned conventional method, the distance between the terminals 5 of the electronic component 3 tends to become narrower in order to achieve high-density mounting. The distance between the respective conductor layer patterns 1 to be connected tends to become smaller and smaller, and there is a disadvantage that the conductor layer patterns 1 are short-circuited with solder during the solder coating operation.

Therefore, recently, the conductor layer pattern 1 has been formed.
Is soldered to the conductor layer pattern 1 made of a copper pattern and the terminals 5 of the surface mount type electronic component 3 are mounted without performing a solder plating step. In this case, the solder of the conductor layer pattern 1 is soldered. In the conductor layer pattern area 1A to be attached,
Solder cream is applied using a screen printing method.

However, even in this case, when the pitch between the conductor layer patterns 1 is narrow, when the solder cream is applied by the screen printing method, the conductor layer patterns 1 are short-circuited by the applied solder cream. There's a problem.

An object of the present invention is to solve the above problems and to provide a surface treatment method for a printed wiring board in which conductor patterns are not short-circuited.

[0010]

A printed wiring board surface treatment method of the present invention is a conductor layer pattern area for soldering with an electronic component of a printed wiring board having a conductor layer pattern for which a solder plating layer forming step has been completed. In addition, the printed wiring board is selectively covered with a resist film and the printed wiring board is etched to selectively expose the copper pattern layer portion of the conductor layer pattern area of the area which is not soldered to the electronic component, and then the resist film is peeled off. And then selectively coating the exposed conductor layer pattern of the copper pattern layer with a solder resist film.

[0011]

According to the present invention, after the solder plating layer is formed on all the conductor layer patterns, the resist pattern is selectively coated only on the area of the conductor layer pattern to be soldered with the electronic component. The conductor layer pattern region other than the covered region is selectively etched.

Then, the area of the conductor layer pattern to be soldered to the terminal of the electronic component is formed by the electrolytic solder plating method. In this electrolytic solder plating method, since the formation speed of the solder layer is slow, the conductor layer pattern is formed. The phenomenon that the solder is short-circuited between them is avoided, and the process of solder coating work and solder cream application work is not included, so that the phenomenon that the solder is short-circuited between the conductor layer patterns is avoided.

[0013]

Embodiments of the present invention will be described in detail below with reference to the drawings. As shown in the cross-sectional views taken along the line AA ′ of FIGS. 1 (a) and 1 (b), the surface treatment method of the present invention uses the step of forming the solder plating layer 6 on the copper pattern layer 7 of the printed wiring board 2. The conductor layer pattern 1 that has been completed is selectively covered with the resist film 4 on the conductor layer pattern region 1A to be soldered to the electronic component.

Then, as shown in FIG. 1 (c), the solder plating layer 6 of the conductor layer pattern 1 covered with the resist film 4 is etched, but the copper pattern layer 7 is not etched. The conductor layer pattern area 1B that is not soldered to the component is selectively etched, and only the solder plating layer 6 in the conductor layer pattern area 1B is selectively etched to expose the copper pattern layer 7 of the conductor layer pattern 1. To do.

Then, only the conductor layer pattern region 1A to be soldered to the electronic component is in a state where the solder plating layer 6 is selectively formed, and the solder plating layer 6 is formed by the electrolytic solder plating method.

Therefore, the speed of forming the solder plating layer 6 is higher than that of the conventional method of forming the solder layer by passing it through a bath in which the solder is melted, or a solder coater in which the solder rises as a jet. Slow.

Therefore, the conductor layer pattern 1 having a narrow pitch
There is no accident such that the solder layer is deposited over the gap, and only the conductor layer pattern 1A to be selectively soldered is solder-plated, and the phenomenon that the solder layers are short-circuited is eliminated.

Next, after removing the resist film 4 with a resist removing liquid, only the exposed copper pattern layer 7 of the printed wiring board thus formed as shown in FIG. 1 (d) is selectively solder resist film. The solder plating layer 6 of the conductor layer pattern 1 is covered with 8 and is melted by passing through a heating furnace equipped with an infrared lamp or the like, and the terminal of the electronic component and the melted solder plating layer are soldered.

By doing so, the solder plating layer 6 is selectively formed only in the region 1A of the conductor layer pattern 1 to be soldered to the terminal of the electronic component, so that the conductor layer pattern 1 can be spread across the conductor layer patterns 1. Since the solder plating layer 6 is not likely to be formed and the terminals of the electronic component are reliably soldered, an accident such as a short circuit does not occur, and a highly reliable electronic component can be mounted.

[0020]

As described above, according to the surface treatment method of the present invention, the solder layer is selectively and surely formed in the area of the conductor layer pattern that requires soldering. Has the effect of decreasing.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a method of the present invention.

FIG. 2 is an explanatory diagram of a conventional method.

[Explanation of symbols]

 1 Conductor layer pattern 1A, 1B Conductor layer pattern area 2 Printed wiring board 3 Electronic component 4 Resist film 5 Terminal 6 Solder plating layer 7 Copper pattern layer 8 Solder resist film

Claims (1)

[Claims] 1. A solder plating layer (6) on a copper pattern layer (7)
The conductive layer pattern area (1A) to be soldered to the electronic component of the printed wiring board (2) having the conductor layer pattern (1) after the formation step is selectively covered with the resist film (4) After etching the printed wiring board (2) and selectively exposing the copper pattern layer (7) in the conductor layer pattern area (1B) that is not soldered to electronic parts, the resist film
(4) is peeled off, and then the exposed conductor layer pattern region (1B) of the copper pattern layer (7) is selectively covered with a solder resist film (8) Surface treatment method.