JPH0567070B2 - - Google Patents
Info
- Publication number
- JPH0567070B2 JPH0567070B2 JP61245823A JP24582386A JPH0567070B2 JP H0567070 B2 JPH0567070 B2 JP H0567070B2 JP 61245823 A JP61245823 A JP 61245823A JP 24582386 A JP24582386 A JP 24582386A JP H0567070 B2 JPH0567070 B2 JP H0567070B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- semiconductor chip
- wiring
- board
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
-
- H10W90/754—
Landscapes
- Combinations Of Printed Boards (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61245823A JPS6399559A (ja) | 1986-10-15 | 1986-10-15 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61245823A JPS6399559A (ja) | 1986-10-15 | 1986-10-15 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6399559A JPS6399559A (ja) | 1988-04-30 |
| JPH0567070B2 true JPH0567070B2 (enExample) | 1993-09-24 |
Family
ID=17139384
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61245823A Granted JPS6399559A (ja) | 1986-10-15 | 1986-10-15 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6399559A (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0629459A (ja) * | 1992-07-08 | 1994-02-04 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP3036976B2 (ja) * | 1992-07-24 | 2000-04-24 | 日本電気株式会社 | マルチチップモジュール |
| JP3057130B2 (ja) | 1993-02-18 | 2000-06-26 | 三菱電機株式会社 | 樹脂封止型半導体パッケージおよびその製造方法 |
| US5362986A (en) * | 1993-08-19 | 1994-11-08 | International Business Machines Corporation | Vertical chip mount memory package with packaging substrate and memory chip pairs |
| KR100587024B1 (ko) * | 1998-12-24 | 2007-12-12 | 주식회사 하이닉스반도체 | 3차원 적층형 마이크로 비지에이 패키지 |
| JP7007012B2 (ja) * | 2017-09-12 | 2022-01-24 | Necプラットフォームズ株式会社 | 電子機器、モジュール基板 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5713999Y2 (enExample) * | 1977-05-24 | 1982-03-20 |
-
1986
- 1986-10-15 JP JP61245823A patent/JPS6399559A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6399559A (ja) | 1988-04-30 |
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