JPH056219B2 - - Google Patents

Info

Publication number
JPH056219B2
JPH056219B2 JP6366586A JP6366586A JPH056219B2 JP H056219 B2 JPH056219 B2 JP H056219B2 JP 6366586 A JP6366586 A JP 6366586A JP 6366586 A JP6366586 A JP 6366586A JP H056219 B2 JPH056219 B2 JP H056219B2
Authority
JP
Japan
Prior art keywords
queue
input
control
channel processing
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP6366586A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62247444A (ja
Inventor
Yoshifumi Ojiro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6366586A priority Critical patent/JPS62247444A/ja
Publication of JPS62247444A publication Critical patent/JPS62247444A/ja
Publication of JPH056219B2 publication Critical patent/JPH056219B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP6366586A 1986-03-20 1986-03-20 チヤネル・パス制御方式 Granted JPS62247444A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6366586A JPS62247444A (ja) 1986-03-20 1986-03-20 チヤネル・パス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6366586A JPS62247444A (ja) 1986-03-20 1986-03-20 チヤネル・パス制御方式

Publications (2)

Publication Number Publication Date
JPS62247444A JPS62247444A (ja) 1987-10-28
JPH056219B2 true JPH056219B2 (enExample) 1993-01-26

Family

ID=13235866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6366586A Granted JPS62247444A (ja) 1986-03-20 1986-03-20 チヤネル・パス制御方式

Country Status (1)

Country Link
JP (1) JPS62247444A (enExample)

Also Published As

Publication number Publication date
JPS62247444A (ja) 1987-10-28

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