JPH0560186B2 - - Google Patents

Info

Publication number
JPH0560186B2
JPH0560186B2 JP56057561A JP5756181A JPH0560186B2 JP H0560186 B2 JPH0560186 B2 JP H0560186B2 JP 56057561 A JP56057561 A JP 56057561A JP 5756181 A JP5756181 A JP 5756181A JP H0560186 B2 JPH0560186 B2 JP H0560186B2
Authority
JP
Japan
Prior art keywords
video signal
circuit
input video
signal
synchronization signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56057561A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57172514A (en
Inventor
Satoru Maeda
Tadashi Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP5756181A priority Critical patent/JPS57172514A/ja
Publication of JPS57172514A publication Critical patent/JPS57172514A/ja
Publication of JPH0560186B2 publication Critical patent/JPH0560186B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
JP5756181A 1981-04-16 1981-04-16 Separating circuit for synchronizing signal Granted JPS57172514A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5756181A JPS57172514A (en) 1981-04-16 1981-04-16 Separating circuit for synchronizing signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5756181A JPS57172514A (en) 1981-04-16 1981-04-16 Separating circuit for synchronizing signal

Publications (2)

Publication Number Publication Date
JPS57172514A JPS57172514A (en) 1982-10-23
JPH0560186B2 true JPH0560186B2 (enExample) 1993-09-01

Family

ID=13059234

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5756181A Granted JPS57172514A (en) 1981-04-16 1981-04-16 Separating circuit for synchronizing signal

Country Status (1)

Country Link
JP (1) JPS57172514A (enExample)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49114826A (enExample) * 1973-02-28 1974-11-01

Also Published As

Publication number Publication date
JPS57172514A (en) 1982-10-23

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